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opnd_shared.c
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opnd_shared.c
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/* **********************************************************
* Copyright (c) 2011-2022 Google, Inc. All rights reserved.
* Copyright (c) 2000-2010 VMware, Inc. All rights reserved.
* **********************************************************/
/*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* * Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* * Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* * Neither the name of VMware, Inc. nor the names of its contributors may be
* used to endorse or promote products derived from this software without
* specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL VMWARE, INC. OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
* DAMAGE.
*/
/* Copyright (c) 2003-2007 Determina Corp. */
/* Copyright (c) 2001-2003 Massachusetts Institute of Technology */
/* Copyright (c) 2000-2001 Hewlett-Packard Company */
/* file "opnd_shared.c" -- IR opnd utilities */
#include "../globals.h"
#include "opnd.h"
#include "arch.h"
/* FIXME i#1551: refactor this file and avoid this x86-specific include in base arch/ */
#ifndef AARCH64
# include "x86/decode_private.h"
#endif
#if defined(DEBUG) && !defined(STANDALONE_DECODER)
/* case 10450: give messages to clients */
/* we can't undef ASSERT b/c of DYNAMO_OPTION */
# undef ASSERT_TRUNCATE
# undef ASSERT_BITFIELD_TRUNCATE
# undef ASSERT_NOT_REACHED
# define ASSERT_TRUNCATE DO_NOT_USE_ASSERT_USE_CLIENT_ASSERT_INSTEAD
# define ASSERT_BITFIELD_TRUNCATE DO_NOT_USE_ASSERT_USE_CLIENT_ASSERT_INSTEAD
# define ASSERT_NOT_REACHED DO_NOT_USE_ASSERT_USE_CLIENT_ASSERT_INSTEAD
#endif
#undef opnd_is_null
#undef opnd_is_immed_int
#undef opnd_is_immed_float
#undef opnd_is_immed_double
#undef opnd_is_near_pc
#undef opnd_is_near_instr
#undef opnd_is_reg
#undef opnd_is_base_disp
#undef opnd_is_far_pc
#undef opnd_is_far_instr
#undef opnd_is_mem_instr
#undef opnd_is_valid
bool
opnd_is_null(opnd_t op)
{
return OPND_IS_NULL(op);
}
bool
opnd_is_immed_int(opnd_t op)
{
return OPND_IS_IMMED_INT(op);
}
bool
opnd_is_immed_float(opnd_t op)
{
return OPND_IS_IMMED_FLOAT(op);
}
bool
opnd_is_immed_double(opnd_t op)
{
return OPND_IS_IMMED_DOUBLE(op);
}
bool
opnd_is_near_pc(opnd_t op)
{
return OPND_IS_NEAR_PC(op);
}
bool
opnd_is_near_instr(opnd_t op)
{
return OPND_IS_NEAR_INSTR(op);
}
bool
opnd_is_reg(opnd_t op)
{
return OPND_IS_REG(op);
}
bool
opnd_is_base_disp(opnd_t op)
{
return OPND_IS_BASE_DISP(op);
}
bool
opnd_is_far_pc(opnd_t op)
{
return OPND_IS_FAR_PC(op);
}
bool
opnd_is_far_instr(opnd_t op)
{
return OPND_IS_FAR_INSTR(op);
}
bool
opnd_is_mem_instr(opnd_t op)
{
return OPND_IS_MEM_INSTR(op);
}
bool
opnd_is_valid(opnd_t op)
{
return OPND_IS_VALID(op);
}
#define opnd_is_null OPND_IS_NULL
#define opnd_is_immed_int OPND_IS_IMMED_INT
#define opnd_is_immed_float OPND_IS_IMMED_FLOAT
#define opnd_is_immed_double OPND_IS_IMMED_DOUBLE
#define opnd_is_near_pc OPND_IS_NEAR_PC
#define opnd_is_near_instr OPND_IS_NEAR_INSTR
#define opnd_is_reg OPND_IS_REG
#define opnd_is_base_disp OPND_IS_BASE_DISP
#define opnd_is_far_pc OPND_IS_FAR_PC
#define opnd_is_far_instr OPND_IS_FAR_INSTR
#define opnd_is_mem_instr OPND_IS_MEM_INSTR
#define opnd_is_valid OPND_IS_VALID
#if defined(X64) || defined(ARM)
# undef opnd_is_rel_addr
bool
opnd_is_rel_addr(opnd_t op)
{
return OPND_IS_REL_ADDR(op);
}
# define opnd_is_rel_addr OPND_IS_REL_ADDR
#endif
/* We allow overlap between ABS_ADDR_kind and BASE_DISP_kind w/ no base or index */
bool
opnd_is_abs_base_disp(opnd_t opnd)
{
return (opnd_is_base_disp(opnd) && opnd_get_base(opnd) == REG_NULL &&
opnd_get_index(opnd) == REG_NULL);
}
bool
opnd_is_abs_addr(opnd_t opnd)
{
return IF_X64(opnd.kind == ABS_ADDR_kind ||) opnd_is_abs_base_disp(opnd);
}
bool
opnd_is_near_abs_addr(opnd_t opnd)
{
return opnd_is_abs_addr(opnd) IF_X86(&&opnd.aux.segment == REG_NULL);
}
bool
opnd_is_far_abs_addr(opnd_t opnd)
{
return IF_X86_ELSE(opnd_is_abs_addr(opnd) && opnd.aux.segment != REG_NULL, false);
}
bool
opnd_is_vsib(opnd_t op)
{
return (opnd_is_base_disp(op) &&
(reg_is_strictly_xmm(opnd_get_index(op)) ||
reg_is_strictly_ymm(opnd_get_index(op)) ||
reg_is_strictly_zmm(opnd_get_index(op))));
}
bool
opnd_is_reg_32bit(opnd_t opnd)
{
if (opnd_is_reg(opnd))
return reg_is_32bit(opnd_get_reg(opnd));
return false;
}
bool
reg_is_32bit(reg_id_t reg)
{
return (reg >= REG_START_32 && reg <= REG_STOP_32);
}
#if defined(X86) || defined(AARCH64)
bool
opnd_is_reg_64bit(opnd_t opnd)
{
if (opnd_is_reg(opnd))
return reg_is_64bit(opnd_get_reg(opnd));
return false;
}
bool
reg_is_64bit(reg_id_t reg)
{
return (reg >= REG_START_64 && reg <= REG_STOP_64);
}
#endif /* !ARM */
bool
opnd_is_reg_pointer_sized(opnd_t opnd)
{
if (opnd_is_reg(opnd))
return reg_is_pointer_sized(opnd_get_reg(opnd));
return false;
}
bool
opnd_is_reg_partial(opnd_t opnd)
{
return (opnd_is_reg(opnd) && opnd.size != 0 &&
opnd_get_size(opnd) != reg_get_size(opnd_get_reg(opnd)));
}
bool
reg_is_pointer_sized(reg_id_t reg)
{
#ifdef X64
return (reg >= REG_START_64 && reg <= REG_STOP_64);
#else
return (reg >= REG_START_32 && reg <= REG_STOP_32);
#endif
}
#undef opnd_get_reg
reg_id_t
opnd_get_reg(opnd_t opnd)
{
return OPND_GET_REG(opnd);
}
#define opnd_get_reg OPND_GET_REG
#undef opnd_get_flags
dr_opnd_flags_t
opnd_get_flags(opnd_t opnd)
{
return OPND_GET_FLAGS(opnd);
}
#define opnd_get_flags OPND_GET_FLAGS
void
opnd_set_flags(opnd_t *opnd, dr_opnd_flags_t flags)
{
CLIENT_ASSERT(opnd_is_reg(*opnd) || opnd_is_base_disp(*opnd) ||
opnd_is_immed_int(*opnd),
"opnd_set_flags called on non-reg non-base-disp non-immed-int opnd");
opnd->aux.flags = flags;
}
opnd_t
opnd_add_flags(opnd_t opnd, dr_opnd_flags_t flags)
{
opnd_set_flags(&opnd, flags | opnd.aux.flags);
return opnd;
}
opnd_size_t
opnd_get_size(opnd_t opnd)
{
switch (opnd.kind) {
case REG_kind: return (opnd.size == 0 ? reg_get_size(opnd_get_reg(opnd)) : opnd.size);
case IMMED_INTEGER_kind:
case IMMED_FLOAT_kind:
case IMMED_DOUBLE_kind:
case BASE_DISP_kind:
#if defined(X64) || defined(ARM)
case REL_ADDR_kind:
#endif
#ifdef X64
case ABS_ADDR_kind:
#endif
case MEM_INSTR_kind:
case INSTR_kind: return opnd.size;
case PC_kind: return OPSZ_PTR;
case FAR_PC_kind:
case FAR_INSTR_kind: return OPSZ_6_irex10_short4;
case NULL_kind: return OPSZ_NA;
default: CLIENT_ASSERT(false, "opnd_get_size: unknown opnd type"); return OPSZ_NA;
}
}
void
opnd_set_size(opnd_t *opnd, opnd_size_t newsize)
{
switch (opnd->kind) {
case IMMED_INTEGER_kind:
case BASE_DISP_kind:
#if defined(X64) || defined(ARM)
case REL_ADDR_kind:
#endif
#ifdef X64
case ABS_ADDR_kind:
#endif
case REG_kind:
case MEM_INSTR_kind:
case INSTR_kind: opnd->size = newsize; return;
default: CLIENT_ASSERT(false, "opnd_set_size: unknown opnd type");
}
}
#if defined(AARCH64)
/* Possible values of opnd.value.base_disp.element_size. */
enum {
ELEMENT_SIZE_SINGLE = 0,
ELEMENT_SIZE_DOUBLE = 1,
};
#endif
opnd_size_t
opnd_get_vector_element_size(opnd_t opnd)
{
if (!TEST(DR_OPND_IS_VECTOR, opnd.aux.flags))
return OPSZ_NA;
switch (opnd.kind) {
case REG_kind: return opnd.value.reg_and_element_size.element_size;
#if defined(AARCH64)
case BASE_DISP_kind:
switch (opnd.value.base_disp.element_size) {
case ELEMENT_SIZE_SINGLE: return OPSZ_4;
case ELEMENT_SIZE_DOUBLE: return OPSZ_8;
}
#endif
default: return OPSZ_NA;
}
}
/* immediate operands */
#if defined(DEBUG) && !defined(STANDALONE_DECODER)
static void
opnd_check_immed_size(int64 i, opnd_size_t size)
{
uint sz = opnd_size_in_bytes(size);
if (sz == 1) {
CLIENT_ASSERT(CHECK_TRUNCATE_TYPE_sbyte(i) || CHECK_TRUNCATE_TYPE_byte(i),
"opnd_create_immed_int: value too large for 8-bit size");
} else if (sz == 2) {
CLIENT_ASSERT(CHECK_TRUNCATE_TYPE_short(i) || CHECK_TRUNCATE_TYPE_ushort(i),
"opnd_create_immed_int: value too large for 16-bit size");
} else if (sz == 4) {
CLIENT_ASSERT(CHECK_TRUNCATE_TYPE_int(i) || CHECK_TRUNCATE_TYPE_uint(i),
"opnd_create_immed_int: value too large for 32-bit size");
}
}
#endif
opnd_t
opnd_create_immed_int(ptr_int_t i, opnd_size_t size)
{
opnd_t opnd;
opnd.kind = IMMED_INTEGER_kind;
CLIENT_ASSERT(size < OPSZ_LAST_ENUM, "opnd_create_immed_int: invalid size");
opnd.size = size;
opnd.value.immed_int = i;
opnd.aux.flags = 0;
DOCHECK(1, { opnd_check_immed_size(i, size); });
return opnd;
}
opnd_t
opnd_create_immed_uint(ptr_uint_t i, opnd_size_t size)
{
opnd_t opnd;
opnd.kind = IMMED_INTEGER_kind;
CLIENT_ASSERT(size < OPSZ_LAST_ENUM, "opnd_create_immed_uint: invalid size");
opnd.size = size;
opnd.value.immed_int = (ptr_int_t)i;
opnd.aux.flags = 0;
DOCHECK(1, { opnd_check_immed_size(i, size); });
return opnd;
}
opnd_t
opnd_create_immed_int64(int64 i, opnd_size_t size)
{
opnd_t opnd;
opnd.kind = IMMED_INTEGER_kind;
IF_X64(CLIENT_ASSERT(false, "32-bit only"));
CLIENT_ASSERT(size < OPSZ_LAST_ENUM, "opnd_create_immed_uint: invalid size");
opnd.size = size;
opnd.value.immed_int_multi_part.low = (uint)i;
opnd.value.immed_int_multi_part.high = (uint)((uint64)i >> 32);
opnd.aux.flags = DR_OPND_MULTI_PART;
DOCHECK(1, { opnd_check_immed_size(i, size); });
return opnd;
}
opnd_t
opnd_invert_immed_int(opnd_t opnd)
{
CLIENT_ASSERT(opnd.kind == IMMED_INTEGER_kind, "opnd_invert_immed_int: invalid kind");
const int bit_size = opnd_size_in_bits(opnd.size);
const uint64 mask =
(bit_size < 64) ? ((uint64)1 << opnd_size_in_bits(opnd.size)) - 1 : ~((uint64)0);
if (opnd.aux.flags & DR_OPND_MULTI_PART) {
opnd.value.immed_int_multi_part.low &= mask;
opnd.value.immed_int_multi_part.high &= mask >> 32;
} else {
opnd.value.immed_int = ~opnd.value.immed_int & mask;
}
return opnd;
}
bool
opnd_is_immed_int64(opnd_t opnd)
{
return (opnd_is_immed_int(opnd) && TEST(DR_OPND_MULTI_PART, opnd_get_flags(opnd)));
}
/* NOTE: requires caller to be under PRESERVE_FLOATING_POINT_STATE */
opnd_t
opnd_create_immed_float(float i)
{
opnd_t opnd;
opnd.kind = IMMED_FLOAT_kind;
/* Note that manipulating floats and doubles by copying in this way can
* result in using FP load/store instructions which can trigger any pending
* FP exception (i#386).
*/
opnd.value.immed_float = i;
/* currently only used for implicit constants that have no size */
opnd.size = OPSZ_0;
return opnd;
}
#ifndef WINDOWS
/* XXX i#4488: x87 floating point immediates should be double precision.
* Type double currently not included for Windows because sizeof(opnd_t) does
* not equal EXPECTED_SIZEOF_OPND, triggering the ASSERT in d_r_arch_init().
*/
/* NOTE: requires caller to be under PRESERVE_FLOATING_POINT_STATE */
opnd_t
opnd_create_immed_double(double i)
{
opnd_t opnd;
opnd.kind = IMMED_DOUBLE_kind;
/* Note that manipulating floats and doubles by copying in this way can
* result in using FP load/store instructions which can trigger any pending
* FP exception (i#386).
*/
opnd.value.immed_double = i;
/* currently only used for implicit constants that have no size */
opnd.size = OPSZ_0;
return opnd;
}
#endif
#ifdef AARCH64
opnd_t
opnd_create_immed_pred_constr(dr_pred_constr_type_t p)
{
opnd_t opnd;
opnd.kind = IMMED_INTEGER_kind;
opnd.aux.flags = DR_OPND_IS_PREDICATE_CONSTRAINT;
opnd.value.immed_int = p;
/* all predicate constraints have 5 bits*/
opnd.size = OPSZ_5b;
return opnd;
}
#endif
opnd_t
opnd_create_immed_float_for_opcode(uint opcode)
{
opnd_t opnd;
uint float_value;
opnd.kind = IMMED_FLOAT_kind;
/* avoid any fp instrs (xref i#386) */
float_value = opnd_immed_float_arch(opcode);
*(uint *)(&opnd.value.immed_float) = float_value;
/* currently only used for implicit constants that have no size */
opnd.size = OPSZ_0;
return opnd;
}
ptr_int_t
opnd_get_immed_int(opnd_t opnd)
{
CLIENT_ASSERT(opnd_is_immed_int(opnd), "opnd_get_immed_int called on non-immed-int");
return opnd.value.immed_int;
}
int64
opnd_get_immed_int64(opnd_t opnd)
{
IF_X64(CLIENT_ASSERT(false, "32-bit only"));
CLIENT_ASSERT(opnd_is_immed_int64(opnd),
"opnd_get_immed_int64 called on non-multi-part-immed-int");
return (((uint64)(uint)opnd.value.immed_int_multi_part.high) << 32) |
(uint64)(uint)opnd.value.immed_int_multi_part.low;
}
/* NOTE: requires caller to be under PRESERVE_FLOATING_POINT_STATE */
float
opnd_get_immed_float(opnd_t opnd)
{
CLIENT_ASSERT(opnd_is_immed_float(opnd),
"opnd_get_immed_float called on non-immed-float");
/* note that manipulating floats is dangerous - see case 4360
* this return shouldn't require any fp state, though
*/
return opnd.value.immed_float;
}
#ifndef WINDOWS
/* XXX i#4488: x87 floating point immediates should be double precision.
* Type double currently not included for Windows because sizeof(opnd_t) does
* not equal EXPECTED_SIZEOF_OPND, triggering the ASSERT in d_r_arch_init().
*/
double
opnd_get_immed_double(opnd_t opnd)
{
CLIENT_ASSERT(opnd_is_immed_double(opnd),
"opnd_get_immed_double called on non-immed-float");
return opnd.value.immed_double;
}
#endif
/* address operands */
/* N.B.: seg_selector is a segment selector, not a SEG_ constant */
opnd_t
opnd_create_far_pc(ushort seg_selector, app_pc pc)
{
opnd_t opnd;
opnd.kind = FAR_PC_kind;
opnd.aux.far_pc_seg_selector = seg_selector;
opnd.value.pc = pc;
return opnd;
}
opnd_t
opnd_create_instr_ex(instr_t *instr, opnd_size_t size, ushort shift)
{
opnd_t opnd;
opnd.kind = INSTR_kind;
opnd.value.instr = instr;
opnd.aux.shift = shift;
opnd.size = size;
return opnd;
}
opnd_t
opnd_create_instr(instr_t *instr)
{
return opnd_create_instr_ex(instr, OPSZ_PTR, 0);
}
opnd_t
opnd_create_far_instr(ushort seg_selector, instr_t *instr)
{
opnd_t opnd;
opnd.kind = FAR_INSTR_kind;
opnd.aux.far_pc_seg_selector = seg_selector;
opnd.value.instr = instr;
return opnd;
}
DR_API
opnd_t
opnd_create_mem_instr(instr_t *instr, short disp, opnd_size_t data_size)
{
opnd_t opnd;
opnd.kind = MEM_INSTR_kind;
opnd.size = data_size;
opnd.aux.disp = disp;
opnd.value.instr = instr;
return opnd;
}
app_pc
opnd_get_pc(opnd_t opnd)
{
if (opnd_is_pc(opnd))
return opnd.value.pc;
else {
SYSLOG_INTERNAL_ERROR("opnd type is %d", opnd.kind);
CLIENT_ASSERT(false, "opnd_get_pc called on non-pc");
return NULL;
}
}
ushort
opnd_get_segment_selector(opnd_t opnd)
{
if (opnd_is_far_pc(opnd) || opnd_is_far_instr(opnd)) {
return opnd.aux.far_pc_seg_selector;
}
CLIENT_ASSERT(false, "opnd_get_segment_selector called on invalid opnd type");
return REG_INVALID;
}
instr_t *
opnd_get_instr(opnd_t opnd)
{
CLIENT_ASSERT(opnd_is_instr(opnd) || opnd_is_mem_instr(opnd),
"opnd_get_instr called on non-instr");
return opnd.value.instr;
}
DR_API
ushort
opnd_get_shift(opnd_t opnd)
{
CLIENT_ASSERT(opnd_is_near_instr(opnd), "opnd_get_shift called on non-near-instr");
return opnd.aux.shift;
}
short
opnd_get_mem_instr_disp(opnd_t opnd)
{
CLIENT_ASSERT(opnd_is_mem_instr(opnd),
"opnd_get_mem_instr_disp called on non-mem-instr");
return opnd.aux.disp;
}
/* Base+displacement+scaled index operands */
opnd_t
opnd_create_base_disp_ex(reg_id_t base_reg, reg_id_t index_reg, int scale, int disp,
opnd_size_t size, bool encode_zero_disp, bool force_full_disp,
bool disp_short_addr)
{
return opnd_create_far_base_disp_ex(REG_NULL, base_reg, index_reg, scale, disp, size,
encode_zero_disp, force_full_disp,
disp_short_addr);
}
opnd_t
opnd_create_base_disp(reg_id_t base_reg, reg_id_t index_reg, int scale, int disp,
opnd_size_t size)
{
return opnd_create_far_base_disp_ex(REG_NULL, base_reg, index_reg, scale, disp, size,
false, false, false);
}
static inline void
opnd_set_disp_helper(opnd_t *opnd, int disp)
{
IF_ARM_ELSE(
{
if (disp < 0) {
opnd->aux.flags |= DR_OPND_NEGATED;
opnd->value.base_disp.disp = -disp;
} else
opnd->value.base_disp.disp = disp;
},
{ opnd->value.base_disp.disp = disp; });
}
opnd_t
opnd_create_far_base_disp_ex(reg_id_t seg, reg_id_t base_reg, reg_id_t index_reg,
int scale, int disp, opnd_size_t size, bool encode_zero_disp,
bool force_full_disp, bool disp_short_addr)
{
opnd_t opnd;
opnd.kind = BASE_DISP_kind;
CLIENT_ASSERT(size < OPSZ_LAST_ENUM, "opnd_create_*base_disp*: invalid size");
opnd.size = size;
CLIENT_ASSERT(scale == 0 || scale == 1 || scale == 2 || scale == 4 || scale == 8,
"opnd_create_*base_disp*: invalid scale");
IF_X86(CLIENT_ASSERT(index_reg == REG_NULL || scale > 0,
"opnd_create_*base_disp*: index requires scale"));
CLIENT_ASSERT(
seg == REG_NULL IF_X86(|| (seg >= REG_START_SEGMENT && seg <= REG_STOP_SEGMENT)),
"opnd_create_*base_disp*: invalid segment");
CLIENT_ASSERT(base_reg <= REG_LAST_ENUM, "opnd_create_*base_disp*: invalid base");
CLIENT_ASSERT(index_reg <= REG_LAST_ENUM, "opnd_create_*base_disp*: invalid index");
CLIENT_ASSERT_BITFIELD_TRUNCATE(SCALE_SPECIFIER_BITS, scale,
"opnd_create_*base_disp*: invalid scale");
/* reg_id_t is now a ushort, but we can only accept low values */
CLIENT_ASSERT_BITFIELD_TRUNCATE(REG_SPECIFIER_BITS, base_reg,
"opnd_create_*base_disp*: invalid base");
CLIENT_ASSERT_BITFIELD_TRUNCATE(REG_SPECIFIER_BITS, index_reg,
"opnd_create_*base_disp*: invalid index");
IF_X86_ELSE({ opnd.aux.segment = seg; },
{
opnd.aux.flags = 0;
CLIENT_ASSERT(
disp == 0 || index_reg == REG_NULL,
"opnd_create_*base_disp*: cannot have both disp and index");
});
opnd_set_disp_helper(&opnd, disp);
opnd.value.base_disp.base_reg = base_reg;
#ifdef X86
if (reg_is_strictly_zmm(index_reg)) {
opnd.value.base_disp.index_reg = index_reg - DR_REG_START_ZMM;
opnd.value.base_disp.index_reg_is_zmm = 1;
} else {
opnd.value.base_disp.index_reg = index_reg;
opnd.value.base_disp.index_reg_is_zmm = 0;
}
#else
opnd.value.base_disp.index_reg = index_reg;
#endif
#if defined(ARM)
if (scale > 1) {
opnd.value.base_disp.shift_type = DR_SHIFT_LSL;
opnd.value.base_disp.shift_amount_minus_1 =
/* we store the amount minus one */
(scale == 2 ? 0 : (scale == 4 ? 1 : 2));
} else {
opnd.value.base_disp.shift_type = DR_SHIFT_NONE;
opnd.value.base_disp.shift_amount_minus_1 = 0;
}
#elif defined(AARCH64)
opnd.value.base_disp.pre_index = true;
opnd.value.base_disp.extend_type = DR_EXTEND_UXTX;
opnd.value.base_disp.scaled = false;
#elif defined(X86)
opnd.value.base_disp.scale = (byte)scale;
opnd.value.base_disp.encode_zero_disp = (byte)encode_zero_disp;
opnd.value.base_disp.force_full_disp = (byte)force_full_disp;
opnd.value.base_disp.disp_short_addr = (byte)disp_short_addr;
#endif
return opnd;
}
opnd_t
opnd_create_far_base_disp(reg_id_t seg, reg_id_t base_reg, reg_id_t index_reg, int scale,
int disp, opnd_size_t size)
{
return opnd_create_far_base_disp_ex(seg, base_reg, index_reg, scale, disp, size,
false, false, false);
}
#ifdef ARM
opnd_t
opnd_create_base_disp_arm(reg_id_t base_reg, reg_id_t index_reg,
dr_shift_type_t shift_type, uint shift_amount, int disp,
dr_opnd_flags_t flags, opnd_size_t size)
{
opnd_t opnd;
opnd.kind = BASE_DISP_kind;
CLIENT_ASSERT(size < OPSZ_LAST_ENUM, "opnd_create_*base_disp*: invalid size");
opnd.size = size;
CLIENT_ASSERT(disp == 0 || index_reg == REG_NULL,
"opnd_create_base_disp_arm: cannot have both disp and index");
CLIENT_ASSERT(base_reg <= REG_LAST_ENUM, "opnd_create_base_disp_arm: invalid base");
CLIENT_ASSERT(index_reg <= REG_LAST_ENUM, "opnd_create_base_disp_arm: invalid index");
/* reg_id_t is now a ushort, but we can only accept low values */
CLIENT_ASSERT_BITFIELD_TRUNCATE(REG_SPECIFIER_BITS, base_reg,
"opnd_create_base_disp_arm: invalid base");
CLIENT_ASSERT_BITFIELD_TRUNCATE(REG_SPECIFIER_BITS, index_reg,
"opnd_create_base_disp_arm: invalid index");
opnd.value.base_disp.base_reg = base_reg;
opnd.value.base_disp.index_reg = index_reg;
opnd_set_disp_helper(&opnd, disp);
/* Set the flags before the shift as the shift will change the flags */
opnd.aux.flags = flags;
if (!opnd_set_index_shift(&opnd, shift_type, shift_amount))
CLIENT_ASSERT(false, "opnd_create_base_disp_arm: invalid shift type/amount");
return opnd;
}
#endif
#ifdef AARCH64
opnd_t
opnd_create_base_disp_aarch64_common(reg_id_t base_reg, reg_id_t index_reg,
byte element_size, dr_extend_type_t extend_type,
bool scaled, int disp, dr_opnd_flags_t flags,
opnd_size_t size, uint shift)
{
opnd_t opnd;
opnd.kind = BASE_DISP_kind;
CLIENT_ASSERT(size < OPSZ_LAST_ENUM, "opnd_create_*base_disp*: invalid size");
opnd.size = size;
CLIENT_ASSERT(disp == 0 || index_reg == REG_NULL,
"opnd_create_base_disp_aarch64: cannot have both disp and index");
CLIENT_ASSERT(base_reg <= REG_LAST_ENUM,
"opnd_create_base_disp_aarch64: invalid base");
CLIENT_ASSERT(index_reg <= REG_LAST_ENUM,
"opnd_create_base_disp_aarch64: invalid index");
/* reg_id_t is now a ushort, but we can only accept low values */
CLIENT_ASSERT_BITFIELD_TRUNCATE(REG_SPECIFIER_BITS, base_reg,
"opnd_create_base_disp_aarch64: invalid base");
CLIENT_ASSERT_BITFIELD_TRUNCATE(REG_SPECIFIER_BITS, index_reg,
"opnd_create_base_disp_aarch64: invalid index");
opnd.value.base_disp.base_reg = base_reg;
opnd.value.base_disp.index_reg = index_reg;
opnd.value.base_disp.pre_index = false;
opnd.value.base_disp.element_size = element_size;
opnd_set_disp_helper(&opnd, disp);
opnd.aux.flags = flags;
if (!opnd_set_index_extend_value(&opnd, extend_type, scaled, shift))
CLIENT_ASSERT(false, "opnd_create_base_disp_aarch64: invalid extend type");
return opnd;
}
opnd_t
opnd_create_vector_base_disp_aarch64(reg_id_t base_reg, reg_id_t index_reg,
opnd_size_t element_size,
dr_extend_type_t extend_type, bool scaled, int disp,
dr_opnd_flags_t flags, opnd_size_t size, uint shift)
{
byte internal_element_size = 0;
switch (element_size) {
case OPSZ_4: internal_element_size = ELEMENT_SIZE_SINGLE; break;
case OPSZ_8: internal_element_size = ELEMENT_SIZE_DOUBLE; break;
default:
CLIENT_ASSERT(false,
"opnd_create_vector_base_disp_aarch64: invalid element size");
}
CLIENT_ASSERT(reg_is_z(base_reg) || reg_is_z(index_reg),
"opnd_create_vector_base_disp_aarch64: at least one of the base "
"register and index register must be a vector register");
flags |= DR_OPND_IS_VECTOR;
return opnd_create_base_disp_aarch64_common(base_reg, index_reg,
internal_element_size, extend_type,
scaled, disp, flags, size, shift);
}
opnd_t
opnd_create_base_disp_shift_aarch64(reg_id_t base_reg, reg_id_t index_reg,
dr_extend_type_t extend_type, bool scaled, int disp,
dr_opnd_flags_t flags, opnd_size_t size, uint shift)
{
return opnd_create_base_disp_aarch64_common(base_reg, index_reg, 0, extend_type,
scaled, disp, flags, size, shift);
}
opnd_t
opnd_create_base_disp_aarch64(reg_id_t base_reg, reg_id_t index_reg,
dr_extend_type_t extend_type, bool scaled, int disp,
dr_opnd_flags_t flags, opnd_size_t size)
{
const uint shift = scaled ? opnd_size_to_shift_amount(size) : 0;
return opnd_create_base_disp_aarch64_common(base_reg, index_reg, 0, extend_type,
scaled, disp, flags, size, shift);
}
#endif
#undef opnd_get_base
#undef opnd_get_disp
#undef opnd_get_index
#undef opnd_get_scale
#undef opnd_get_segment
reg_id_t
opnd_get_base(opnd_t opnd)
{
return OPND_GET_BASE(opnd);
}
int
opnd_get_disp(opnd_t opnd)
{
return OPND_GET_DISP(opnd);
}
reg_id_t
opnd_get_index(opnd_t opnd)
{
return OPND_GET_INDEX(opnd);
}
int
opnd_get_scale(opnd_t opnd)
{
return OPND_GET_SCALE(opnd);
}
reg_id_t
opnd_get_segment(opnd_t opnd)
{
return OPND_GET_SEGMENT(opnd);
}
#define opnd_get_base OPND_GET_BASE
#define opnd_get_disp OPND_GET_DISP
#define opnd_get_index OPND_GET_INDEX
#define opnd_get_scale OPND_GET_SCALE
#define opnd_get_segment OPND_GET_SEGMENT
#ifdef ARM
dr_shift_type_t
opnd_get_index_shift(opnd_t opnd, uint *amount DR_PARAM_OUT)
{
if (amount != NULL)
*amount = 0;
if (!opnd_is_base_disp(opnd)) {
CLIENT_ASSERT(false, "opnd_get_index_shift called on invalid opnd type");
return DR_SHIFT_NONE;
}
if (amount != NULL && opnd.value.base_disp.shift_type != DR_SHIFT_NONE)
*amount = opnd.value.base_disp.shift_amount_minus_1 + 1;
return opnd.value.base_disp.shift_type;
}
bool
opnd_set_index_shift(opnd_t *opnd, dr_shift_type_t shift, uint amount)
{
if (!opnd_is_base_disp(*opnd)) {
CLIENT_ASSERT(false, "opnd_set_index_shift called on invalid opnd type");
return false;
}
switch (shift) {
case DR_SHIFT_NONE:
if (amount != 0) {
/* Called from opnd_create_base_disp_arm() so we have a generic msg */
CLIENT_ASSERT(false, "opnd index shift: invalid shift amount");
return false;
}
opnd->value.base_disp.shift_amount_minus_1 = 0; /* so opnd_same matches */
break;
case DR_SHIFT_LSL:
case DR_SHIFT_ROR:
/* XXX: T32 only allows shift value [1, 3] */
if (amount < 1 || amount > 31) {
CLIENT_ASSERT(false, "opnd index shift: invalid shift amount");
return false;
}
opnd->value.base_disp.shift_amount_minus_1 = (byte)amount - 1;
break;
case DR_SHIFT_LSR:
case DR_SHIFT_ASR:
if (amount < 1 || amount > 32) {
CLIENT_ASSERT(false, "opnd index shift: invalid shift amount");
return false;
}
opnd->value.base_disp.shift_amount_minus_1 = (byte)amount - 1;
break;
case DR_SHIFT_RRX:
if (amount != 1) {
CLIENT_ASSERT(false, "opnd index shift: invalid shift amount");
return false;
}
opnd->value.base_disp.shift_amount_minus_1 = (byte)amount - 1;
break;
default: CLIENT_ASSERT(false, "opnd index shift: invalid shift type"); return false;
}
if (shift == DR_SHIFT_NONE)
opnd->aux.flags &= ~DR_OPND_SHIFTED;
else
opnd->aux.flags |= DR_OPND_SHIFTED;
opnd->value.base_disp.shift_type = shift;
return true;
}
#endif /* ARM */
#ifdef AARCH64
uint
opnd_size_to_shift_amount(opnd_size_t size)
{
switch (size) {
default:
ASSERT(false);
/* fall-through */
case OPSZ_1: return 0;
case OPSZ_2: return 1;
case OPSZ_4: return 2;
case OPSZ_0: /* fall-through */
case OPSZ_8: return 3;
case OPSZ_16: return 4;
case OPSZ_32: return 5;
case OPSZ_64: return 6;
}
}
dr_extend_type_t
opnd_get_index_extend(opnd_t opnd, DR_PARAM_OUT bool *scaled, DR_PARAM_OUT uint *amount)
{
dr_extend_type_t extend = DR_EXTEND_UXTX;
bool scaled_out = false;
uint amount_out = 0;
if (!opnd_is_base_disp(opnd))
CLIENT_ASSERT(false, "opnd_get_index_shift called on invalid opnd type");
else {
extend = opnd.value.base_disp.extend_type;
scaled_out = opnd.value.base_disp.scaled;
if (scaled_out)
amount_out = opnd.value.base_disp.scaled_value;
}
if (scaled != NULL)
*scaled = scaled_out;
if (amount != NULL)
*amount = amount_out;
return extend;
}
bool
opnd_set_index_extend_value(opnd_t *opnd, dr_extend_type_t extend, bool scaled,