diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index d1a0efd11df285..d541b92427820a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -254,7 +254,7 @@ config MACH_JZ4740
 
 config MACH_JZ4780
 	bool "Ingenic JZ4780 based machines"
-	select SYS_HAS_CPU_MIPS32_R1
+	select SYS_HAS_CPU_MIPS32_R2
 	select SYS_SUPPORTS_32BIT_KERNEL
 	select SYS_SUPPORTS_LITTLE_ENDIAN
 	select SYS_SUPPORTS_ZBOOT_UART16550
@@ -272,7 +272,6 @@ config MACH_JZ4780
 	select USE_OF
 	select LIBFDT
 	select SYS_SUPPORTS_SMP
-	select CONFIG_XBURST_CACHE
 
 config LANTIQ
 	bool "Lantiq based platforms"
@@ -351,7 +350,6 @@ config MIPS_MALTA
 	select I8253
 	select I8259
 	select MIPS_BONITO64
-	select MIPS_CPU_SCACHE
 	select PCI_GT64XXX_PCI0
 	select MIPS_MSC
 	select SWAP_IO_SPACE
@@ -1619,7 +1617,6 @@ config CPU_BMIPS4380
 
 config CPU_BMIPS5000
 	bool
-	select MIPS_CPU_SCACHE
 	select SYS_SUPPORTS_SMP
 	select SYS_SUPPORTS_HOTPLUG_CPU
 
@@ -1930,14 +1927,22 @@ config IP22_CPU_SCACHE
 	bool
 	select BOARD_SCACHE
 
-#
-# Support for a MIPS32 / MIPS64 style S-caches
-#
+choice
+	prompt "Cache type"
+	default MIPS_CPU_SCACHE
+
 config MIPS_CPU_SCACHE
-	bool
+	bool "Support for a MIPS32 / MIPS64 style S-caches"
+	depends on (CPU_BMIPS5000 || MACH_JZ4780 || MIPS_MALTA)
 	select BOARD_SCACHE
 	select MIPS_L1_CACHE_SHIFT_6
 
+config XBURST_CACHE
+	bool "Support for Ingenic's Xburst cache"
+	depends on MACH_JZ4780
+
+endchoice
+
 config R5000_CPU_SCACHE
 	bool
 	select BOARD_SCACHE
@@ -1967,11 +1972,7 @@ config CPU_R4K_FPU
 
 config CPU_R4K_CACHE_TLB
 	bool
-	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON || MACH_JZ4780)
-
-config XBURST_CACHE
-	bool
-	default y if (MACH_JZ4780)
+	default y if !(CPU_R3000 || CPU_R8000 || CPU_SB1 || CPU_TX39XX || CPU_CAVIUM_OCTEON || (MACH_JZ4780 && XBURST_CACHE))
 
 config MIPS_MT_SMP
 	bool "MIPS MT SMP support (1 TC on each available VPE)"
diff --git a/arch/mips/configs/ci20_android_defconfig b/arch/mips/configs/ci20_android_defconfig
index ec401a15b3d26f..1095447fed85af 100644
--- a/arch/mips/configs/ci20_android_defconfig
+++ b/arch/mips/configs/ci20_android_defconfig
@@ -198,6 +198,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_UID_STAT=y
+CONFIG_JZ_VPU=y
 CONFIG_EEPROM_INGENIC=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
@@ -436,7 +437,6 @@ CONFIG_PROC_KCORE=y
 # CONFIG_PROC_PAGE_MONITOR is not set
 CONFIG_TMPFS=y
 CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_CONFIGFS_FS=y
 CONFIG_UBIFS_FS=y
 CONFIG_UBIFS_FS_ADVANCED_COMPR=y
 CONFIG_PSTORE=y
diff --git a/arch/mips/include/asm/mach-jz4740/jz4780/cpu-feature-overrides.h b/arch/mips/include/asm/mach-jz4740/jz4780/cpu-feature-overrides.h
index c427657fba74b0..fb17d42e134138 100644
--- a/arch/mips/include/asm/mach-jz4740/jz4780/cpu-feature-overrides.h
+++ b/arch/mips/include/asm/mach-jz4740/jz4780/cpu-feature-overrides.h
@@ -34,7 +34,7 @@
 #define cpu_has_ic_fills_f_dc	0
 #define cpu_has_pindexed_dcache 0
 #define cpu_has_mips32r1	1
-#define cpu_has_mips32r2	0
+#define cpu_has_mips32r2	1
 #define cpu_has_mips64r1	0
 #define cpu_has_mips64r2	0
 #define cpu_has_dsp		0
diff --git a/arch/mips/include/asm/rjzcache.h b/arch/mips/include/asm/rjzcache.h
index 1f3afce0c6c7c7..6ef4d2aca4d6cc 100644
--- a/arch/mips/include/asm/rjzcache.h
+++ b/arch/mips/include/asm/rjzcache.h
@@ -86,7 +86,7 @@ do {						\
 do {						\
 	unsigned long tmp;			\
 	__asm__ __volatile__(			\
-	".set mips32\n\t"			\
+	".set mips32r2\n\t"			\
 	"mfc0 %0, $16, 7\n\t"			\
 	"nop\n\t"				\
 	"ori %0, 2\n\t"				\
diff --git a/drivers/staging/imgtec/ci20/syslocal.h b/drivers/staging/imgtec/ci20/syslocal.h
index 4c0e58af0cb300..423fc7509b64e4 100644
--- a/drivers/staging/imgtec/ci20/syslocal.h
+++ b/drivers/staging/imgtec/ci20/syslocal.h
@@ -63,6 +63,8 @@ extern "C" {
 
 #include <linux/platform_device.h>
 
+#include<dt-bindings/clock/jzcpm_pwc.h>
+
 #define	PVR_XB47_TIMING_CPM
 
 #if !defined(NO_HARDWARE) && \
@@ -146,11 +148,6 @@ PVRSRV_ERROR SysDvfsDeinitialize(SYS_SPECIFIC_DATA *psSysSpecificData);
 
 #define	PWC_GPU	"gpu"
 
-void *cpm_pwc_get(char *name);
-void cpm_pwc_put(void *handle);
-int cpm_pwc_enable(void *handle);
-int cpm_pwc_disable(void *handle);
-
 #if defined(__cplusplus)
 }
 #endif
diff --git a/drivers/staging/imgtec/ci20/sysutils.c b/drivers/staging/imgtec/ci20/sysutils.c
index 7d89492ffb558b..c204f8e161b1fb 100644
--- a/drivers/staging/imgtec/ci20/sysutils.c
+++ b/drivers/staging/imgtec/ci20/sysutils.c
@@ -68,37 +68,6 @@ CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 
 extern struct platform_device *gpsPVRLDMDev;
 
-/*
- * Stubs for cpm_pwc_* functions present in the Linux 3.0.8 kernel, but not
- * in 3.18.
- */
-
-void *cpm_pwc_get(char *name)
-{
-	(void) name;
-
-	return (void *)(uintptr_t)1;
-}
-
-void cpm_pwc_put(void *handle)
-{
-	(void) handle;
-}
-
-int cpm_pwc_enable(void *handle)
-{
-	(void) handle;
-
-	return 0;
-}
-
-int cpm_pwc_disable(void *handle)
-{
-	(void) handle;
-
-	return 0;
-}
-
 static PVRSRV_ERROR PowerLockWrap(SYS_SPECIFIC_DATA *psSysSpecData, IMG_BOOL bTryLock)
 {
 	if (!in_interrupt())