diff --git a/vslib/inc/Sai.h b/vslib/inc/Sai.h index 9a809e5692ee..3dca22d5a3a9 100644 --- a/vslib/inc/Sai.h +++ b/vslib/inc/Sai.h @@ -5,6 +5,7 @@ #include "EventQueue.h" #include "EventPayloadNotification.h" #include "ResourceLimiterContainer.h" +#include "CorePortIndexMapContainer.h" #include "meta/Meta.h" @@ -416,5 +417,7 @@ namespace saivs std::shared_ptr m_laneMapContainer; std::shared_ptr m_resourceLimiterContainer; + + std::shared_ptr m_corePortIndexMapContainer; }; } diff --git a/vslib/inc/SwitchConfig.h b/vslib/inc/SwitchConfig.h index 652428e217f6..c2593842d246 100644 --- a/vslib/inc/SwitchConfig.h +++ b/vslib/inc/SwitchConfig.h @@ -3,6 +3,7 @@ #include "LaneMap.h" #include "EventQueue.h" #include "ResourceLimiter.h" +#include "CorePortIndexMap.h" #include #include @@ -79,5 +80,7 @@ namespace saivs std::shared_ptr m_eventQueue; std::shared_ptr m_resourceLimiter; + + std::shared_ptr m_corePortIndexMap; }; } diff --git a/vslib/inc/saivs.h b/vslib/inc/saivs.h index 2f612746f5f8..0cc0f80ccf94 100644 --- a/vslib/inc/saivs.h +++ b/vslib/inc/saivs.h @@ -44,6 +44,19 @@ extern "C" { */ #define SAI_KEY_VS_HOSTIF_USE_TAP_DEVICE "SAI_VS_HOSTIF_USE_TAP_DEVICE" +/** + * @def SAI_KEY_VS_CORE_PORT_INDEX_MAP_FILE + * + * For VOQ systems if specified in profile.ini it should point to eth interface to + * core and core port index map as port name:core_index,core_port_index + * + * Example: + * eth1:0,1 + * eth17:1,1 + * + */ +#define SAI_KEY_VS_CORE_PORT_INDEX_MAP_FILE "SAI_VS_CORE_PORT_INDEX_MAP_FILE" + #define SAI_VALUE_VS_SWITCH_TYPE_BCM56850 "SAI_VS_SWITCH_TYPE_BCM56850" #define SAI_VALUE_VS_SWITCH_TYPE_BCM81724 "SAI_VS_SWITCH_TYPE_BCM81724" #define SAI_VALUE_VS_SWITCH_TYPE_MLNX2700 "SAI_VS_SWITCH_TYPE_MLNX2700" diff --git a/vslib/src/Makefile.am b/vslib/src/Makefile.am index d548712d2bce..81f2e40fbacc 100644 --- a/vslib/src/Makefile.am +++ b/vslib/src/Makefile.am @@ -50,7 +50,10 @@ libSaiVS_a_SOURCES = \ SwitchState.cpp \ SwitchBCM56850.cpp \ SwitchBCM81724.cpp \ - SwitchMLNX2700.cpp + SwitchMLNX2700.cpp \ + CorePortIndexMap.cpp \ + CorePortIndexMapContainer.cpp \ + CorePortIndexMapFileParser.cpp libsaivs_la_SOURCES = \ sai_vs_fdb.cpp \ diff --git a/vslib/src/Sai.cpp b/vslib/src/Sai.cpp index d46a52045ca6..2d3c046f6bf9 100644 --- a/vslib/src/Sai.cpp +++ b/vslib/src/Sai.cpp @@ -7,6 +7,7 @@ #include "HostInterfaceInfo.h" #include "SwitchConfigContainer.h" #include "ResourceLimiterParser.h" +#include "CorePortIndexMapFileParser.h" #include "swss/logger.h" @@ -112,6 +113,10 @@ sai_status_t Sai::initialize( m_laneMapContainer = LaneMapFileParser::parseLaneMapFile(laneMapFile); + auto *corePortIndexMapFile = service_method_table->profile_get_value(0, SAI_KEY_VS_CORE_PORT_INDEX_MAP_FILE); + + m_corePortIndexMapContainer = CorePortIndexMapFileParser::parseCorePortIndexMapFile(corePortIndexMapFile); + auto *resourceLimiterFile = service_method_table->profile_get_value(0, SAI_KEY_VS_RESOURCE_LIMITER_FILE); m_resourceLimiterContainer = ResourceLimiterParser::parseFromFile(resourceLimiterFile); @@ -154,6 +159,7 @@ sai_status_t Sai::initialize( sc->m_laneMap = m_laneMapContainer->getLaneMap(sc->m_switchIndex); sc->m_eventQueue = m_eventQueue; sc->m_resourceLimiter = m_resourceLimiterContainer->getResourceLimiter(sc->m_switchIndex); + sc->m_corePortIndexMap = m_corePortIndexMapContainer->getCorePortIndexMap(sc->m_switchIndex); auto scc = std::make_shared(); diff --git a/vslib/src/SwitchStateBase.cpp b/vslib/src/SwitchStateBase.cpp index 91430aa8bd4c..5314fe118ae1 100644 --- a/vslib/src/SwitchStateBase.cpp +++ b/vslib/src/SwitchStateBase.cpp @@ -2574,7 +2574,50 @@ sai_status_t SwitchStateBase::create_system_ports( { attr.value.s32 = SAI_SYSTEM_PORT_TYPE_LOCAL; - // TODO Need to set local port oid attribute + // This is system port of local port. Set the oid of the local port corresponding to this system port + + auto map = m_switchConfig->m_corePortIndexMap; + + if (map) + { + auto& corePortIndexVector = map->getCorePortIndexVector(); + size_t n_map = corePortIndexVector.size(); + size_t idx; + + for (idx = 0; idx < n_map; idx++) + { + if (corePortIndexVector[idx][0] == sys_port_cfg_list[i].attached_core_index && + corePortIndexVector[idx][1] == sys_port_cfg_list[i].attached_core_port_index && + idx < m_port_list.size()) + { + // m_port_list entries are in the same order as lane maps. The core port index maps are in the + // same order as the lane maps. So m_port_list at the index corresponding to the core port index map + // will be the port corresponding to the system port with core port index matching core port index map + + sai_attribute_t lp_attr; + + lp_attr.id = SAI_SYSTEM_PORT_ATTR_PORT; + lp_attr.value.oid = m_port_list.at(idx); + + CHECK_STATUS(set(SAI_OBJECT_TYPE_SYSTEM_PORT, system_port_id, &lp_attr)); + + break; + } + } + + if (idx >= n_map) + { + SWSS_LOG_ERROR("Core port index not found for system port %d for switch %s. Local port oid is not set!", + sys_port_cfg_list[i].port_id, + sai_serialize_object_id(m_switch_id).c_str()); + } + } + else + { + SWSS_LOG_ERROR("Core port index map for switch %s is NULL. Local port oid is not set for system port %d!", + sai_serialize_object_id(m_switch_id).c_str(), + sys_port_cfg_list[i].port_id); + } } CHECK_STATUS(set(SAI_OBJECT_TYPE_SYSTEM_PORT, system_port_id, &attr));