core: arm32: fix native_intr_handler()

[jenswi-linaro]

Prior to this patch when a native interrupt was received in IRQ mode
r12 wasn't saved on the stack. There's two problems with that:

1. r12 isn't a callee preserved register, but must be preserved
   in an exception handler
2. Without r12 an odd number of registers was saved breaking the
   8 byte alignment of the stack pointer

This patch fixes this by also saving r12 on the stack when handling a
native interrupt in IRQ mode.

Signed-off-by: Jens Wiklander [email protected]

[prime-zeng]

@jenswi-linaro it seems this is a important fix, what is the impact if i don't have this patch applied?

[jenswi-linaro]

Random crashes in secure world. However, only if OP-TEE is configured for GICv3.

[prime-zeng]

@jenswi-linaro Got it, thank you.

[MrVan]

R12 is used as an IP register in AAPCS, I think no need to save/restore it. But considering the 8bytes aligned stack requirement, it is ok use r12 or other registers.

Reviewed-by: Peng Fan <[email protected]>

[jenswi-linaro]

@MrVan , thanks.
r12/ip isn't preserved by the callee so this register can be corrupted by c-functions used in the interrupt handler. This is bad since the function being interrupted could have been using r12/ip internally between function calls.

[prime-zeng]

Hi jens, from your explanation, the other non-callee preserved registers should also be saved in interrupt handler.

[jenswi-linaro]

Yes, all non-callee preserved registers are saved in the interrupt handler with this change.

[jenswi-linaro]

Rebased, tag applied.