From a88cdd8dd2de90ba46fde034f10ea92ca410b7f0 Mon Sep 17 00:00:00 2001 From: Yuandongliang <42736386+sleep-zzz@users.noreply.github.com> Date: Tue, 24 Sep 2024 01:03:23 +0800 Subject: [PATCH] fix(ftb,uftb): Fallthrough address comparison canceled during prediction (#3630) --- src/main/scala/xiangshan/frontend/FTB.scala | 9 --------- src/main/scala/xiangshan/frontend/FauFTB.scala | 6 ------ 2 files changed, 15 deletions(-) diff --git a/src/main/scala/xiangshan/frontend/FTB.scala b/src/main/scala/xiangshan/frontend/FTB.scala index f7dcebd0d9..0479182a3e 100644 --- a/src/main/scala/xiangshan/frontend/FTB.scala +++ b/src/main/scala/xiangshan/frontend/FTB.scala @@ -525,15 +525,6 @@ class FTB(implicit p: Parameters) extends BasePredictor with FTBParams with BPUU val multi_way = PriorityMux(Seq.tabulate(numWays)(i => ((total_hits_reg(i)) -> i.asUInt(log2Ceil(numWays).W)))) val multi_hit_selectEntry = PriorityMux(Seq.tabulate(numWays)(i => ((total_hits_reg(i)) -> read_entries_reg(i)))) - //Check if the entry read by ftbBank is legal. - for (n <- 0 to numWays -1 ) { - val req_pc_reg = RegEnable(io.req_pc.bits, io.req_pc.valid) - val ftb_entry_fallThrough = read_entries(n).getFallThrough(req_pc_reg) - when(read_entries(n).valid && total_hits(n) && io.s1_fire){ - assert(req_pc_reg + (2*PredictWidth).U >= ftb_entry_fallThrough, s"FTB sram entry in way${n} fallThrough address error!") - } - } - val u_total_hits = VecInit((0 until numWays).map(b => ftb.io.r.resp.data(b).tag === u_req_tag && ftb.io.r.resp.data(b).entry.valid && RegNext(io.update_access))) val u_hit = u_total_hits.reduce(_||_) diff --git a/src/main/scala/xiangshan/frontend/FauFTB.scala b/src/main/scala/xiangshan/frontend/FauFTB.scala index 505bef8721..ea600647f5 100644 --- a/src/main/scala/xiangshan/frontend/FauFTB.scala +++ b/src/main/scala/xiangshan/frontend/FauFTB.scala @@ -121,12 +121,6 @@ class FauFTB(implicit p: Parameters) extends BasePredictor with FauFTBParams { io.fauftb_entry_out := s1_hit_fauftbentry io.fauftb_entry_hit_out := s1_hit && fauftb_enable - // Illegal check for FTB entry reading - val uftb_read_fallThrough = s1_hit_fauftbentry.getFallThrough(s1_pc_dup(0)) - when(io.s1_fire(0) && s1_hit){ - assert(s1_pc_dup(0) + (FetchWidth * 4).U >= uftb_read_fallThrough, s"FauFTB entry fallThrough address error!") - } - // assign metas io.out.last_stage_meta := resp_meta.asUInt resp_meta.hit := RegEnable(RegEnable(s1_hit, io.s1_fire(0)), io.s2_fire(0))