3.9.0-stm32mp-r1.1

The following changes since commit dbfbd96:

plat-stm32mp1: pm: new CFG_STM32MP15_PM_CONTEX_VERSION (2020-06-02 16:47:06 +0200)

are available in the Git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.9.0-stm32mp-r1.1

for you to fetch changes up to 33cd0d1:

stm32mp1: calibration: fix the limit calibration value (2020-07-02 16:17:42 +0200)

---

Lionel Debieve (3):
stm32_bsec: remove flag on write otp function
stm32_tim: add timeout during capture
stm32mp1: calibration: fix the limit calibration value

Patrick Delaunay (1):
plat-stm32mp1: SiP SMC service for BSEC access

core/arch/arm/plat-stm32mp1/drivers/stm32mp1_calib.c | 5 +++++
core/arch/arm/plat-stm32mp1/nsec-service/stm32mp1_smc.h | 4 +++-
core/drivers/stm32_bsec.c | 2 +-
core/drivers/stm32_tim.c | 21 ++++++++++++++++-----
core/include/drivers/stm32_bsec.h | 8 --------
5 files changed, 25 insertions(+), 15 deletions(-)

3.9.0-stm32mp-r1

The following changes since commit af141c6:

Update CHANGELOG for 3.9.0 (2020-05-22 08:48:32 +0200)

are available in the Git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.9.0-stm32mp-r1

for you to fetch changes up to dbfbd96:

plat-stm32mp1: pm: new CFG_STM32MP15_PM_CONTEX_VERSION (2020-06-02 16:47:06 +0200)

---

Update on official 3.9.0 OP-TEE OS release

Most of STM32MP1 code have been upstream including the SCMI
server and protocol (clock and reset) management.

On top of 3.9.0:

• Update device tree to align with Linux kernel 3.9.0
• Add support of CPU dynamic frequency switch (for Linux kernel DVFS)
• Add low power management (including DDR services)
• Add SIP specific services :
  • Power domain control
  • Calibration management

---

Etienne Carriere (41):
CONTRIBUTING: add contributing guide
dt-bindings: update stm32mp bindings
dts: stm32mp1: update DTS files
plat-stm32mp1: define platform flavors per DTS file
stm32_bsec: implement DT NVMEM layout
plat-stm32mp1: use NVMEM layout to find OTP location
plat-stm32mp1: enhance trace message on security hardening
plat-stm32mp1: optimize test on rcc secure hardening
core: panic: platform specific panic sequence
core: mm: allow compatible memory mappings to overlay
plat-stm32mp1: clocks: without DTB, RCC must be secure
plat-stm32mp1: chip and platform identification
plat-stm32mp1: MPU operating point
plat-stm32mp1: SiP SMC service for RCC and MPU operating point
plat-stm32mp1: SiP SMC service for PWR access
stm32_tim: introduce STM32 TIM driver
plat-stm32mp1: platform source clock calibration
plat-stm32mp1: SiP SMC service for clock calibration
stm32_iwdg: introduce IWDG watchdog driver
stm32_rtc: introduce STM32 RTC driver
palt-stm32mp1: BKPRAM driver support
plat-stm32mp1: STGEN resources for system time reference
plat-stm32mp1: DDR driver for low power sequence
core: gic: register pm callbacks
core: interrupt: API for PMR and interrupt priority reconfiguration
core: gic: API for PMR and interrupt priority reconfiguration
core: gic: gic_init_setup() loads GIC configuration
core: gic: allow GIC set set priority on non-secure interrupts
core: mobj: initialize earlier generic memory object
core: mobj: add a pager constraint on mobj_{mm|phys}_get_va
core: MEM_AREA_ROM_SEC maps secure read only cached memory
core: sm: support LPAE in monitor context backup
stm32mp1: optimize xlat table allocation
plat-stm32mp1: rcc header can be included in assembly source file
plat-stm32mp1: clock PM
plat-stm32mp1: clock: prepare support for STM32MP1_USE_MPU0_RESET
plat-stm32mp1: power management full support
plat-stm32mp1: enable retention regulators only for standby with DDR
plat-stm32mp1: SiP SMC services for low power
plat-stm32mp1: optimize resident memory size
plat-stm32mp1: pm: new CFG_STM32MP15_PM_CONTEX_VERSION

Jens Wiklander (1):
config.mk: fix CFG_OPTEE_REVISION_MINOR

Lionel Debieve (1):
plat-stm32mp1: clock: fix panic when clock is disabled

CONTRIBUTING.md | 30 ++++
core/arch/arm/dts/stm32mp15-pinctrl.dtsi | 914 ++++++------------------------------------------------------------------------------------------
core/arch/arm/dts/stm32mp151.dtsi | 1327 +++++++++++++++++---------------------------------------------------------------------------------------------------------------------------
core/arch/arm/dts/stm32mp153.dtsi | 31 +---
core/arch/arm/dts/stm32mp157.dtsi | 24 ---
core/arch/arm/dts/stm32mp157a-dk1.dts | 29 ++--
core/arch/arm/dts/stm32mp157a-ed1.dts | 46 +++++
core/arch/arm/dts/stm32mp157a-ev1.dts | 23 +++
core/arch/arm/dts/stm32mp157c-dk2.dts | 95 +++-------
core/arch/arm/dts/stm32mp157c-ed1.dts | 373 +++-------------------------------------
core/arch/arm/dts/stm32mp157c-ev1.dts | 350 +------------------------------------
core/arch/arm/dts/stm32mp157d-dk1.dts | 49 ++++++
core/arch/arm/dts/stm32mp157d-ed1.dts | 46 +++++
core/arch/arm/dts/stm32mp157d-ev1.dts | 22 +++
core/arch/arm/dts/stm32mp157f-dk2.dts | 55 ++++++
core/arch/arm/dts/stm32mp157f-ed1.dts | 51 ++++++
core/arch/arm/dts/stm32mp157f-ev1.dts | 22 +++
core/arch/arm/dts/stm32mp15xa.dtsi | 13 ++
core/arch/arm/dts/stm32mp15xc.dtsi | 3 +
core/arch/arm/dts/stm32mp15xd.dtsi | 19 ++
core/arch/arm/dts/stm32mp15xf.dtsi | 21 +++
core/arch/arm/dts/stm32mp15xx-dkx.dtsi | 692 +++++++++++++++++++++++++++++--------------------------------------------
core/arch/arm/dts/stm32mp15xx-edx.dtsi | 478 +++++++++++++++++++++++++++++++++++++++++++++++++++
core/arch/arm/dts/stm32mp15xx-evx.dtsi | 71 ++++++++
core/arch/arm/dts/stm32mp15xxaa-pinctrl.dtsi | 3 +-
core/arch/arm/dts/stm32mp15xxab-pinctrl.dtsi | 2 +-
core/arch/arm/dts/stm32mp15xxac-pinctrl.dtsi | 3 +-
core/arch/arm/dts/stm32mp15xxad-pinctrl.dtsi | 2 +-
core/arch/arm/include/arm32.h | 11 +-
core/arch/arm/include/mm/core_mmu.h | 3 +
core/arch/arm/include/sm/pm.h | 4 +
core/arch/arm/mm/core_mmu.c | 18 +-
core/arch/arm/mm/mobj.c | 5 +-
core/arch/arm/plat-stm32mp1/boot_api.h | 2 +
core/arch/arm/plat-stm32mp1/conf.mk | 59 ++++++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_calib.c | 501 +++++++++++++++++++++++++++++++++++++++++++++++++++++
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_clk.c | 1268 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_ddrc.c | 469 ++++++++++++++++++++++++++++++++++++++++++++++++++
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_ddrc.h | 219 +++++++++++++++++++++++
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pwr.h | 31 +++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_rcc.h | 35 +++-
core/arch/arm/plat-stm32mp1/drivers/sub.mk | 2 +
core/arch/arm/plat-stm32mp1/main.c | 316 +++++++++++++++++++++++++++++++++-
core/arch/arm/plat-stm32mp1/nsec-service/low_power_svc.c | 152 ++++++++++++++++
core/arch/arm/plat-stm32mp1/nsec-service/low_power_svc.h | 55 ++++++
core/arch/arm/plat-stm32mp1/nsec-service/pwr_svc.c | 89 ++++++++++
core/arch/arm/plat-stm32mp1/nsec-service/pwr_svc.h | 22 +++
core/arch/arm/plat-stm32mp1/nsec-service/rcc_svc.c | 195 +++++++++++++++++++++
core/arch/arm/plat-stm32mp1/nsec-service/rcc_svc.h | 30 ++++
core/arch/arm/plat-stm32mp1/nsec-service/stm32mp1_smc.h | 196 ++++++++++++++++++++-
core/arch/arm/plat-stm32mp1/nsec-service/stm32mp1_svc_setup.c | 79 ++++++++-
core/arch/arm/plat-stm32mp1/nsec-service/sub.mk | 3 +
core/arch/arm/plat-stm32mp1/platform_config.h | 131 +++++++++++++-
core/arch/arm/plat-stm32mp1/pm/context.c | 521 +++++++++++++++++++++++++++++++++++++++++++++++++++++++
core/arch/arm/plat-stm32mp1/pm/context.h | 102 +++++++++++
core/arch/arm/plat-stm32mp1/pm/context_asm_defines.c | 28 +++
core/arch/arm/plat-stm32mp1/pm/low_power.c | 609 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
core/arch/arm/plat-stm32mp1/pm/pm_helpers.S | 740 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
core/arch/arm/plat-stm32mp1/pm/power.h | 27 +++
core/arch/arm/plat-stm32mp1/pm/power_config.c | 252 +++++++++++++++++++++++++++
core/arch/arm/plat-stm32mp1/pm/psci.c | 224 ++++++++++++++++++++----
core/arch/arm/plat-stm32mp1/pm/sub.mk | 6 +
core/arch/arm/plat-stm32mp1/reset.S | 30 +++-
core/arch/arm/plat-stm32mp1/scmi_server.c | 81 ++++++++-
core/arch/arm/plat-stm32mp1/shared_resources.c | 31 ++--
core/arch/arm/plat-stm32mp1/stm32_util.h | 54 ++++++
core/arch/arm/plat-stm32mp1/stm32mp_pm.h | 21 +++
core/arch/arm/sm/pm_a32.S | 83 ++++-----
core/arch/arm/tee/entry_std.c | 2 +-
core/drivers/gic.c | 225 ++++++++++++++++++++++--
core/drivers/stm32_bsec.c | 130 ++++++++++++--
core/drivers/stm32_iwdg.c | 313 +++++++++++++++++++++++++++++++...

3.3.0-stm32mp-r3.2

The following changes since commit 2aed5c9:

stm32mp1: pm: add PMIC context save/restore sequences (2020-03-17 20:41:12 +0100)

are available in the Git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.3.0-stm32mp-r3.2

for you to fetch changes up to 1f63ea8:

plat-stm32mp1: pm: new CFG_STM32MP15_PM_CONTEX_VERSION (2020-06-02 16:57:28 +0200)

---

Bernard Puel (1):
CONTRIBUTING: add contributing guide to STMicroelectronics/optee_os repository

Etienne Carriere (1):
plat-stm32mp1: pm: new CFG_STM32MP15_PM_CONTEX_VERSION

Lionel Debieve (1):
ddr: stm32mp1_ddr: increase delay after DLL clock switch

CONTRIBUTING.md | 30 ++++++++++++++++++++++++++++++
core/arch/arm/plat-stm32mp1/conf.mk | 5 +++++
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_ddrc.c | 2 +-
core/arch/arm/plat-stm32mp1/pm/context.c | 15 +++++++++++++--
4 files changed, 49 insertions(+), 3 deletions(-)
create mode 100644 CONTRIBUTING.md

3.3.0-stm32mp-r3.1

The following changes since commit 2730943:

plat-stm32mp1: pm: fix cache invalidation before sysram restoration (2020-01-17 14:36:46 +0100)

are available in the Git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.3.0-stm32mp-r3.1

for you to fetch changes up to 2aed5c9:

stm32mp1: pm: add PMIC context save/restore sequences (2020-03-17 20:41:12 +0100)

---

Lionel Debieve (1):
plat-stm32mp1: clk: fix get_rate error on CK_MPU

Nicolas Le Bayon (9):
pmic: stm32mp_pmic: fix missing considered error case
ddr: stm32mp1_ddr: dissociate SR modes from DDR type
stm32mp1: add DDR Self Refresh adaptive management
fdts: stm32mp1: add cpu-supply information for CPU0
stm32mp1: get CPU supply name
stm32mp1: pm: fix mpu/mcu/pll3/pll4 resume
stm32mp1: save/restore clock context for STOP mode transition
clk: stm32mp1: get vddcore voltage from OPP frequency
stm32mp1: pm: add PMIC context save/restore sequences

core/arch/arm/fdts/stm32mp157a-dk1.dts | 6 ++++-
core/arch/arm/fdts/stm32mp157c-ed1.dts | 6 ++++-
core/arch/arm/fdts/stm32mp157c.dtsi | 8 +++++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_clk.c | 180 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----------------
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_clk.h | 7 ++++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_ddrc.c | 77 +++++++++++++++++++++++++++++++++++++++++-------------
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_ddrc.h | 15 ++++++++---
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.c | 64 ++++++++++++++++++++++++++++++++++++++++++++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.h | 12 ++++++++-
core/arch/arm/plat-stm32mp1/main.c | 11 ++++----
core/arch/arm/plat-stm32mp1/pm/context.c | 115 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-----
core/arch/arm/plat-stm32mp1/pm/low_power.c | 8 +++---
12 files changed, 443 insertions(+), 66 deletions(-)

3.3.0 STM32MP release 3.0

The following changes since commit 2d2ec97:

stm32mp1: timer: fix CSI input property typo (2019-09-06 14:51:25 +0200)

are available in the Git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.3.0-stm32mp-r3

for you to fetch changes up to 2730943:

plat-stm32mp1: pm: fix cache invalidation before sysram restoration (2020-01-17 14:36:46 +0100)

---

STM32MP release 3.0

---

Etienne Carriere (12):
plat-stm32mp1: fix build warning in stm32_get_iwdg_otp_config()
plat-stm32mp1: fix build warning in get_part_number()
plat-stm32mp1: fix build warning in stm32mp1_set_clksrc()
plat-stm32mp1: fix build warning in pll1 settings computation functions
plat-stm32mp1: clk: fix build warning on unused parent clock names
plat-stm32mp1: clk: fix build warning gating of io compensation for pm
plat-stm32mp1: pm: fix build warning for reset_other_core()
plat-stm32mp1: pm: fix inline function stm32mp_dt_pmic_status()
drivers: stm32_bsec: fix build warning
drivers: stm32_i2c: fix build warning
plat-stm32mp1: pm: basic traces in tee ram restoration
plat-stm32mp1: pm: fix cache invalidation before sysram restoration

Lionel Debieve (3):
i2c: stm32_i2c: use fdt_read_uint32_default()
rtc: stm32_rtc: fix time elapsed computation
clk: stm32mp1: keep RTCAPB clock always enabled

Nicolas Le Bayon (41):
i2c: stm32_i2c: use saved I2C timing if already calculated
fdts: stm32mp1: add USBPHYC node
stm32mp1: support of STM32MP15x Rev.Z
clk: stm32mp1: manage disabled oscillator in device tree
iwdg: stm32: Fix OTP status management
pmic: stm32mp1_pmic: factorize DT support and clean
watchdog: stm32_iwdg: do not refresh watchdog if not enabled
pmic: stpmic1: set stpmic1_is_regulator_enabled() as boolean
fdts: stm32mp1: non-secure property on applicable NVMEM nodes
bsec: determine OTP non-secure accesses with new property
stm32mp1: fix SoC information function
fdts: stm32mp1: add nvmem_layout node and OTP definitions
bsec: add function to get OTP information in NVMEM layout data
stm32mp1: create new helpers for DT access
stm32mp1: new way to access platform OTP
i2c: stm32_i2c: allow any bus frequency
fdts: stm32mp157c: set i2c4 bus freq to 400KHz
fdts: stm32mp1: correct DT compilation warnings
fdts: stm32mp1: Add support for LPLV STOP
bsec: truncate OTP overlapping lower and upper regions
stm32mp1: deactivate IO compensation in case of STOP mode
rtc: stm32_rtc: fix fraction difference computation
pmic: stm32mp: improve driver usage
drivers: stpmic1: Fix LDO3 voltage table
drivers: stpmic1: complete boot-on configuration services
pmic: stm32mp: extend boot-on configuration to "always-on" regulators
i2c: stm32_i2c: save timing/frequency inside handle structure
fdts: stm32mp1: add opp_table node
stm32mp1: check OPP HW support
stm32mp: get OPP parameters from DT
clk: stm32mp1: compute and manage pll1 settings
stm32mp1: add PLL1 settings in context
pmic: stm32mp: export stm32mp_dt_pmic_status()
stm32mp1: add PLL1 settings initialization
clk: stm32mp1: add a service to configure PLL1 from OPP frequency
clk: stm32mp1: add an OPP round service
stm32mp1: services: implement RCC OPP services
ddr: stm32mp1_ddr: handle address/command output driver in self refresh
ddr: stm32mp1_ddr: manage software and automatic self refresh
stm32mp1: low_power: manage self refresh in CSTOP for LPDDR2
stm32mp1: services: add BSEC permanent write lock service

core/arch/arm/fdts/stm32mp15-ddr.dtsi | 4 +-
core/arch/arm/fdts/stm32mp157a-dk1.dts | 34 +++-
core/arch/arm/fdts/stm32mp157c-ed1.dts | 51 +++++-
core/arch/arm/fdts/stm32mp157c-security.dtsi | 52 ++++--
core/arch/arm/fdts/stm32mp157c.dtsi | 38 +++++
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_clk.c | 669 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_clk.h | 9 +-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_clkfunc.c | 58 +++----
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_ddrc.c | 20 +++
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_ddrc.h | 1 +
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.c | 76 ++++-----
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.h | 7 +-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_syscfg.c | 97 +++++++++++
core/arch/arm/plat-stm32mp1/drivers/sub.mk | 1 +
core/arch/arm/plat-stm32mp1/main.c | 162 ++++++++++++++++--
core/arch/arm/plat-stm32mp1/platform_config.h | 49 ++++--
core/arch/arm/plat-stm32mp1/pm/context.c | 45 ++++-
core/arch/arm/plat-stm32mp1/pm/low_power.c | 10 +-
core/arch/arm/plat-stm32mp1/pm/pm_helpers.S | 143 +++++++++++++---
core/arch/arm/plat-stm32mp1/pm/power_config.c | 4 +-
core/arch/arm/plat-stm32mp1/service/bsec_svc.c | 4 +
core/arch/arm/plat-stm32mp1/service/rcc_svc.c | 30 +++-
core/arch/arm/plat-stm32mp1/service/rcc_svc.h | 3 +-
core/arch/arm/plat-stm32mp1/service/stm32mp1_smc.h | 16 ++
core/arch/arm/plat-stm32mp1/service/stm32mp1_svc_setup.c | 5 +-
core/arch/arm/plat-stm32mp1/stm32_util.h | 20 ++-
core/arch/arm/plat-stm32mp1/stm32mp1_dt.c | 194 +++++++++++++++++++++-
core/arch/arm/plat-stm32mp1/stm32mp_dt.h | 10 +-
core/drivers/stm32_bsec.c | 188 +++++++++++++++++++--
core/drivers/stm32_i2c.c | 232 +++++++++++++++-----------
core/drivers/stm32_iwdg.c | 25 +--
core/drivers/stm32_rtc.c | 39 ++---
core/drivers/stpmic1.c | 25 ++-
core/include/drivers/stm32_bsec.h | 13 ++
core/include/drivers/stm32_i2c.h | 24 +--
core/include/drivers/stm32_iwdg.h | 6 +-
core/include/drivers/stpmic1.h | 27 +--
37 files changed, 2030 insertions(+), 361 deletions(-)
create mode 100644 core/arch/arm/plat-stm32mp1/drivers/stm32mp1_syscfg.c

3.3.0 STM32MP release 2.0

The following changes since commit be39311:

stm32mp1: enable retention regulators only for standby with DDR (2019-06-19 17:03:10 +0200)

are available in the Git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.3.0-stm32mp-r2

for you to fetch changes up to 2d2ec97:

stm32mp1: timer: fix CSI input property typo (2019-09-06 14:51:25 +0200)

---

STM32MP release 2.0

• Increase timer precision for calibration
• Update OTP management
• DDR setting v1.45 / alignment with latest CubeMX generation
• Decrease PLL1 frequency when switching in low power mode
• Many others corrections

---

Lionel Debieve (3):
fdts: stm32mp1: rework pwr node in device tree
stm32mp1: calib: Increase margin and check timer precision
stm32mp1: timer: fix CSI input property typo

Nicolas Le Bayon (16):
core: stm32_etzpc: do not lock SYSRAM secure size value
stm32mp1: independent reset sequence alignment
stm32mp1: isb() after dsb()
stm32mp1: independent reset: fix shutdown sequence
stm32mp1: strengthen independent reset sequence
bsec: remove value parameter from bsec_otp_lock()
bsec: improve bsec_wr_lock() and rename into bsec_read_permanent_lock()
bsec: update sticky lock functions
bsec: fix error and distributed status tests
fdts: stm32mp1: DDR config to v1.45
bsec: align function header syntax in whole driver
stm32mp1: pm: mask timer interrupt on second core
stm32mp1: define RCC_AHB6RSTSETR_GPURST in header
bsec: change OTP locked message log level in bsec_shadow_register()
stm32mp1: clk: reduce clock frequency during low power mode
bsec: remove bsec_mode_is_closed_device() service

core/arch/arm/fdts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi | 4 +-
core/arch/arm/fdts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi | 4 +-
core/arch/arm/fdts/stm32mp157a-dk1.dts | 6 ++-
core/arch/arm/fdts/stm32mp157c-ed1.dts | 6 ++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_calib.c | 48 ++++++++++++++--------
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_clk.c | 72 +++++++++++++++++++++++++++++++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_rcc.h | 3 ++
core/arch/arm/plat-stm32mp1/pm/context.c | 8 +++-
core/arch/arm/plat-stm32mp1/pm/low_power.c | 220 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----------------
core/arch/arm/plat-stm32mp1/pm/pm_helpers.S | 4 +-
core/arch/arm/plat-stm32mp1/stm32_util.h | 1 +
core/drivers/stm32_bsec.c | 331 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------------------------------------------------------------------------------------
core/drivers/stm32_etzpc.c | 2 -
core/drivers/stm32_iwdg.c | 6 +++
core/drivers/stm32_timer.c | 25 +++++++++---
core/include/drivers/stm32_bsec.h | 19 ++++-----
16 files changed, 474 insertions(+), 285 deletions(-)

3.3.0 STM32MP release 1.4

The following changes since commit c6725de:

bsec: fix value of BSEC_LOCK_PROGRAM service (2019-04-26 09:12:58 +0200)

are available in the Git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.3.0-stm32mp-r1.4

for you to fetch changes up to be39311:

stm32mp1: enable retention regulators only for standby with DDR (2019-06-19 17:03:10 +0200)

---

Nicolas Le Bayon (1):
stm32mp1: enable retention regulators only for standby with DDR

core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pwr.h | 4 +++-
core/arch/arm/plat-stm32mp1/pm/low_power.c | 22 +++++++++++++++-------
2 files changed, 18 insertions(+), 8 deletions(-)

3.3.0 STM32MP release 1.3

The following changes since commit 86e18bf:

fdts: stm32mp1: DDR config to v1.44 (2019-03-19 14:30:35 +0100)

are available in the Git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.3.0-stm32mp-r1.3

for you to fetch changes up to c6725de:

bsec: fix value of BSEC_LOCK_PROGRAM service (2019-04-26 09:12:58 +0200)

---

STM32MP release 1.3

---

Nicolas Le Bayon (1):
bsec: fix value of BSEC_LOCK_PROGRAM service

core/include/drivers/stm32_bsec.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

3.3.0 STM32MP release 1.2

The following changes since commit f42e00f:

core: stm32_etzpc: fix remaining build warning (2019-02-28 10:02:42 +0100)

are available in the git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.3.0-stm32mp-r1.2

for you to fetch changes up to 86e18bf:

fdts: stm32mp1: DDR config to v1.44 (2019-03-19 14:30:35 +0100)

---

STM32MP release 1.2

---

Lionel Debieve (2):
fdts: stm32mp1: DDR config to v1.43
fdts: stm32mp1: DDR config to v1.44

core/arch/arm/fdts/stm32mp15-ddr3-1x4Gb-1066-binG.dtsi | 11 +++++------
core/arch/arm/fdts/stm32mp15-ddr3-2x4Gb-1066-binG.dtsi | 8 +++-----
2 files changed, 8 insertions(+), 11 deletions(-)

3.3.0 STM32MP release 1.1

The following changes since commit 5f5cc70:

stm32mp1: add full support for platform (2019-01-30 08:44:34 +0100)

are available in the git repository at:

https://github.com/STMicroelectronics/optee_os.git tags/3.3.0-stm32mp-r1.1

for you to fetch changes up to f42e00f:

core: stm32_etzpc: fix remaining build warning (2019-02-28 10:02:42 +0100)

---

STM32MP release 1.1

---

Etienne Carriere (5):
stm32_i2c: correct standard mode min bus frequency
stm32mp1: fix platform build warnings
core: stm32_etzpc: fix build warnings
core: stpmic1: fix build warnings
core: stm32_etzpc: fix remaining build warning

Lionel Debieve (2):
stm32mp1: calibration: fix read of HSI trim value
stm32mp1: calibration: fix to find the best trim value

core/arch/arm/plat-stm32mp1/drivers/stm32mp1_calib.c | 61 ++++++++++++++++++++++++++++++++++++++++++-------------------
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_clk.c | 4 ----
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.c | 3 ++-
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_pmic.h | 8 ++++----
core/arch/arm/plat-stm32mp1/drivers/stm32mp1_rcc.h | 3 ++-
core/arch/arm/plat-stm32mp1/main.c | 4 ++--
core/arch/arm/plat-stm32mp1/pm/context.c | 7 ++++---
core/arch/arm/plat-stm32mp1/pm/psci.c | 2 +-
core/arch/arm/plat-stm32mp1/shared_resources.c | 6 +++---
core/drivers/stm32_etzpc.c | 4 ++--
core/drivers/stm32_i2c.c | 22 +++++++++++-----------
core/drivers/stpmic1.c | 17 +----------------
12 files changed, 74 insertions(+), 67 deletions(-)