diff --git a/kernel/src/arch/x86_64/kvm/vmx/vcpu.rs b/kernel/src/arch/x86_64/kvm/vmx/vcpu.rs index f35d59e6c..ae6f99baf 100644 --- a/kernel/src/arch/x86_64/kvm/vmx/vcpu.rs +++ b/kernel/src/arch/x86_64/kvm/vmx/vcpu.rs @@ -10,8 +10,8 @@ use crate::arch::mm::{LockedFrameAllocator, PageMapper}; use crate::arch::x86_64::mm::X86_64MMArch; use crate::arch::MMArch; -use crate::mm::{phys_2_virt, VirtAddr}; use crate::mm::{MemoryManagementArch, PageTableKind}; +use crate::mm::{PhysAddr, VirtAddr}; use crate::virt::kvm::vcpu::Vcpu; use crate::virt::kvm::vm::Vm; use alloc::alloc::Global; @@ -476,14 +476,9 @@ pub fn get_segment_base(gdt_base: *const u64, gdt_size: u16, segment_selector: u let base_mid = (descriptor & 0x0000_00FF_0000_0000) >> 16; let base_low = (descriptor & 0x0000_0000_FFFF_0000) >> 16; let segment_base = (base_high | base_mid | base_low) & 0xFFFFFFFF; - let virtaddr = phys_2_virt(segment_base.try_into().unwrap()) - .try_into() - .unwrap(); - debug!( - "segment_base={:x}", - phys_2_virt(segment_base.try_into().unwrap()) - ); - return virtaddr; + let virtaddr = unsafe { MMArch::phys_2_virt(PhysAddr::new(segment_base as usize)).unwrap() }; + + return virtaddr.data() as u64; } // FIXME: may have bug diff --git a/kernel/src/driver/disk/ahci/ahcidisk.rs b/kernel/src/driver/disk/ahci/ahcidisk.rs index 7d982060c..2bbb15141 100644 --- a/kernel/src/driver/disk/ahci/ahcidisk.rs +++ b/kernel/src/driver/disk/ahci/ahcidisk.rs @@ -1,4 +1,5 @@ -use super::{_port, hba::HbaCmdTable, virt_2_phys}; +use super::{_port, hba::HbaCmdTable}; +use crate::arch::MMArch; use crate::driver::base::block::block_device::{BlockDevice, BlockId}; use crate::driver::base::block::disk_info::Partition; use crate::driver::base::class::Class; @@ -19,7 +20,7 @@ use crate::driver::disk::ahci::hba::{ }; use crate::libs::rwlock::{RwLockReadGuard, RwLockWriteGuard}; use crate::libs::spinlock::SpinLock; -use crate::mm::{phys_2_virt, verify_area, VirtAddr}; +use crate::mm::{verify_area, MemoryManagementArch, PhysAddr, VirtAddr}; use log::error; use system_error::SystemError; @@ -86,9 +87,11 @@ impl AhciDisk { #[allow(unused_unsafe)] let cmdheader: &mut HbaCmdHeader = unsafe { - (phys_2_virt( + (MMArch::phys_2_virt(PhysAddr::new( volatile_read!(port.clb) as usize + slot as usize * size_of::(), - ) as *mut HbaCmdHeader) + )) + .unwrap() + .data() as *mut HbaCmdHeader) .as_mut() .unwrap() }; @@ -118,7 +121,9 @@ impl AhciDisk { #[allow(unused_unsafe)] let cmdtbl = unsafe { - (phys_2_virt(volatile_read!(cmdheader.ctba) as usize) as *mut HbaCmdTable) + (MMArch::phys_2_virt(PhysAddr::new(volatile_read!(cmdheader.ctba) as usize)) + .unwrap() + .data() as *mut HbaCmdTable) .as_mut() .unwrap() // 必须使用 as_mut ，得到的才是原来的变量 }; @@ -132,7 +137,10 @@ impl AhciDisk { // 8K bytes (16 sectors) per PRDT for i in 0..((volatile_read!(cmdheader.prdtl) - 1) as usize) { - volatile_write!(cmdtbl.prdt_entry[i].dba, virt_2_phys(buf_ptr) as u64); + volatile_write!( + cmdtbl.prdt_entry[i].dba, + MMArch::virt_2_phys(VirtAddr::new(buf_ptr)).unwrap().data() as u64 + ); cmdtbl.prdt_entry[i].dbc = 8 * 1024 - 1; volatile_set_bit!(cmdtbl.prdt_entry[i].dbc, 1 << 31, true); // 允许中断 prdt_entry.i buf_ptr += 8 * 1024; @@ -141,7 +149,10 @@ impl AhciDisk { // Last entry let las = (volatile_read!(cmdheader.prdtl) - 1) as usize; - volatile_write!(cmdtbl.prdt_entry[las].dba, virt_2_phys(buf_ptr) as u64); + volatile_write!( + cmdtbl.prdt_entry[las].dba, + MMArch::virt_2_phys(VirtAddr::new(buf_ptr)).unwrap().data() as u64 + ); cmdtbl.prdt_entry[las].dbc = ((tmp_count << 9) - 1) as u32; // 数据长度 volatile_set_bit!(cmdtbl.prdt_entry[las].dbc, 1 << 31, true); // 允许中断 @@ -233,9 +244,11 @@ impl AhciDisk { compiler_fence(Ordering::SeqCst); #[allow(unused_unsafe)] let cmdheader: &mut HbaCmdHeader = unsafe { - (phys_2_virt( + (MMArch::phys_2_virt(PhysAddr::new( volatile_read!(port.clb) as usize + slot as usize * size_of::(), - ) as *mut HbaCmdHeader) + )) + .unwrap() + .data() as *mut HbaCmdHeader) .as_mut() .unwrap() }; @@ -272,7 +285,9 @@ impl AhciDisk { #[allow(unused_unsafe)] let cmdtbl = unsafe { - (phys_2_virt(volatile_read!(cmdheader.ctba) as usize) as *mut HbaCmdTable) + (MMArch::phys_2_virt(PhysAddr::new(volatile_read!(cmdheader.ctba) as usize)) + .unwrap() + .data() as *mut HbaCmdTable) .as_mut() .unwrap() }; @@ -286,7 +301,10 @@ impl AhciDisk { // 8K bytes (16 sectors) per PRDT for i in 0..((volatile_read!(cmdheader.prdtl) - 1) as usize) { - volatile_write!(cmdtbl.prdt_entry[i].dba, virt_2_phys(buf_ptr) as u64); + volatile_write!( + cmdtbl.prdt_entry[i].dba, + MMArch::virt_2_phys(VirtAddr::new(buf_ptr)).unwrap().data() as u64 + ); volatile_write_bit!(cmdtbl.prdt_entry[i].dbc, (1 << 22) - 1, 8 * 1024 - 1); // 数据长度 volatile_set_bit!(cmdtbl.prdt_entry[i].dbc, 1 << 31, true); // 允许中断 buf_ptr += 8 * 1024; @@ -295,7 +313,10 @@ impl AhciDisk { // Last entry let las = (volatile_read!(cmdheader.prdtl) - 1) as usize; - volatile_write!(cmdtbl.prdt_entry[las].dba, virt_2_phys(buf_ptr) as u64); + volatile_write!( + cmdtbl.prdt_entry[las].dba, + MMArch::virt_2_phys(VirtAddr::new(buf_ptr)).unwrap().data() as u64 + ); volatile_set_bit!(cmdtbl.prdt_entry[las].dbc, 1 << 31, true); // 允许中断 volatile_write_bit!( cmdtbl.prdt_entry[las].dbc, diff --git a/kernel/src/driver/disk/ahci/hba.rs b/kernel/src/driver/disk/ahci/hba.rs index 849017a9c..aa324e654 100644 --- a/kernel/src/driver/disk/ahci/hba.rs +++ b/kernel/src/driver/disk/ahci/hba.rs @@ -2,7 +2,8 @@ use core::{intrinsics::size_of, ptr}; use core::sync::atomic::compiler_fence; -use crate::mm::phys_2_virt; +use crate::arch::MMArch; +use crate::mm::{MemoryManagementArch, PhysAddr}; /// 文件说明: 实现了 AHCI 中的控制器 HBA 的相关行为 @@ -198,7 +199,13 @@ impl HbaPort { unsafe { compiler_fence(core::sync::atomic::Ordering::SeqCst); - ptr::write_bytes(phys_2_virt(clb as usize) as *mut u64, 0, 1024); + ptr::write_bytes( + MMArch::phys_2_virt(PhysAddr::new(clb as usize)) + .unwrap() + .data() as *mut u64, + 0, + 1024, + ); } // 赋值 fis base address @@ -207,20 +214,36 @@ impl HbaPort { volatile_write!(self.fb, fb); unsafe { compiler_fence(core::sync::atomic::Ordering::SeqCst); - ptr::write_bytes(phys_2_virt(fb as usize) as *mut u64, 0, 256); + ptr::write_bytes( + MMArch::phys_2_virt(PhysAddr::new(fb as usize)) + .unwrap() + .data() as *mut u64, + 0, + 256, + ); } // 赋值 command table base address // Command table offset: 40K + 8K*portno // Command table size = 256*32 = 8K per port - let mut cmdheaders = phys_2_virt(clb as usize) as *mut u64 as *mut HbaCmdHeader; + let mut cmdheaders = unsafe { + MMArch::phys_2_virt(PhysAddr::new(clb as usize)) + .unwrap() + .data() + } as *mut u64 as *mut HbaCmdHeader; for ctbas_value in ctbas.iter().take(32) { volatile_write!((*cmdheaders).prdtl, 0); // 一开始没有询问，prdtl = 0（预留了8个PRDT项的空间） volatile_write!((*cmdheaders).ctba, *ctbas_value); // 这里限制了 prdtl <= 8, 所以一共用了256bytes，如果需要修改，可以修改这里 compiler_fence(core::sync::atomic::Ordering::SeqCst); unsafe { - ptr::write_bytes(phys_2_virt(*ctbas_value as usize) as *mut u64, 0, 256); + ptr::write_bytes( + MMArch::phys_2_virt(PhysAddr::new(*ctbas_value as usize)) + .unwrap() + .data() as *mut u64, + 0, + 256, + ); } cmdheaders = (cmdheaders as usize + size_of::()) as *mut HbaCmdHeader; } diff --git a/kernel/src/driver/disk/ahci/mod.rs b/kernel/src/driver/disk/ahci/mod.rs index 514b7b0f1..c72256efc 100644 --- a/kernel/src/driver/disk/ahci/mod.rs +++ b/kernel/src/driver/disk/ahci/mod.rs @@ -3,6 +3,7 @@ pub mod ahci_inode; pub mod ahcidisk; pub mod hba; +use crate::arch::MMArch; use crate::driver::base::block::disk_info::BLK_GF_AHCI; use crate::driver::block::cache::cached_block_device::BlockCache; // 依赖的rust工具包 @@ -18,7 +19,7 @@ use crate::driver::disk::ahci::{ }; use crate::libs::rwlock::RwLockWriteGuard; use crate::libs::spinlock::{SpinLock, SpinLockGuard}; -use crate::mm::virt_2_phys; +use crate::mm::{MemoryManagementArch, VirtAddr}; use ahci_inode::LockedAhciInode; use alloc::{boxed::Box, collections::LinkedList, format, string::String, sync::Arc, vec::Vec}; use core::sync::atomic::compiler_fence; @@ -97,13 +98,25 @@ pub fn ahci_init() -> Result<(), SystemError> { debug!(" Find a {:?} type Disk.", tp); // 计算地址 - let fb = virt_2_phys(ahci_port_base_vaddr + (32 << 10) + (j << 8)); - let clb = virt_2_phys(ahci_port_base_vaddr + (j << 10)); + let fb = unsafe { + MMArch::virt_2_phys(VirtAddr::new( + ahci_port_base_vaddr + (32 << 10) + (j << 8), + )) + } + .unwrap() + .data(); + let clb = unsafe { + MMArch::virt_2_phys(VirtAddr::new(ahci_port_base_vaddr + (j << 10))) + .unwrap() + .data() + }; let ctbas = (0..32) - .map(|x| { - virt_2_phys( + .map(|x| unsafe { + MMArch::virt_2_phys(VirtAddr::new( ahci_port_base_vaddr + (40 << 10) + (j << 13) + (x << 8), - ) as u64 + )) + .unwrap() + .data() as u64 }) .collect::>(); diff --git a/kernel/src/mm/mod.rs b/kernel/src/mm/mod.rs index 8f976a1de..e323cbe18 100644 --- a/kernel/src/mm/mod.rs +++ b/kernel/src/mm/mod.rs @@ -1,7 +1,7 @@ use alloc::sync::Arc; use system_error::SystemError; -use crate::{arch::MMArch, include::bindings::bindings::PAGE_OFFSET}; +use crate::arch::MMArch; use core::{ cmp, @@ -121,18 +121,6 @@ pub unsafe fn set_IDLE_PROCESS_ADDRESS_SPACE(address_space: Arc) { __IDLE_PROCESS_ADDRESS_SPACE = Some(address_space); } -/// @brief 将内核空间的虚拟地址转换为物理地址 -#[inline(always)] -pub fn virt_2_phys(addr: usize) -> usize { - addr - PAGE_OFFSET as usize -} - -/// @brief 将物理地址转换为内核空间的虚拟地址 -#[inline(always)] -pub fn phys_2_virt(addr: usize) -> usize { - addr + PAGE_OFFSET as usize -} - #[derive(Clone, Copy, Debug, Eq, Ord, PartialEq, PartialOrd, Hash)] pub enum PageTableKind { /// 用户可访问的页表 diff --git a/tools/debugging/logmonitor/src/backend/monitor/mm.rs b/tools/debugging/logmonitor/src/backend/monitor/mm.rs index 7da9b8930..3c0de957a 100644 --- a/tools/debugging/logmonitor/src/backend/monitor/mm.rs +++ b/tools/debugging/logmonitor/src/backend/monitor/mm.rs @@ -154,7 +154,7 @@ impl MMMonitorThread { info!("MMMonitorThread::run(): kmem_path: {:?}", self.kmem_path); let mut kmem_file = { - let mut file: File; + let file: File; loop { let f = self.open_kmem_file(); if f.is_ok() {