From e734a495cf752b7f35239cd30b6a709615e42844 Mon Sep 17 00:00:00 2001
From: Marat Dukhan <maratek@google.com>
Date: Fri, 9 Oct 2020 12:50:41 -0700
Subject: [PATCH] i64x2.eq instruction

---
 proposals/simd/BinarySIMD.md           |  1 +
 proposals/simd/ImplementationStatus.md |  1 +
 proposals/simd/NewOpcodes.md           | 24 ++++++++++++------------
 proposals/simd/SIMD.md                 |  1 +
 4 files changed, 15 insertions(+), 12 deletions(-)

diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md
index 4297afbd3..2f12f6f12 100644
--- a/proposals/simd/BinarySIMD.md
+++ b/proposals/simd/BinarySIMD.md
@@ -181,6 +181,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive).
 | `i32x4.min_u`              |    `0xb7`| -                  |
 | `i32x4.max_s`              |    `0xb8`| -                  |
 | `i32x4.max_u`              |    `0xb9`| -                  |
+| `i64x2.eq`                 |    `0xc0`| -                  |
 | `i64x2.neg`                |    `0xc1`| -                  |
 | `i64x2.shl`                |    `0xcb`| -                  |
 | `i64x2.shr_s`              |    `0xcc`| -                  |
diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md
index e50409829..123329270 100644
--- a/proposals/simd/ImplementationStatus.md
+++ b/proposals/simd/ImplementationStatus.md
@@ -149,6 +149,7 @@
 | `i32x4.min_u`              |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i32x4.max_s`              |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i32x4.max_u`              |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
+| `i64x2.eq`                 |                           |                    |                    |                    |                    |
 | `i64x2.neg`                |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i64x2.shl`                |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
 | `i64x2.shr_s`              |               `-msimd128` | :heavy_check_mark: |                    |                    | :heavy_check_mark: |
diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md
index e9aa7efb5..3e8c296fd 100644
--- a/proposals/simd/NewOpcodes.md
+++ b/proposals/simd/NewOpcodes.md
@@ -45,18 +45,18 @@
 | f64x2.extract_lane   | 0x21   |
 | f64x2.replace_lane   | 0x22   |
 
-| i8x16 Cmp  | opcode | i16x8 Cmp  | opcode | i32x4 Cmp  | opcode |
-| ---------- | ------ | ---------- | ------ | ---------- | ------ |
-| i8x16.eq   | 0x23   | i16x8.eq   | 0x2d   | i32x4.eq   | 0x37   |
-| i8x16.ne   | 0x24   | i16x8.ne   | 0x2e   | i32x4.ne   | 0x38   |
-| i8x16.lt_s | 0x25   | i16x8.lt_s | 0x2f   | i32x4.lt_s | 0x39   |
-| i8x16.lt_u | 0x26   | i16x8.lt_u | 0x30   | i32x4.lt_u | 0x3a   |
-| i8x16.gt_s | 0x27   | i16x8.gt_s | 0x31   | i32x4.gt_s | 0x3b   |
-| i8x16.gt_u | 0x28   | i16x8.gt_u | 0x32   | i32x4.gt_u | 0x3c   |
-| i8x16.le_s | 0x29   | i16x8.le_s | 0x33   | i32x4.le_s | 0x3d   |
-| i8x16.le_u | 0x2a   | i16x8.le_u | 0x34   | i32x4.le_u | 0x3e   |
-| i8x16.ge_s | 0x2b   | i16x8.ge_s | 0x35   | i32x4.ge_s | 0x3f   |
-| i8x16.ge_u | 0x2c   | i16x8.ge_u | 0x36   | i32x4.ge_u | 0x40   |
+| i8x16 Cmp  | opcode | i16x8 Cmp  | opcode | i32x4 Cmp  | opcode | i64x2 Cmp  | opcode |
+| ---------- | ------ | ---------- | ------ | ---------- | ------ | ---------- | ------ |
+| i8x16.eq   | 0x23   | i16x8.eq   | 0x2d   | i32x4.eq   | 0x37   | i64x2.eq   | 0xc0   |
+| i8x16.ne   | 0x24   | i16x8.ne   | 0x2e   | i32x4.ne   | 0x38   | i64x2.ne   |   -    |
+| i8x16.lt_s | 0x25   | i16x8.lt_s | 0x2f   | i32x4.lt_s | 0x39   | i64x2.lt_s |   -    |
+| i8x16.lt_u | 0x26   | i16x8.lt_u | 0x30   | i32x4.lt_u | 0x3a   | i64x2.lt_u |   -    |
+| i8x16.gt_s | 0x27   | i16x8.gt_s | 0x31   | i32x4.gt_s | 0x3b   | i64x2.gt_s |   -    |
+| i8x16.gt_u | 0x28   | i16x8.gt_u | 0x32   | i32x4.gt_u | 0x3c   | i64x2.gt_u |   -    |
+| i8x16.le_s | 0x29   | i16x8.le_s | 0x33   | i32x4.le_s | 0x3d   | i64x2.le_s |   -    |
+| i8x16.le_u | 0x2a   | i16x8.le_u | 0x34   | i32x4.le_u | 0x3e   | i64x2.le_u |   -    |
+| i8x16.ge_s | 0x2b   | i16x8.ge_s | 0x35   | i32x4.ge_s | 0x3f   | i64x2.ge_s |   -    |
+| i8x16.ge_u | 0x2c   | i16x8.ge_u | 0x36   | i32x4.ge_u | 0x40   | i64x2.ge_u |   -    |
 
 | f32x4 Cmp | opcode | f64x2 Cmp | opcode |
 | --------- | ------ | --------- | ------ |
diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md
index 0b6b9cde6..91d63990a 100644
--- a/proposals/simd/SIMD.md
+++ b/proposals/simd/SIMD.md
@@ -676,6 +676,7 @@ in each lane are `0` for `false` and all ones for `true`.
 * `i8x16.eq(a: v128, b: v128) -> v128`
 * `i16x8.eq(a: v128, b: v128) -> v128`
 * `i32x4.eq(a: v128, b: v128) -> v128`
+* `i64x2.eq(a: v128, b: v128) -> v128`
 * `f32x4.eq(a: v128, b: v128) -> v128`
 * `f64x2.eq(a: v128, b: v128) -> v128`