From 01bcd9c2f6eec28af7037278149f22959c43a6bc Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Tue, 2 Jun 2020 01:38:22 -0700 Subject: [PATCH 1/2] i32x4.dot_i16x8_s instruction --- proposals/simd/BinarySIMD.md | 1 + proposals/simd/ImplementationStatus.md | 2 ++ proposals/simd/NewOpcodes.md | 4 ++-- proposals/simd/SIMD.md | 5 +++++ 4 files changed, 10 insertions(+), 2 deletions(-) diff --git a/proposals/simd/BinarySIMD.md b/proposals/simd/BinarySIMD.md index 4297afbd3..bf6c963f5 100644 --- a/proposals/simd/BinarySIMD.md +++ b/proposals/simd/BinarySIMD.md @@ -181,6 +181,7 @@ For example, `ImmLaneIdx16` is a byte with values in the range 0-15 (inclusive). | `i32x4.min_u` | `0xb7`| - | | `i32x4.max_s` | `0xb8`| - | | `i32x4.max_u` | `0xb9`| - | +| `i32x4.dot_i16x8_s` | `0xba`| - | | `i64x2.neg` | `0xc1`| - | | `i64x2.shl` | `0xcb`| - | | `i64x2.shr_s` | `0xcc`| - | diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index e50409829..80fdd6256 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -149,6 +149,8 @@ | `i32x4.min_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | +| `i32x4.dot_i16x8_s` | | | | | | +| `i32x4.dot_i16x8_add_s` | | | | | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | diff --git a/proposals/simd/NewOpcodes.md b/proposals/simd/NewOpcodes.md index e9aa7efb5..1c1a89ee5 100644 --- a/proposals/simd/NewOpcodes.md +++ b/proposals/simd/NewOpcodes.md @@ -98,13 +98,13 @@ | i8x16.sub | 0x71 | i16x8.sub | 0x91 | i32x4.sub | 0xb1 | i64x2.sub | 0xd1 | | i8x16.sub_sat_s | 0x72 | i16x8.sub_sat_s | 0x92 | ---- sub_sat ---- | 0xb2 | ---- | 0xd2 | | i8x16.sub_sat_u | 0x73 | i16x8.sub_sat_u | 0x93 | ---- sub_sat ---- | 0xb3 | ---- | 0xd3 | -| ---- dot ---- | 0x74 | ---- dot ---- | 0x94 | ---- dot ---- | 0xb4 | ---- | 0xd4 | +| ------------- | 0x74 | ------------- | 0x94 | ------------- | 0xb4 | ---- | 0xd4 | | ---- mul ---- | 0x75 | i16x8.mul | 0x95 | i32x4.mul | 0xb5 | i64x2.mul | 0xd5 | | i8x16.min_s | 0x76 | i16x8.min_s | 0x96 | i32x4.min_s | 0xb6 | ---- | 0xd6 | | i8x16.min_u | 0x77 | i16x8.min_u | 0x97 | i32x4.min_u | 0xb7 | ---- | 0xd7 | | i8x16.max_s | 0x78 | i16x8.max_s | 0x98 | i32x4.max_s | 0xb8 | ---- | 0xd8 | | i8x16.max_u | 0x79 | i16x8.max_u | 0x99 | i32x4.max_u | 0xb9 | ---- | 0xd9 | -| ---- avgr_s ---- | 0x7a | ---- avgr_s ---- | 0x9a | ---- avgr_s ---- | 0xba | ---- | 0xda | +| ---------------- | 0x7a | ---------------- | 0x9a | i32x4.dot_i16x8_s | 0xba | ---- | 0xda | | i8x16.avgr_u | 0x7b | i16x8.avgr_u | 0x9b | ---- avgr_u ---- | 0xbb | ---- | 0xdb | | f32x4 Op | opcode | f64x2 Op | opcode | diff --git a/proposals/simd/SIMD.md b/proposals/simd/SIMD.md index 0b6b9cde6..014f47ebd 100644 --- a/proposals/simd/SIMD.md +++ b/proposals/simd/SIMD.md @@ -395,6 +395,11 @@ def S.mul(a, b): return S.lanewise_binary(mul, a, b) ``` +### Integer dot product +* `i32x4.dot_i16x8_s(a: v128, b: v128) -> v128` + +Lane-wise multiply signed 16-bit integers in the two input vectors and add adjacent pairs of the full 32-bit results. + ### Integer negation * `i8x16.neg(a: v128) -> v128` * `i16x8.neg(a: v128) -> v128` From 95e2d311a7b6bd6a9bb5964aa3136ec75cf44889 Mon Sep 17 00:00:00 2001 From: Marat Dukhan Date: Tue, 6 Oct 2020 10:55:48 -0700 Subject: [PATCH 2/2] Update proposals/simd/ImplementationStatus.md Co-authored-by: Thomas Lively <7121787+tlively@users.noreply.github.com> --- proposals/simd/ImplementationStatus.md | 1 - 1 file changed, 1 deletion(-) diff --git a/proposals/simd/ImplementationStatus.md b/proposals/simd/ImplementationStatus.md index 80fdd6256..5a80becdf 100644 --- a/proposals/simd/ImplementationStatus.md +++ b/proposals/simd/ImplementationStatus.md @@ -150,7 +150,6 @@ | `i32x4.max_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.max_u` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i32x4.dot_i16x8_s` | | | | | | -| `i32x4.dot_i16x8_add_s` | | | | | | | `i64x2.neg` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shl` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: | | `i64x2.shr_s` | `-msimd128` | :heavy_check_mark: | | | :heavy_check_mark: |