diff --git a/Documentation/devicetree/bindings/display/xlnx/xlnx,mixer.txt b/Documentation/devicetree/bindings/display/xlnx/xlnx,mixer.txt
index a9b1907354fc9f..0ed4705c7b4e0f 100644
--- a/Documentation/devicetree/bindings/display/xlnx/xlnx,mixer.txt
+++ b/Documentation/devicetree/bindings/display/xlnx/xlnx,mixer.txt
@@ -16,6 +16,7 @@ Required properties:
  - xlnx,dma-addr-width: dma address width, valid values are 32 and 64
  - xlnx,bpc: bits per component for mixer
  - xlnx,ppc: pixel per clock for mixer
+ - xlnx,num-layers: Total number of layers (excluding logo)
  - layer_[x]: node for [x] layer
  - xlnx,layer-id: layer identifier number
  - xlnx,vformat: video format for layer. See list of supported formats below.
@@ -24,6 +25,8 @@ Required properties:
    not required for overlay layers
  - xlnx,layer-max-height: max layer height, mandatory for master layer
    Not required for overlay layers
+ - xlnx,layer-primary: denotes the primary layer, should be mentioned in node
+   of layer which is expected to be constructing the primary plane
 
 Optional properties:
  - dmas: dma attach to layer, mandatory for master layer
@@ -37,6 +40,8 @@ Optional properties:
  - xlnx,layer-scale: denotes layer can be scale to 2x and 4x
  - xlnx,logo-layer: denotes logo layer is enable
  - logo: logo layer
+ - xlnx,bridge: phandle to bridge node.
+   This handle is required only when VTC is connected as bridge.
 
 Supported Formats:
 	Mixer IP Format		Driver supported Format String
@@ -76,6 +81,7 @@ Example:
 		xlnx,ppc = <2>;
 		xlnx,num-layers = <8>;
 		xlnx,logo-layer;
+		xlnx,bridge = <&v_tc_0>;
 
 		mixer_port: mixer_port@0 {
 			reg = <0>;
@@ -91,6 +97,7 @@ Example:
 			dmas = <&axi_vdma_0 0>;
 			dma-names = "dma0";
 			xlnx,layer-streaming;
+			xlnx,layer-primary;
 		};
 		xv_mix_overlay_1: layer_1 {
 			xlnx,layer-id = <1>;
diff --git a/Documentation/devicetree/bindings/display/xlnx/xlnx,pl-disp.txt b/Documentation/devicetree/bindings/display/xlnx/xlnx,pl-disp.txt
index 232a8a58397634..c6034bffc64abf 100644
--- a/Documentation/devicetree/bindings/display/xlnx/xlnx,pl-disp.txt
+++ b/Documentation/devicetree/bindings/display/xlnx/xlnx,pl-disp.txt
@@ -20,6 +20,10 @@ Required properties:
   Documentation/devicetree/bindings/graph.txt.
 - reg: Base address and size of device
 
+Optional properties:
+ - xlnx,bridge: bridge phandle
+   This handle is required only when VTC is connected as bridge.
+
 Example:
 
 	drm-pl-disp-drv {
@@ -27,6 +31,7 @@ Example:
 		dmas = <&axi_vdma_0 0>;
 		dma-names = "dma0";
 		xlnx,vformat = "YUYV";
+		xlnx,bridge = <&v_tc_0>;
 		pl_disp_port@0 {
 			reg = <0>;
 			endpoint {
diff --git a/Documentation/devicetree/bindings/display/xlnx/xlnx,vtc.txt b/Documentation/devicetree/bindings/display/xlnx/xlnx,vtc.txt
new file mode 100644
index 00000000000000..bafacea86b28cf
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/xlnx/xlnx,vtc.txt
@@ -0,0 +1,27 @@
+Device-Tree bindings for Xilinx Video Timing Controller(VTC)
+
+Xilinx VTC is a general purpose video timing generator and detector.
+The input side of this core automatically detects horizontal and
+vertical synchronization, pulses, polarity, blanking timing and active pixels.
+While on the output, it generates the horizontal and vertical blanking and
+synchronization pulses used with a standard video system including support
+for programmable pulse polarity.
+
+The core is commonly used with Video in to AXI4-Stream core to detect the
+format and timing of incoming video data or with AXI4-Stream to Video out core
+to generate outgoing video timing for downstream sinks like a video monitor.
+
+For details please refer to
+https://www.xilinx.com/support/documentation/ip_documentation/v_tc/v6_1/pg016_v_tc.pdf
+
+Required properties:
+ - compatible: value should be "xlnx,bridge-v-tc-6.1"
+ - reg: base address and size of the VTC IP
+ - xlnx,pixels-per-clock: Pixels per clock of the stream. Can be 1, 2 or 4.
+
+Example:
+	v_tc_0: v_tc@80030000 {
+			compatible = "xlnx,bridge-v-tc-6.1";
+			reg = <0x0 0x80030000 0x0 0x10000>;
+			xlnx,pixels-per-clock = <2>;
+	};
diff --git a/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt b/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
index a564e123949808..411633a9f08162 100644
--- a/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
+++ b/Documentation/devicetree/bindings/gpio/gpio-xilinx.txt
@@ -31,6 +31,7 @@ Optional properties:
 - xlnx,dout-default-2 : as above but the second channel
 - xlnx,gpio2-width : as above but for the second channel
 - xlnx,tri-default-2 : as above but for the second channel
+- xlnx,no-init : No initialisation at probe
 
 
 Example:
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
index a02ad793036f67..af0b9dc0e0092e 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
@@ -267,6 +267,10 @@
 	clocks = <&clk 75>;
 };
 
+&lpd_watchdog {
+	clocks = <&clk 75>;
+};
+
 &xilinx_ams {
 	clocks = <&clk 70>;
 };
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk.dtsi
index e62ccf74f61b5d..486f7cbe7c7ca0 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk.dtsi
@@ -225,6 +225,10 @@
 	clocks = <&clk250>;
 };
 
+&lpd_watchdog {
+	clocks = <&clk250>;
+};
+
 &zynqmp_dpsub {
 	clocks = <&dp_aclk>, <&dp_aud_clk>, <&drm_clock>;
 };
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
index 18ff9291f5110e..ba1df140c10028 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zc1751-xm016-dc2.dts
@@ -486,7 +486,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_spi0_default>;
 
-	spi0_flash0: flash0@0 {
+	spi0_flash0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "sst,sst25wf080", "jedec,spi-nor";
@@ -506,7 +506,7 @@
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_spi1_default>;
 
-	spi1_flash0: flash0@0 {
+	spi1_flash0: flash@0 {
 		#address-cells = <1>;
 		#size-cells = <1>;
 		compatible = "atmel,at45db041e", "atmel,at45", "atmel,dataflash";
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
index c130f77c351e50..e1f673c0d278ba 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
@@ -107,6 +107,7 @@
 
 	ltc2954: ltc2954 { /* U7 */
 		compatible = "lltc,ltc2954", "lltc,ltc2952";
+		status = "disabled";
 		trigger-gpios = <&gpio 26 GPIO_ACTIVE_LOW>; /* INT line - input */
 		/* If there is HW watchdog on mezzanine this signal should be connected there */
 		watchdog-gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; /* MIO on PAD */
@@ -473,7 +474,6 @@
 &sdhci0 {
 	status = "okay";
 	no-1-8-v;
-	broken-cd; /* CD has to be enabled by default */
 	disable-wp;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_sdhci0_default>;
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
index fb0c7bf0fd8089..bdcda3f1640948 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-revA.dts
@@ -442,6 +442,7 @@
 				temperature-stability = <50>;
 				factory-fout = <300000000>;
 				clock-frequency = <300000000>;
+				clock-output-names = "si570_user";
 			};
 		};
 		i2c@3 {
@@ -455,6 +456,7 @@
 				temperature-stability = <50>; /* copy from zc702 */
 				factory-fout = <156250000>;
 				clock-frequency = <148500000>;
+				clock-output-names = "si570_mgt";
 			};
 		};
 		i2c@4 {
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
index 58025ec64d8601..0f43148ff86a5c 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revA.dts
@@ -141,9 +141,9 @@
 			#address-cells = <1>;
 			#size-cells = <0>;
 			reg = <4>;
-			tca6416_u97: gpio@21 {
+			tca6416_u97: gpio@20 {
 				compatible = "ti,tca6416";
-				reg = <0x21>;
+				reg = <0x20>;
 				gpio-controller;
 				#gpio-cells = <2>;
 				/*
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
index c8e74734b34927..df2fe1674d6906 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu104-revC.dts
@@ -85,9 +85,9 @@
 	scl-gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
 	sda-gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
 
-	tca6416_u97: gpio@21 {
+	tca6416_u97: gpio@20 {
 		compatible = "ti,tca6416";
-		reg = <0x21>;
+		reg = <0x20>;
 		gpio-controller;
 		#gpio-cells = <2>;
 		/*
@@ -156,10 +156,15 @@
 			};
 		};
 
-		i2c@4 {
+		i2c@3 {
 			#address-cells = <1>;
 			#size-cells = <0>;
-			reg = <4>;
+			reg = <3>;
+			ina226@40 { /* u183 */
+				compatible = "ti,ina226";
+				reg = <0x40>;
+				shunt-resistor = <5000>;
+			};
 		};
 
 		i2c@5 {
@@ -174,7 +179,7 @@
 			reg = <7>;
 		};
 
-		/* 3, 6 not connected */
+		/* 4, 6 not connected */
 	};
 };
 
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
index 30ffd4f50fc30d..96cbec8aeb6fb0 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu106-revA.dts
@@ -415,6 +415,7 @@
 				temperature-stability = <50>;
 				factory-fout = <300000000>;
 				clock-frequency = <300000000>;
+				clock-output-names = "si570_user";
 			};
 		};
 		i2c@3 {
@@ -428,6 +429,7 @@
 				temperature-stability = <50>; /* copy from zc702 */
 				factory-fout = <156250000>;
 				clock-frequency = <148500000>;
+				clock-output-names = "si570_mgt";
 			};
 		};
 		i2c@4 {
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
index d94a4d161a7871..a46a54f0865123 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu111-revA.dts
@@ -336,6 +336,7 @@
 				temperature-stability = <50>;
 				factory-fout = <300000000>;
 				clock-frequency = <300000000>;
+				clock-output-names = "si570_user";
 			};
 		};
 		i2c@3 {
@@ -349,6 +350,7 @@
 				temperature-stability = <50>;
 				factory-fout = <156250000>;
 				clock-frequency = <148500000>;
+				clock-output-names = "si570_mgt";
 			};
 		};
 		i2c@4 {
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
index fb196a153d9eb4..efc49c88b50ba7 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi
@@ -878,8 +878,8 @@
 			interrupts = <0 133 4>;
 			power-domains = <&pd_sata>;
 			#stream-id-cells = <4>;
-			iommus = <&smmu 0x4c0>, <&smmu 0x4c1>,
-				 <&smmu 0x4c2>, <&smmu 0x4c3>;
+			/* iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, */
+			/*	 <&smmu 0x4c2>, <&smmu 0x4c3>; */
 			/* dma-coherent; */
 		};
 
@@ -919,7 +919,7 @@
 			compatible = "arm,mmu-500";
 			reg = <0x0 0xfd800000 0x0 0x20000>;
 			#iommu-cells = <1>;
-			status = "disabled";
+			status = "okay";
 			#global-interrupts = <1>;
 			interrupt-parent = <&gic>;
 			interrupts = <0 155 4>,
@@ -1083,6 +1083,15 @@
 			timeout-sec = <10>;
 		};
 
+		lpd_watchdog: watchdog@ff150000 {
+			compatible = "cdns,wdt-r1p2";
+			status = "disabled";
+			interrupt-parent = <&gic>;
+			interrupts = <0 52 1>;
+			reg = <0x0 0xff150000 0x0 0x1000>;
+			timeout-sec = <10>;
+		};
+
 		xilinx_ams: ams@ffa50000 {
 			compatible = "xlnx,zynqmp-ams";
 			status = "disabled";
diff --git a/arch/arm64/configs/xilinx_zynqmp_defconfig b/arch/arm64/configs/xilinx_zynqmp_defconfig
index 80ac9f74582921..fe2f52d7c8af24 100644
--- a/arch/arm64/configs/xilinx_zynqmp_defconfig
+++ b/arch/arm64/configs/xilinx_zynqmp_defconfig
@@ -140,9 +140,12 @@ CONFIG_MTD_M25P80=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_ARASAN=y
 CONFIG_MTD_SPI_NOR=y
+CONFIG_OF_OVERLAY=y
+CONFIG_OF_CONFIGFS=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
+CONFIG_XILINX_SDFEC=y
 CONFIG_XILINX_JESD204B=y
 CONFIG_XILINX_JESD204B_PHY=y
 CONFIG_EEPROM_AT24=y
@@ -177,6 +180,7 @@ CONFIG_REALTEK_PHY=y
 CONFIG_SMSC_PHY=y
 CONFIG_STE10XP=y
 CONFIG_VITESSE_PHY=y
+CONFIG_XILINX_GMII2RGMII=y
 CONFIG_USB_USBNET=y
 CONFIG_WL18XX=y
 CONFIG_WLCORE_SPI=y
diff --git a/drivers/clk/idt/clk-idt8t49n24x-core.c b/drivers/clk/idt/clk-idt8t49n24x-core.c
index fb8f4db76f99b0..ad23014e708f80 100644
--- a/drivers/clk/idt/clk-idt8t49n24x-core.c
+++ b/drivers/clk/idt/clk-idt8t49n24x-core.c
@@ -46,8 +46,10 @@
 #define IDT24x_VCO_MAX			4000004000u
 #define IDT24x_VCO_OPT			3500000000u
 #define IDT24x_MIN_INT_DIVIDER		6
+#define IDT24x_MIN_NS1			4
+#define IDT24x_MAX_NS1			6
 
-u8 q0_ns1_options[3] = { 4, 5, 6 };
+static u8 q0_ns1_options[3] = { 5, 6, 4 };
 
 /**
  * bits_to_shift - num bits to shift given specified mask
@@ -295,11 +297,8 @@ static int idt24x_calc_div_q0(struct clk_idt24x_chip *chip)
 		"%s. requested: %u, min_div: %u, max_div: %u",
 		__func__, chip->clk[0].requested, min_div, max_div);
 
-	min_ns2 = div64_u64(
-		(u64)min_div,
-		q0_ns1_options[ARRAY_SIZE(q0_ns1_options) - 1] * 2);
-	max_ns2 = div64_u64(
-		(u64)max_div, q0_ns1_options[0] * 2);
+	min_ns2 = div64_u64((u64)min_div, IDT24x_MAX_NS1 * 2);
+	max_ns2 = div64_u64((u64)max_div, IDT24x_MIN_NS1 * 2);
 
 	dev_dbg(&chip->i2c_client->dev,
 		"%s. min_ns2: %u, max_ns2: %u", __func__, min_ns2, max_ns2);
@@ -343,7 +342,7 @@ static int idt24x_calc_div_q0(struct clk_idt24x_chip *chip)
 					   current_vco > best_vco)
 					use = true;
 				if (use) {
-					chip->divs.ns1_q0 = q0_ns1_options[x];
+					chip->divs.ns1_q0 = x;
 					chip->divs.ns2_q0 = y;
 					best_vco = current_vco;
 				}
@@ -353,10 +352,9 @@ static int idt24x_calc_div_q0(struct clk_idt24x_chip *chip)
 	}
 
 	dev_dbg(&chip->i2c_client->dev,
-		"%s. best: (ns1=%u * ns2=%u * 2 * %u) == %u",
-		__func__, chip->divs.ns1_q0, chip->divs.ns2_q0,
-		chip->clk[0].requested,
-		best_vco);
+		"%s. best: (ns1=%u [/%u] * ns2=%u * 2 * %u) == %u",
+		__func__, chip->divs.ns1_q0, q0_ns1_options[chip->divs.ns1_q0],
+		chip->divs.ns2_q0, chip->clk[0].requested, best_vco);
 	return 0;
 }
 
@@ -380,16 +378,17 @@ static int idt24x_calc_divs(struct clk_idt24x_chip *chip)
 		return result;
 
 	dev_dbg(&chip->i2c_client->dev,
-		"%s: after idt24x_calc_div_q0. ns1: %u, ns2: %u",
-		__func__, chip->divs.ns1_q0, chip->divs.ns2_q0);
+		"%s: after idt24x_calc_div_q0. ns1: %u [/%u], ns2: %u",
+		__func__, chip->divs.ns1_q0, q0_ns1_options[chip->divs.ns1_q0],
+		chip->divs.ns2_q0);
 
 	chip->divs.dsmint = 0;
 	chip->divs.dsmfrac = 0;
 
-	if (chip->divs.ns1_q0 > 0) {
+	if (chip->clk[0].requested > 0) {
 		/* Q0 is in use and is governing the actual VCO freq */
-		vco = chip->divs.ns1_q0 * chip->divs.ns2_q0 * 2 *
-			chip->clk[0].requested;
+		vco = q0_ns1_options[chip->divs.ns1_q0] * chip->divs.ns2_q0 *
+			2 * chip->clk[0].requested;
 	} else {
 		u32 freq = 0;
 		u32 walk;
@@ -690,10 +689,10 @@ static int idt24x_update_device(struct clk_idt24x_chip *chip)
 
 	dev_dbg(&client->dev,
 		"%s: setting IDT24x_REG_NS1_Q0 (val %u @ 0x%x)",
-		__func__, chip->divs.ns1_q0 >> 8, IDT24x_REG_NS1_Q0);
+		__func__, chip->divs.ns1_q0, IDT24x_REG_NS1_Q0);
 	err = i2cwritewithmask(
 		client, chip->regmap, IDT24x_REG_NS1_Q0,
-		(chip->divs.ns1_q0 >> 8) & IDT24x_REG_NS1_Q0_MASK,
+		chip->divs.ns1_q0 & IDT24x_REG_NS1_Q0_MASK,
 		chip->reg_ns1_q0, IDT24x_REG_NS1_Q0_MASK);
 	if (err) {
 		dev_err(&client->dev,
diff --git a/drivers/clk/idt/clk-idt8t49n24x-debugfs.c b/drivers/clk/idt/clk-idt8t49n24x-debugfs.c
index d8fcf4e799744a..967a9df8701c71 100644
--- a/drivers/clk/idt/clk-idt8t49n24x-debugfs.c
+++ b/drivers/clk/idt/clk-idt8t49n24x-debugfs.c
@@ -16,7 +16,7 @@
 
 #include "clk-idt8t49n24x-debugfs.h"
 
-struct clk_idt24x_chip *idt24x_chip_fordebugfs;
+static struct clk_idt24x_chip *idt24x_chip_fordebugfs;
 
 static int idt24x_read_all_settings(
 	struct clk_idt24x_chip *chip, char *output_buffer, int count)
@@ -234,6 +234,7 @@ static ssize_t idt24x_debugfs_writer_i2c(struct file *fp,
 	int err = 0;
 	int x = 0;
 	int start = 0;
+	ssize_t written;
 	unsigned int reg = -1;
 	u8 val[WRITE_BLOCK_SIZE];
 	u16 nextbyte = 0;
@@ -242,9 +243,18 @@ static ssize_t idt24x_debugfs_writer_i2c(struct file *fp,
 	if (count > DEBUGFS_BUFFER_LENGTH)
 		return -EINVAL;
 
+	written = simple_write_to_buffer(
+		idt24x_chip_fordebugfs->dbg_cache, DEBUGFS_BUFFER_LENGTH,
+		position, user_buffer, count);
+	if (written != count) {
+		dev_dbg(&idt24x_chip_fordebugfs->i2c_client->dev,
+			"write count != expected count");
+		return written;
+	}
+
 	for (x = 0; x < count; x++) {
-		token[x - start] = user_buffer[x];
-		if (user_buffer[x] == ' ') {
+		token[x - start] = idt24x_chip_fordebugfs->dbg_cache[x];
+		if (idt24x_chip_fordebugfs->dbg_cache[x] == ' ') {
 			token[x - start] = '\0';
 			err = idt24x_handle_i2c_debug_token(
 				&idt24x_chip_fordebugfs->i2c_client->dev,
@@ -277,9 +287,7 @@ static ssize_t idt24x_debugfs_writer_i2c(struct file *fp,
 			"successfully wrote i2c data to chip");
 	}
 
-	return simple_write_to_buffer(
-		idt24x_chip_fordebugfs->dbg_cache, DEBUGFS_BUFFER_LENGTH,
-		position, user_buffer, count);
+	return written;
 }
 
 static const struct file_operations idt24x_fops_debug_action = {
diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c
index 7535e120288e92..4cab60ee3907a8 100644
--- a/drivers/clk/zynqmp/pll.c
+++ b/drivers/clk/zynqmp/pll.c
@@ -196,7 +196,7 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate,
 	struct zynqmp_pll *clk = to_zynqmp_pll(hw);
 	u32 clk_id = clk->clk_id;
 	const char *clk_name = clk_hw_get_name(hw);
-	u32 fbdiv, data;
+	u32 fbdiv;
 	long rate_div, frac, m, f;
 	int ret;
 	const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops();
@@ -215,7 +215,7 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate,
 
 		/* Account for vpll_to_lpd and dp_video_ref */
 		if (children > 2)
-			WARN(1, "Two devices are using vpll which is forbidden\n");
+			WARN(1, "More than two devices are using the vpll, which is forbidden\n");
 
 		rate_div = ((rate * FRAC_DIV) / parent_rate);
 		m = rate_div / FRAC_DIV;
@@ -229,8 +229,7 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate,
 			pr_warn_once("%s() set divider failed for %s, ret = %d\n",
 				     __func__, clk_name, ret);
 
-		data = (FRAC_DIV * f) / FRAC_DIV;
-		eemi_ops->ioctl(0, IOCTL_SET_PLL_FRAC_DATA, clk_id, data, NULL);
+		eemi_ops->ioctl(0, IOCTL_SET_PLL_FRAC_DATA, clk_id, f, NULL);
 
 		return (rate + frac);
 	}
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 2978dedb4c807d..35fdf42dd0a4c7 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -1175,8 +1175,10 @@ static void xilinx_cdma_start_transfer(struct xilinx_dma_chan *chan)
 
 		hw = &segment->hw;
 
-		xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, hw->src_addr);
-		xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, hw->dest_addr);
+		xilinx_write(chan, XILINX_CDMA_REG_SRCADDR, (dma_addr_t)
+			     ((u64)hw->src_addr_msb << 32 | hw->src_addr));
+		xilinx_write(chan, XILINX_CDMA_REG_DSTADDR, (dma_addr_t)
+			     ((u64)hw->dest_addr_msb << 32 | hw->dest_addr));
 
 		/* Start the transfer */
 		dma_ctrl_write(chan, XILINX_DMA_REG_BTT,
diff --git a/drivers/dma/xilinx/xilinx_dpdma.c b/drivers/dma/xilinx/xilinx_dpdma.c
index bbc1d92108c2cf..1ea509e00742af 100644
--- a/drivers/dma/xilinx/xilinx_dpdma.c
+++ b/drivers/dma/xilinx/xilinx_dpdma.c
@@ -143,6 +143,7 @@
 #define XILINX_DPDMA_DESC_ADDR_EXT_ADDR_SHIFT		(16)
 
 #define XILINX_DPDMA_ALIGN_BYTES			256
+#define XILINX_DPDMA_LINESIZE_ALIGN_BITS		128
 
 #define XILINX_DPDMA_NUM_CHAN				6
 #define XILINX_DPDMA_PAGE_MASK				((1 << 12) - 1)
@@ -1240,6 +1241,7 @@ xilinx_dpdma_chan_prep_interleaved(struct xilinx_dpdma_chan *chan,
 
 	chan->xdev->desc_addr(sw_desc, sw_desc, &xt->src_start, 1);
 	hw_desc = &sw_desc->hw;
+	hsize = ALIGN(hsize, XILINX_DPDMA_LINESIZE_ALIGN_BITS / 8);
 	hw_desc->xfer_size = hsize * xt->numf;
 	hw_desc->hsize_stride = hsize <<
 				XILINX_DPDMA_DESC_HSIZE_STRIDE_HSIZE_SHIFT;
diff --git a/drivers/edac/zynqmp_ocm_edac.c b/drivers/edac/zynqmp_ocm_edac.c
index a3aa57ef84a83d..4957a8c9d02d4c 100644
--- a/drivers/edac/zynqmp_ocm_edac.c
+++ b/drivers/edac/zynqmp_ocm_edac.c
@@ -280,7 +280,7 @@ static ssize_t zynqmp_ocm_edac_inject_fault_count_store(
 	if (!data)
 		return -EFAULT;
 
-	if (kstrtoint(data, 0, &ficount))
+	if (kstrtouint(data, 0, &ficount))
 		return -EINVAL;
 
 	ficount &= OCM_FICOUNT_MASK;
diff --git a/drivers/fpga/fpga-region.c b/drivers/fpga/fpga-region.c
index d9a768b5346be9..2485c131a0f4ef 100644
--- a/drivers/fpga/fpga-region.c
+++ b/drivers/fpga/fpga-region.c
@@ -236,7 +236,6 @@ static int fpga_region_program_fpga(struct fpga_region *region,
 {
 	struct fpga_manager *mgr;
 	int ret;
-	struct device *dev = &region->dev;
 	struct reset_control *rstc;
 
 	region = fpga_region_get(region);
@@ -276,7 +275,7 @@ static int fpga_region_program_fpga(struct fpga_region *region,
 		goto err_put_br;
 	}
 
-	rstc = of_reset_control_array_get(dev->of_node, false, true);
+	rstc = of_reset_control_array_get(overlay, false, true);
 	if (IS_ERR(rstc))
 		goto err_put_br;
 
diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c
index b0c482f5d8b635..f300c7bbb52935 100644
--- a/drivers/fpga/zynqmp-fpga.c
+++ b/drivers/fpga/zynqmp-fpga.c
@@ -12,7 +12,6 @@
  * GNU General Public License for more details.
  */
 
-#include <asm/cacheflush.h>
 #include <linux/dma-mapping.h>
 #include <linux/fpga/fpga-mgr.h>
 #include <linux/io.h>
@@ -26,6 +25,11 @@
 #define IXR_FPGA_DONE_MASK	0X00000008U
 #define IXR_FPGA_ENCRYPTION_EN	0x00000008U
 
+/**
+ * struct zynqmp_fpga_priv - Private data structure
+ * @dev:	Device data structure
+ * @flags:	flags which is used to identify the bitfile type
+ */
 struct zynqmp_fpga_priv {
 	struct device *dev;
 	u32 flags;
@@ -72,10 +76,14 @@ static int zynqmp_fpga_ops_write(struct fpga_manager *mgr,
 	if (mgr->flags & IXR_FPGA_ENCRYPTION_EN)
 		memcpy(kbuf + size, mgr->key, ENCRYPTED_KEY_LEN);
 
-	__flush_cache_user_range((unsigned long)kbuf,
-				 (unsigned long)kbuf + dma_size);
+	wmb(); /* ensure all writes are done before initiate FW call */
 
-	ret = eemi_ops->fpga_load(dma_addr, dma_addr + size, mgr->flags);
+	if (mgr->flags & IXR_FPGA_ENCRYPTION_EN)
+		ret = eemi_ops->fpga_load(dma_addr, dma_addr + size,
+							mgr->flags);
+	else
+		ret = eemi_ops->fpga_load(dma_addr, size,
+						mgr->flags);
 
 	dma_free_coherent(priv->dev, dma_size, kbuf, dma_addr);
 
diff --git a/drivers/gpio/gpio-zynq.c b/drivers/gpio/gpio-zynq.c
index 655ea52d710139..1b620d03d1b4ca 100644
--- a/drivers/gpio/gpio-zynq.c
+++ b/drivers/gpio/gpio-zynq.c
@@ -676,10 +676,8 @@ static void zynq_gpio_restore_context(struct zynq_gpio *gpio)
 
 static int __maybe_unused zynq_gpio_suspend(struct device *dev)
 {
-	struct platform_device *pdev = to_platform_device(dev);
-	int irq = platform_get_irq(pdev, 0);
-	struct irq_data *data = irq_get_irq_data(irq);
-	struct zynq_gpio *gpio = platform_get_drvdata(pdev);
+	struct zynq_gpio *gpio = dev_get_drvdata(dev);
+	struct irq_data *data = irq_get_irq_data(gpio->irq);
 
 	if (!irqd_is_wakeup_set(data)) {
 		zynq_gpio_save_context(gpio);
@@ -691,10 +689,8 @@ static int __maybe_unused zynq_gpio_suspend(struct device *dev)
 
 static int __maybe_unused zynq_gpio_resume(struct device *dev)
 {
-	struct platform_device *pdev = to_platform_device(dev);
-	int irq = platform_get_irq(pdev, 0);
-	struct irq_data *data = irq_get_irq_data(irq);
-	struct zynq_gpio *gpio = platform_get_drvdata(pdev);
+	struct zynq_gpio *gpio = dev_get_drvdata(dev);
+	struct irq_data *data = irq_get_irq_data(gpio->irq);
 	int ret;
 
 	if (!irqd_is_wakeup_set(data)) {
@@ -842,7 +838,7 @@ static int zynq_gpio_probe(struct platform_device *pdev)
 	chip->free = zynq_gpio_free;
 	chip->direction_input = zynq_gpio_dir_in;
 	chip->direction_output = zynq_gpio_dir_out;
-	chip->base = -1;
+	chip->base = of_alias_get_id(pdev->dev.of_node, "gpio");
 	chip->ngpio = gpio->p_data->ngpio;
 
 	/* Retrieve GPIO clock */
diff --git a/drivers/gpu/drm/xlnx/Kconfig b/drivers/gpu/drm/xlnx/Kconfig
index 906c8c8c662b07..94f347418031b8 100644
--- a/drivers/gpu/drm/xlnx/Kconfig
+++ b/drivers/gpu/drm/xlnx/Kconfig
@@ -90,3 +90,13 @@ config DRM_XLNX_BRIDGE_SCALER
 	  if scaler is connected to an encoder. The driver provides
 	  upscaling, down scaling and no scaling functionality through
 	  bridge layer.
+
+config DRM_XLNX_BRIDGE_VTC
+	tristate "Xilinx DRM VTC Driver"
+	depends on DRM_XLNX_BRIDGE
+	help
+	  DRM brige driver for Xilinx Video Timing Controller. Choose
+	  this option to make VTC a part of the CRTC in display pipeline.
+	  Currently the support is added to the Xilinx Video Mixer and
+	  Xilinx PL display CRTC drivers. This driver provides ability
+	  to generate timings through the bridge layer.
diff --git a/drivers/gpu/drm/xlnx/Makefile b/drivers/gpu/drm/xlnx/Makefile
index 69aecb08ebe910..1d80be7d3e70d5 100644
--- a/drivers/gpu/drm/xlnx/Makefile
+++ b/drivers/gpu/drm/xlnx/Makefile
@@ -6,6 +6,8 @@ obj-$(CONFIG_DRM_XLNX_BRIDGE_CSC) += xlnx_csc.o
 
 obj-$(CONFIG_DRM_XLNX_BRIDGE_SCALER) += xlnx_scaler.o
 
+obj-$(CONFIG_DRM_XLNX_BRIDGE_VTC) += xlnx_vtc.o
+
 obj-$(CONFIG_DRM_XLNX_DSI) += xlnx_dsi.o
 
 obj-$(CONFIG_DRM_XLNX_MIXER) += xlnx_mixer.o
diff --git a/drivers/gpu/drm/xlnx/xlnx_bridge.c b/drivers/gpu/drm/xlnx/xlnx_bridge.c
index ad706a5666bf0f..6ee462ada6768e 100644
--- a/drivers/gpu/drm/xlnx/xlnx_bridge.c
+++ b/drivers/gpu/drm/xlnx/xlnx_bridge.c
@@ -52,6 +52,7 @@ struct xlnx_bridge_helper {
 
 static struct xlnx_bridge_helper helper;
 
+struct videomode;
 /*
  * Client functions
  */
@@ -209,6 +210,34 @@ int xlnx_bridge_get_output_fmts(struct xlnx_bridge *bridge,
 }
 EXPORT_SYMBOL(xlnx_bridge_get_output_fmts);
 
+/**
+ * xlnx_bridge_set_timing - Set the video timing
+ * @bridge: bridge to set
+ * @vm: Videomode
+ *
+ * Set the video mode so that timing can be generated using this
+ * by the video timing controller.
+ *
+ * Return: 0 on success. -ENOENT if no callback, -EFAULT if in error state,
+ * or return code from callback.
+ */
+int xlnx_bridge_set_timing(struct xlnx_bridge *bridge, struct videomode *vm)
+{
+	if (!bridge)
+		return 0;
+
+	if (helper.error)
+		return -EFAULT;
+
+	if (bridge->set_timing) {
+		bridge->set_timing(bridge, vm);
+		return 0;
+	}
+
+	return -ENOENT;
+}
+EXPORT_SYMBOL(xlnx_bridge_set_timing);
+
 /**
  * of_xlnx_bridge_get - Get the corresponding Xlnx bridge instance
  * @bridge_np: The device node of the bridge device
diff --git a/drivers/gpu/drm/xlnx/xlnx_bridge.h b/drivers/gpu/drm/xlnx/xlnx_bridge.h
index 2dd5ca196a9a01..64330169bd2228 100644
--- a/drivers/gpu/drm/xlnx/xlnx_bridge.h
+++ b/drivers/gpu/drm/xlnx/xlnx_bridge.h
@@ -19,6 +19,8 @@
 #ifndef _XLNX_BRIDGE_H_
 #define _XLNX_BRIDGE_H_
 
+struct videomode;
+
 struct xlnx_bridge_debugfs_file;
 
 /**
@@ -32,6 +34,7 @@ struct xlnx_bridge_debugfs_file;
  * @get_input_fmts: callback to get supported input formats.
  * @set_output: callback to set the output
  * @get_output_fmts: callback to get supported output formats.
+ * @set_timing: callback to set timing in connected video timing controller.
  * @debugfs_file: for debugfs support
  */
 struct xlnx_bridge {
@@ -48,6 +51,7 @@ struct xlnx_bridge {
 			  u32 width, u32 height, u32 bus_fmt);
 	int (*get_output_fmts)(struct xlnx_bridge *bridge,
 			       const u32 **fmts, u32 *count);
+	int (*set_timing)(struct xlnx_bridge *bridge, struct videomode *vm);
 	struct xlnx_bridge_debugfs_file *debugfs_file;
 };
 
@@ -75,6 +79,7 @@ int xlnx_bridge_set_output(struct xlnx_bridge *bridge,
 			   u32 width, u32 height, u32 bus_fmt);
 int xlnx_bridge_get_output_fmts(struct xlnx_bridge *bridge,
 				const u32 **fmts, u32 *count);
+int xlnx_bridge_set_timing(struct xlnx_bridge *bridge, struct videomode *vm);
 struct xlnx_bridge *of_xlnx_bridge_get(struct device_node *bridge_np);
 void of_xlnx_bridge_put(struct xlnx_bridge *bridge);
 
@@ -141,6 +146,14 @@ static inline int xlnx_bridge_get_output_fmts(struct xlnx_bridge *bridge,
 	return 0;
 }
 
+static int xlnx_bridge_set_timing(struct xlnx_bridge *bridge,
+				  struct videomode *vm)
+{
+	if (bridge)
+		return -ENODEV;
+	return 0;
+}
+
 static inline struct xlnx_bridge *
 of_xlnx_bridge_get(struct device_node *bridge_np)
 {
diff --git a/drivers/gpu/drm/xlnx/xlnx_mixer.c b/drivers/gpu/drm/xlnx/xlnx_mixer.c
index 0ab5cb605dfc5f..ad361242976503 100644
--- a/drivers/gpu/drm/xlnx/xlnx_mixer.c
+++ b/drivers/gpu/drm/xlnx/xlnx_mixer.c
@@ -25,8 +25,10 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/dmaengine.h>
-#include "xlnx_drv.h"
+#include <video/videomode.h>
+#include "xlnx_bridge.h"
 #include "xlnx_crtc.h"
+#include "xlnx_drv.h"
 
 /**************************** Register Data **********************************/
 #define XVMIX_AP_CTRL			0x00000
@@ -294,6 +296,7 @@ struct xlnx_mix_hw {
  * @pixel_clock_enabled: pixel clock status
  * @dpms: mixer drm state
  * @event: vblank pending event
+ * @vtc_bridge: vtc_bridge structure
  *
  * Contains pointers to logical constructions such as the DRM plane manager as
  * well as pointers to distinquish the mixer layer serving as the DRM "primary"
@@ -322,6 +325,7 @@ struct xlnx_mix {
 	bool pixel_clock_enabled;
 	int dpms;
 	struct drm_pending_vblank_event *event;
+	struct xlnx_bridge *vtc_bridge;
 };
 
 /**
@@ -367,8 +371,8 @@ static inline void reg_writel(void __iomem *base, int offset, u32 val)
 
 static inline void reg_writeq(void __iomem *base, int offset, u64 val)
 {
-	writel(upper_32_bits(val), base + offset);
-	writel(lower_32_bits(val), base + offset + 4);
+	writel(lower_32_bits(val), base + offset);
+	writel(upper_32_bits(val), base + offset + 4);
 }
 
 static inline u32 reg_readl(void __iomem *base, int offset)
@@ -1738,7 +1742,17 @@ static void xlnx_mix_plane_cleanup_fb(struct drm_plane *plane,
 static int xlnx_mix_plane_atomic_check(struct drm_plane *plane,
 				       struct drm_plane_state *state)
 {
-	return 0;
+	int scale;
+	struct xlnx_mix_plane *mix_plane = to_xlnx_plane(plane);
+	struct xlnx_mix_hw *mixer_hw = to_mixer_hw(mix_plane);
+
+	scale = xlnx_mix_get_layer_scaling(mixer_hw,
+					   mix_plane->mixer_layer->id);
+	if (is_window_valid(mixer_hw, state->crtc_x, state->crtc_y,
+			    state->src_w >> 16, state->src_h >> 16, scale))
+		return 0;
+
+	return -EINVAL;
 }
 
 static void xlnx_mix_plane_atomic_update(struct drm_plane *plane,
@@ -1987,7 +2001,7 @@ static int xlnx_mix_dt_parse(struct device *dev, struct xlnx_mix *mixer)
 {
 	struct xlnx_mix_plane *planes;
 	struct xlnx_mix_hw *mixer_hw;
-	struct device_node *node;
+	struct device_node *node, *vtc_node;
 	struct xlnx_mix_layer_data *l_data;
 	struct resource	res;
 	int ret, l_cnt, i;
@@ -2039,6 +2053,19 @@ static int xlnx_mix_dt_parse(struct device *dev, struct xlnx_mix *mixer)
 		dev_err(dev, "invalid addr-width dts prop\n");
 		return -EINVAL;
 	}
+
+	/* VTC Bridge support */
+	vtc_node = of_parse_phandle(node, "xlnx,bridge", 0);
+	if (vtc_node) {
+		mixer->vtc_bridge = of_xlnx_bridge_get(vtc_node);
+		if (!mixer->vtc_bridge) {
+			dev_info(dev, "Didn't get vtc bridge instance\n");
+			return -EPROBE_DEFER;
+		}
+	} else {
+		dev_info(dev, "vtc bridge property not present\n");
+	}
+
 	mixer_hw->logo_layer_en = of_property_read_bool(node,
 							"xlnx,logo-layer");
 	l_cnt = mixer_hw->max_layers + (mixer_hw->logo_layer_en ? 1 : 0);
@@ -2061,9 +2088,11 @@ static int xlnx_mix_dt_parse(struct device *dev, struct xlnx_mix *mixer)
 	ret = xlnx_mix_parse_dt_bg_video_fmt(node, mixer_hw);
 	if (ret)
 		return ret;
-	/* read logo data from dts */
-	ret = xlnx_mix_parse_dt_logo_data(node, mixer_hw);
+	if (mixer_hw->logo_layer_en) {
+		/* read logo data from dts */
+		ret = xlnx_mix_parse_dt_logo_data(node, mixer_hw);
 		return ret;
+	}
 	return 0;
 }
 
@@ -2331,6 +2360,8 @@ static void xlnx_mix_crtc_dpms(struct drm_crtc *base_crtc, int dpms)
 	struct xlnx_crtc *crtc = to_xlnx_crtc(base_crtc);
 	struct xlnx_mix *mixer = to_xlnx_mixer(crtc);
 	int ret;
+	struct videomode vm;
+	struct drm_display_mode *mode = &base_crtc->mode;
 
 	DRM_DEBUG_KMS("dpms: %d\n", dpms);
 	if (mixer->dpms == dpms)
@@ -2348,12 +2379,19 @@ static void xlnx_mix_crtc_dpms(struct drm_crtc *base_crtc, int dpms)
 		}
 		mixer->pixel_clock_enabled = true;
 
+		if (mixer->vtc_bridge) {
+			drm_display_mode_to_videomode(mode, &vm);
+			xlnx_bridge_set_timing(mixer->vtc_bridge, &vm);
+			xlnx_bridge_enable(mixer->vtc_bridge);
+		}
+
 		xlnx_mix_dpms(mixer, dpms);
 		xlnx_mix_plane_dpms(base_crtc->primary, dpms);
 		break;
 	default:
 		xlnx_mix_plane_dpms(base_crtc->primary, dpms);
 		xlnx_mix_dpms(mixer, dpms);
+		xlnx_bridge_disable(mixer->vtc_bridge);
 		if (mixer->pixel_clock_enabled) {
 			clk_disable_unprepare(mixer->pixel_clock);
 			mixer->pixel_clock_enabled = false;
@@ -2702,6 +2740,7 @@ static int xlnx_mix_remove(struct platform_device *pdev)
 {
 	struct xlnx_mix *mixer = platform_get_drvdata(pdev);
 
+	of_xlnx_bridge_put(mixer->vtc_bridge);
 	xlnx_drm_pipeline_exit(mixer->master);
 	component_del(&pdev->dev, &xlnx_mix_component_ops);
 	return 0;
diff --git a/drivers/gpu/drm/xlnx/xlnx_pl_disp.c b/drivers/gpu/drm/xlnx/xlnx_pl_disp.c
index fb0e98c11b2645..d8c8d7e00467be 100644
--- a/drivers/gpu/drm/xlnx/xlnx_pl_disp.c
+++ b/drivers/gpu/drm/xlnx/xlnx_pl_disp.c
@@ -23,8 +23,10 @@
 #include <linux/of.h>
 #include <linux/of_dma.h>
 #include <linux/platform_device.h>
-#include "xlnx_drv.h"
+#include <video/videomode.h>
+#include "xlnx_bridge.h"
 #include "xlnx_crtc.h"
+#include "xlnx_drv.h"
 
 /*
  * Overview
@@ -60,6 +62,7 @@ struct xlnx_dma_chan {
  * @callback_param: parameter for passing  to DMA callback function
  * @drm: core drm object
  * @fmt: drm color format
+ * @vtc_bridge: vtc_bridge structure
  */
 struct xlnx_pl_disp {
 	struct device *dev;
@@ -72,6 +75,7 @@ struct xlnx_pl_disp {
 	void *callback_param;
 	struct drm_device *drm;
 	u32 fmt;
+	struct xlnx_bridge *vtc_bridge;
 };
 
 /*
@@ -314,6 +318,16 @@ static void xlnx_pl_disp_crtc_atomic_enable(struct drm_crtc *crtc,
 {
 	struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode;
 	int vrefresh;
+	struct xlnx_crtc *xlnx_crtc = to_xlnx_crtc(crtc);
+	struct xlnx_pl_disp *xlnx_pl_disp = crtc_to_dma(xlnx_crtc);
+	struct videomode vm;
+
+	if (xlnx_pl_disp->vtc_bridge) {
+		/* set video timing */
+		drm_display_mode_to_videomode(adjusted_mode, &vm);
+		xlnx_bridge_set_timing(xlnx_pl_disp->vtc_bridge, &vm);
+		xlnx_bridge_enable(xlnx_pl_disp->vtc_bridge);
+	}
 
 	xlnx_pl_disp_plane_enable(crtc->primary);
 
@@ -326,8 +340,12 @@ static void xlnx_pl_disp_crtc_atomic_enable(struct drm_crtc *crtc,
 static void xlnx_pl_disp_crtc_atomic_disable(struct drm_crtc *crtc,
 					     struct drm_crtc_state *old_state)
 {
+	struct xlnx_crtc *xlnx_crtc = to_xlnx_crtc(crtc);
+	struct xlnx_pl_disp *xlnx_pl_disp = crtc_to_dma(xlnx_crtc);
+
 	xlnx_pl_disp_plane_disable(crtc->primary);
 	xlnx_pl_disp_clear_event(crtc);
+	xlnx_bridge_disable(xlnx_pl_disp->vtc_bridge);
 }
 
 static int xlnx_pl_disp_crtc_atomic_check(struct drm_crtc *crtc,
@@ -443,6 +461,7 @@ static const struct component_ops xlnx_pl_disp_component_ops = {
 static int xlnx_pl_disp_probe(struct platform_device *pdev)
 {
 	struct device *dev = &pdev->dev;
+	struct device_node *vtc_node;
 	struct xlnx_pl_disp *xlnx_pl_disp;
 	int ret;
 	const char *vformat;
@@ -472,6 +491,19 @@ static int xlnx_pl_disp_probe(struct platform_device *pdev)
 	}
 
 	strcpy((char *)&xlnx_pl_disp->fmt, vformat);
+
+	/* VTC Bridge support */
+	vtc_node = of_parse_phandle(dev->of_node, "xlnx,bridge", 0);
+	if (vtc_node) {
+		xlnx_pl_disp->vtc_bridge = of_xlnx_bridge_get(vtc_node);
+		if (!xlnx_pl_disp->vtc_bridge) {
+			dev_info(dev, "Didn't get vtc bridge instance\n");
+			return -EPROBE_DEFER;
+		}
+	} else {
+		dev_info(dev, "vtc bridge property not present\n");
+	}
+
 	xlnx_pl_disp->dev = dev;
 	platform_set_drvdata(pdev, xlnx_pl_disp);
 
@@ -503,6 +535,7 @@ static int xlnx_pl_disp_remove(struct platform_device *pdev)
 	struct xlnx_pl_disp *xlnx_pl_disp = platform_get_drvdata(pdev);
 	struct xlnx_dma_chan *xlnx_dma_chan = xlnx_pl_disp->chan;
 
+	of_xlnx_bridge_put(xlnx_pl_disp->vtc_bridge);
 	xlnx_drm_pipeline_exit(xlnx_pl_disp->master);
 	component_del(&pdev->dev, &xlnx_pl_disp_component_ops);
 
diff --git a/drivers/gpu/drm/xlnx/xlnx_sdi.c b/drivers/gpu/drm/xlnx/xlnx_sdi.c
index 4254ee90210218..bebb67e4860261 100644
--- a/drivers/gpu/drm/xlnx/xlnx_sdi.c
+++ b/drivers/gpu/drm/xlnx/xlnx_sdi.c
@@ -780,6 +780,7 @@ static void xlnx_sdi_encoder_atomic_mode_set(struct drm_encoder *encoder,
 	struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
 	struct videomode vm;
 	u32 payload, i;
+	u32 sditx_blank, vtc_blank;
 
 	/* Set timing parameters as per bridge output parameters */
 	xlnx_bridge_set_input(sdi->bridge, adjusted_mode->hdisplay,
@@ -843,6 +844,22 @@ static void xlnx_sdi_encoder_atomic_mode_set(struct drm_encoder *encoder,
 	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 		vm.flags |= DISPLAY_FLAGS_VSYNC_LOW;
 
+	do {
+		sditx_blank = (adjusted_mode->hsync_start -
+			       adjusted_mode->hdisplay) +
+			      (adjusted_mode->hsync_end -
+			       adjusted_mode->hsync_start) +
+			      (adjusted_mode->htotal -
+			       adjusted_mode->hsync_end);
+
+		vtc_blank = (vm.hfront_porch + vm.hback_porch +
+			     vm.hsync_len) * PIXELS_PER_CLK;
+
+		if (vtc_blank != sditx_blank)
+			vm.hfront_porch++;
+	} while (vtc_blank < sditx_blank);
+
+	vm.pixelclock = adjusted_mode->clock * 1000;
 	xlnx_stc_sig(sdi->base, &vm);
 }
 
diff --git a/drivers/gpu/drm/xlnx/xlnx_sdi_modes.h b/drivers/gpu/drm/xlnx/xlnx_sdi_modes.h
index d4b55ac1cbf508..1f606ef6b71f35 100644
--- a/drivers/gpu/drm/xlnx/xlnx_sdi_modes.h
+++ b/drivers/gpu/drm/xlnx/xlnx_sdi_modes.h
@@ -40,14 +40,14 @@ static const struct xlnx_sdi_display_config xlnx_sdi_modes[] = {
 	/* SD: 720x480i@60Hz */
 	{{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 		   801, 858, 0, 240, 244, 247, 262, 0,
-		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 		   DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 		   .vrefresh = 60, }, {0x7, 0x6},
 		   {0x81, 0x81, 0x81, 0x81, 0x81, 0x81} },
 	/* SD: 720x576i@50Hz */
 	{{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 		   795, 864, 0, 288, 290, 293, 312, 0,
-		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
+		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 		   DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 		   .vrefresh = 50, }, {0x9, 0x9},
 		   {0x81, 0x81, 0x81, 0x81, 0x81, 0x81} },
diff --git a/drivers/gpu/drm/xlnx/xlnx_sdi_timing.c b/drivers/gpu/drm/xlnx/xlnx_sdi_timing.c
index d69402c51265a1..9c9348c1ad9c42 100644
--- a/drivers/gpu/drm/xlnx/xlnx_sdi_timing.c
+++ b/drivers/gpu/drm/xlnx/xlnx_sdi_timing.c
@@ -28,6 +28,7 @@
 #define XSTC_GVBH_F1	0x88
 #define XSTC_GVSYNC_F1	0x8C
 #define XSTC_GVSH_F1	0x90
+#define XSTC_GASIZE_F1	0x94
 #define XSTC_OFFSET	0x10000
 
 /* timing controller register bit */
@@ -223,11 +224,13 @@ static void xlnx_stc_polarity(void __iomem *base,
  * xlnx_stc_hori_off - Configure horzontal timing offset
  * @base:	Base address of SDI Tx subsystem
  * @hori_off:	horizontal offset configuration data
+ * @flags:	Display flags
  *
  * This function configure horizontal offset
  */
 static void xlnx_stc_hori_off(void __iomem *base,
-			      struct xlnx_stc_hori_off *hori_off)
+			      struct xlnx_stc_hori_off *hori_off,
+			      enum display_flags flags)
 {
 	u32 reg;
 
@@ -244,16 +247,20 @@ static void xlnx_stc_hori_off(void __iomem *base,
 	xlnx_stc_writel(base, XSTC_GVSH_F0, reg);
 
 	/* Calculate and update Generator VBlank Hori field 1 */
-	reg = hori_off->v1blank_hori_start & XSTC_XVXHOX_HSTART_MASK;
-	reg |= (hori_off->v1blank_hori_end << XSTC_XVXHOX_HEND_SHIFT) &
-		XSTC_XVXHOX_HEND_MASK;
-	xlnx_stc_writel(base, XSTC_GVBH_F1, reg);
+	if (flags & DISPLAY_FLAGS_INTERLACED) {
+		reg = hori_off->v1blank_hori_start & XSTC_XVXHOX_HSTART_MASK;
+		reg |= (hori_off->v1blank_hori_end << XSTC_XVXHOX_HEND_SHIFT) &
+			XSTC_XVXHOX_HEND_MASK;
+		xlnx_stc_writel(base, XSTC_GVBH_F1, reg);
+	}
 
 	/* Calculate and update Generator VBlank Hori field 1 */
-	reg =  hori_off->v1sync_hori_start & XSTC_XVXHOX_HSTART_MASK;
-	reg |= (hori_off->v1sync_hori_end << XSTC_XVXHOX_HEND_SHIFT) &
-		XSTC_XVXHOX_HEND_MASK;
-	xlnx_stc_writel(base, XSTC_GVSH_F1, reg);
+	if (flags & DISPLAY_FLAGS_INTERLACED) {
+		reg = hori_off->v1sync_hori_start & XSTC_XVXHOX_HSTART_MASK;
+		reg |= (hori_off->v1sync_hori_end << XSTC_XVXHOX_HEND_SHIFT) &
+			XSTC_XVXHOX_HEND_MASK;
+		xlnx_stc_writel(base, XSTC_GVSH_F1, reg);
+	}
 }
 
 /**
@@ -317,11 +324,24 @@ void xlnx_stc_sig(void __iomem *base, struct videomode *vm)
 	reg = htotal & XSTC_GHFRAME_HSIZE;
 	xlnx_stc_writel(base, XSTC_GHSIZE, reg);
 	reg = vtotal & XSTC_GVFRAME_HSIZE_F1;
-	reg |= reg << XSTC_GV1_BPSTART_SHIFT;
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED) {
+		if (vm->pixelclock == 148500000)
+			reg |= (reg + 2) <<
+				XSTC_GV1_BPSTART_SHIFT;
+		else
+			reg |= (reg + 1) <<
+				XSTC_GV1_BPSTART_SHIFT;
+	} else {
+		reg |= reg << XSTC_GV1_BPSTART_SHIFT;
+	}
 	xlnx_stc_writel(base, XSTC_GVSIZE, reg);
 	reg = hactive & XSTC_GA_ACTSIZE_MASK;
 	reg |= (vactive & XSTC_GA_ACTSIZE_MASK) << 16;
 	xlnx_stc_writel(base, XSTC_GASIZE, reg);
+
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED)
+		xlnx_stc_writel(base, XSTC_GASIZE_F1, reg);
+
 	reg = hsync_start & XSTC_GH1_SYNCSTART_MASK;
 	reg |= (hbackporch_start << XSTC_GH1_BPSTART_SHIFT) &
 	       XSTC_GH1_BPSTART_MASK;
@@ -329,8 +349,38 @@ void xlnx_stc_sig(void __iomem *base, struct videomode *vm)
 	reg = vsync_start & XSTC_GV1_SYNCSTART_MASK;
 	reg |= (vbackporch_start << XSTC_GV1_BPSTART_SHIFT) &
 	       XSTC_GV1_BPSTART_MASK;
+
+	/*
+	 * Fix the Vsync_vstart and vsync_vend of Field 0
+	 * for all interlaced modes including 3GB.
+	 */
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED)
+		reg = ((((reg & XSTC_GV1_BPSTART_MASK) >>
+			XSTC_GV1_BPSTART_SHIFT) - 1) <<
+			XSTC_GV1_BPSTART_SHIFT) |
+			((reg & XSTC_GV1_SYNCSTART_MASK) - 1);
+
 	xlnx_stc_writel(base, XSTC_GVSYNC_F0, reg);
 
+	/*
+	 * Fix the Vsync_vstart and vsync_vend of Field 1
+	 * for interlaced and 3GB modes.
+	 */
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED) {
+		if (vm->pixelclock == 148500000)
+			/* Revert and increase by 1 for 3GB mode */
+			reg = ((((reg & XSTC_GV1_BPSTART_MASK) >>
+				XSTC_GV1_BPSTART_SHIFT) + 2) <<
+				XSTC_GV1_BPSTART_SHIFT) |
+				((reg & XSTC_GV1_SYNCSTART_MASK) + 2);
+		else
+			/* Only revert the reduction */
+			reg = ((((reg & XSTC_GV1_BPSTART_MASK) >>
+				XSTC_GV1_BPSTART_SHIFT) + 1) <<
+				XSTC_GV1_BPSTART_SHIFT) |
+				((reg & XSTC_GV1_SYNCSTART_MASK) + 1);
+	}
+
 	hori_off.v0blank_hori_start = hactive;
 	hori_off.v0blank_hori_end = hactive;
 	hori_off.v0sync_hori_start = hsync_start;
@@ -353,7 +403,7 @@ void xlnx_stc_sig(void __iomem *base, struct videomode *vm)
 		xlnx_stc_writel(base, XSTC_GENC, reg);
 	}
 
-	xlnx_stc_hori_off(base, &hori_off);
+	xlnx_stc_hori_off(base, &hori_off, vm->flags);
 	/* set up polarity */
 	memset(&polarity, 0x0, sizeof(polarity));
 	polarity.hsync = !!(vm->flags & DISPLAY_FLAGS_HSYNC_LOW);
diff --git a/drivers/gpu/drm/xlnx/xlnx_vtc.c b/drivers/gpu/drm/xlnx/xlnx_vtc.c
new file mode 100644
index 00000000000000..228ce56fde39f2
--- /dev/null
+++ b/drivers/gpu/drm/xlnx/xlnx_vtc.c
@@ -0,0 +1,408 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Video Timing Controller support for Xilinx DRM KMS
+ *
+ * Copyright (C) 2013 - 2018 Xilinx, Inc.
+ *
+ * Author: Hyun Woo Kwon <hyunk@xilinx.com>
+ *	   Saurabh Sengar <saurabhs@xilinx.com>
+ *	   Vishal Sagar <vishal.sagar@xilinx.com>
+ *
+ * This driver adds support to control the Xilinx Video Timing
+ * Controller connected to the CRTC.
+ */
+
+#include <drm/drmP.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <video/videomode.h>
+#include "xlnx_bridge.h"
+
+/* register offsets */
+#define XVTC_CTL		0x000
+#define XVTC_VER		0x010
+#define XVTC_GASIZE		0x060
+#define XVTC_GENC		0x068
+#define XVTC_GPOL		0x06c
+#define XVTC_GHSIZE		0x070
+#define XVTC_GVSIZE		0x074
+#define XVTC_GHSYNC		0x078
+#define XVTC_GVBHOFF_F0		0x07c
+#define XVTC_GVSYNC_F0		0x080
+#define XVTC_GVSHOFF_F0		0x084
+#define XVTC_GVBHOFF_F1		0x088
+#define XVTC_GVSYNC_F1		0x08C
+#define XVTC_GVSHOFF_F1		0x090
+#define XVTC_GASIZE_F1		0x094
+
+/* vtc control register bits */
+#define XVTC_CTL_SWRESET	BIT(31)
+#define XVTC_CTL_FIPSS		BIT(26)
+#define XVTC_CTL_ACPSS		BIT(25)
+#define XVTC_CTL_AVPSS		BIT(24)
+#define XVTC_CTL_HSPSS		BIT(23)
+#define XVTC_CTL_VSPSS		BIT(22)
+#define XVTC_CTL_HBPSS		BIT(21)
+#define XVTC_CTL_VBPSS		BIT(20)
+#define XVTC_CTL_VCSS		BIT(18)
+#define XVTC_CTL_VASS		BIT(17)
+#define XVTC_CTL_VBSS		BIT(16)
+#define XVTC_CTL_VSSS		BIT(15)
+#define XVTC_CTL_VFSS		BIT(14)
+#define XVTC_CTL_VTSS		BIT(13)
+#define XVTC_CTL_HBSS		BIT(11)
+#define XVTC_CTL_HSSS		BIT(10)
+#define XVTC_CTL_HFSS		BIT(9)
+#define XVTC_CTL_HTSS		BIT(8)
+#define XVTC_CTL_GE		BIT(2)
+#define XVTC_CTL_RU		BIT(1)
+
+/* vtc generator polarity register bits */
+#define XVTC_GPOL_FIP		BIT(6)
+#define XVTC_GPOL_ACP		BIT(5)
+#define XVTC_GPOL_AVP		BIT(4)
+#define XVTC_GPOL_HSP		BIT(3)
+#define XVTC_GPOL_VSP		BIT(2)
+#define XVTC_GPOL_HBP		BIT(1)
+#define XVTC_GPOL_VBP		BIT(0)
+
+/* vtc generator horizontal 1 */
+#define XVTC_GH1_BPSTART_MASK	GENMASK(28, 16)
+#define XVTC_GH1_BPSTART_SHIFT	16
+#define XVTC_GH1_SYNCSTART_MASK GENMASK(12, 0)
+/* vtc generator vertical 1 (field 0) */
+#define XVTC_GV1_BPSTART_MASK	GENMASK(28, 16)
+#define XVTC_GV1_BPSTART_SHIFT	16
+#define XVTC_GV1_SYNCSTART_MASK	GENMASK(12, 0)
+/* vtc generator/detector vblank/vsync horizontal offset registers */
+#define XVTC_XVXHOX_HEND_MASK	GENMASK(28, 16)
+#define XVTC_XVXHOX_HEND_SHIFT	16
+#define XVTC_XVXHOX_HSTART_MASK	GENMASK(12, 0)
+
+#define XVTC_GHFRAME_HSIZE	GENMASK(12, 0)
+#define XVTC_GVFRAME_HSIZE_F1	GENMASK(12, 0)
+#define XVTC_GA_ACTSIZE_MASK	GENMASK(12, 0)
+
+/* vtc generator encoding register bits */
+#define XVTC_GENC_INTERL	BIT(6)
+
+/**
+ * struct xlnx_vtc - Xilinx VTC object
+ *
+ * @bridge: xilinx bridge structure
+ * @dev: device structure
+ * @base: base addr
+ * @ppc: pixels per clock
+ */
+struct xlnx_vtc {
+	struct xlnx_bridge bridge;
+	struct device *dev;
+	void __iomem *base;
+	u32 ppc;
+};
+
+static inline void xlnx_vtc_writel(void __iomem *base, int offset, u32 val)
+{
+	writel(val, base + offset);
+}
+
+static inline u32 xlnx_vtc_readl(void __iomem *base, int offset)
+{
+	return readl(base + offset);
+}
+
+static inline struct xlnx_vtc *bridge_to_vtc(struct xlnx_bridge *bridge)
+{
+	return container_of(bridge, struct xlnx_vtc, bridge);
+}
+
+static void xlnx_vtc_reset(struct xlnx_vtc *vtc)
+{
+	u32 reg;
+
+	xlnx_vtc_writel(vtc->base, XVTC_CTL, XVTC_CTL_SWRESET);
+
+	/* enable register update */
+	reg = xlnx_vtc_readl(vtc->base, XVTC_CTL);
+	xlnx_vtc_writel(vtc->base, XVTC_CTL, reg | XVTC_CTL_RU);
+}
+
+/**
+ * xlnx_vtc_enable - Enable the VTC
+ * @bridge: xilinx bridge structure pointer
+ *
+ * Return:
+ * Zero on success.
+ *
+ * This function enables the VTC
+ */
+static int xlnx_vtc_enable(struct xlnx_bridge *bridge)
+{
+	u32 reg;
+	struct xlnx_vtc *vtc = bridge_to_vtc(bridge);
+
+	/* enable generator */
+	reg = xlnx_vtc_readl(vtc->base, XVTC_CTL);
+	xlnx_vtc_writel(vtc->base, XVTC_CTL, reg | XVTC_CTL_GE);
+	dev_dbg(vtc->dev, "enabled\n");
+	return 0;
+}
+
+/**
+ * xlnx_vtc_disable - Disable the VTC
+ * @bridge: xilinx bridge structure pointer
+ *
+ * This function disables and resets the VTC.
+ */
+static void xlnx_vtc_disable(struct xlnx_bridge *bridge)
+{
+	u32 reg;
+	struct xlnx_vtc *vtc = bridge_to_vtc(bridge);
+
+	/* disable generator and reset */
+	reg = xlnx_vtc_readl(vtc->base, XVTC_CTL);
+	xlnx_vtc_writel(vtc->base, XVTC_CTL, reg & ~XVTC_CTL_GE);
+	xlnx_vtc_reset(vtc);
+	dev_dbg(vtc->dev, "disabled\n");
+}
+
+/**
+ * xlnx_vtc_set_timing - Configures the VTC
+ * @bridge: xilinx bridge structure pointer
+ * @vm: video mode requested
+ *
+ * Return:
+ * Zero on success.
+ *
+ * This function calculates the timing values from the video mode
+ * structure passed from the CRTC and configures the VTC.
+ */
+static int xlnx_vtc_set_timing(struct xlnx_bridge *bridge,
+			       struct videomode *vm)
+{
+	u32 reg;
+	u32 htotal, hactive, hsync_start, hbackporch_start;
+	u32 vtotal, vactive, vsync_start, vbackporch_start;
+	struct xlnx_vtc *vtc = bridge_to_vtc(bridge);
+
+	reg = xlnx_vtc_readl(vtc->base, XVTC_CTL);
+	xlnx_vtc_writel(vtc->base, XVTC_CTL, reg & ~XVTC_CTL_RU);
+
+	vm->hactive /= vtc->ppc;
+	vm->hfront_porch /= vtc->ppc;
+	vm->hback_porch /= vtc->ppc;
+	vm->hsync_len /= vtc->ppc;
+
+	htotal = vm->hactive + vm->hfront_porch + vm->hsync_len +
+		 vm->hback_porch;
+	vtotal = vm->vactive + vm->vfront_porch + vm->vsync_len +
+		 vm->vback_porch;
+
+	hactive = vm->hactive;
+	vactive = vm->vactive;
+
+	hsync_start = vm->hactive + vm->hfront_porch;
+	vsync_start = vm->vactive + vm->vfront_porch;
+
+	hbackporch_start = hsync_start + vm->hsync_len;
+	vbackporch_start = vsync_start + vm->vsync_len;
+
+	dev_dbg(vtc->dev, "ha: %d, va: %d\n", hactive, vactive);
+	dev_dbg(vtc->dev, "ht: %d, vt: %d\n", htotal, vtotal);
+	dev_dbg(vtc->dev, "hs: %d, hb: %d\n", hsync_start, hbackporch_start);
+	dev_dbg(vtc->dev, "vs: %d, vb: %d\n", vsync_start, vbackporch_start);
+
+	reg = htotal & XVTC_GHFRAME_HSIZE;
+	xlnx_vtc_writel(vtc->base, XVTC_GHSIZE, reg);
+
+	reg = vtotal & XVTC_GVFRAME_HSIZE_F1;
+	reg |= reg << XVTC_GV1_BPSTART_SHIFT;
+	xlnx_vtc_writel(vtc->base, XVTC_GVSIZE, reg);
+
+	reg = hactive & XVTC_GA_ACTSIZE_MASK;
+	reg |= (vactive & XVTC_GA_ACTSIZE_MASK) << 16;
+	xlnx_vtc_writel(vtc->base, XVTC_GASIZE, reg);
+
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED)
+		xlnx_vtc_writel(vtc->base, XVTC_GASIZE_F1, reg);
+
+	reg = hsync_start & XVTC_GH1_SYNCSTART_MASK;
+	reg |= (hbackporch_start << XVTC_GH1_BPSTART_SHIFT) &
+	       XVTC_GH1_BPSTART_MASK;
+	xlnx_vtc_writel(vtc->base, XVTC_GHSYNC, reg);
+
+	reg = vsync_start & XVTC_GV1_SYNCSTART_MASK;
+	reg |= (vbackporch_start << XVTC_GV1_BPSTART_SHIFT) &
+	       XVTC_GV1_BPSTART_MASK;
+	xlnx_vtc_writel(vtc->base, XVTC_GVSYNC_F0, reg);
+
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED) {
+		xlnx_vtc_writel(vtc->base, XVTC_GVSYNC_F1, reg);
+		reg = xlnx_vtc_readl(vtc->base, XVTC_GENC) | XVTC_GENC_INTERL;
+		xlnx_vtc_writel(vtc->base, XVTC_GENC, reg);
+	} else {
+		reg = xlnx_vtc_readl(vtc->base, XVTC_GENC) & ~XVTC_GENC_INTERL;
+		xlnx_vtc_writel(vtc->base, XVTC_GENC, reg);
+	}
+
+	/* configure horizontal offset */
+	/* Calculate and update Generator VBlank Hori field 0 */
+	reg = hactive & XVTC_XVXHOX_HSTART_MASK;
+	reg |= (hactive << XVTC_XVXHOX_HEND_SHIFT) &
+		XVTC_XVXHOX_HEND_MASK;
+	xlnx_vtc_writel(vtc->base, XVTC_GVBHOFF_F0, reg);
+
+	/* Calculate and update Generator VSync Hori field 0 */
+	reg = hsync_start & XVTC_XVXHOX_HSTART_MASK;
+	reg |= (hsync_start << XVTC_XVXHOX_HEND_SHIFT) &
+		XVTC_XVXHOX_HEND_MASK;
+	xlnx_vtc_writel(vtc->base, XVTC_GVSHOFF_F0, reg);
+
+	/* Calculate and update Generator VBlank Hori field 1 */
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED) {
+		reg = hactive & XVTC_XVXHOX_HSTART_MASK;
+		reg |= (hactive << XVTC_XVXHOX_HEND_SHIFT) &
+			XVTC_XVXHOX_HEND_MASK;
+		xlnx_vtc_writel(vtc->base, XVTC_GVBHOFF_F1, reg);
+	}
+
+	/* Calculate and update Generator VBlank Hori field 1 */
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED) {
+		reg =  (hsync_start - (htotal / 2)) & XVTC_XVXHOX_HSTART_MASK;
+		reg |= ((hsync_start - (htotal / 2)) <<
+			XVTC_XVXHOX_HEND_SHIFT) & XVTC_XVXHOX_HEND_MASK;
+	} else {
+		reg =  hsync_start & XVTC_XVXHOX_HSTART_MASK;
+		reg |= (hsync_start << XVTC_XVXHOX_HEND_SHIFT) &
+			XVTC_XVXHOX_HEND_MASK;
+	}
+
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED)
+		xlnx_vtc_writel(vtc->base, XVTC_GVSHOFF_F1, reg);
+
+	/* configure polarity of signals */
+	reg = 0;
+	reg |= XVTC_GPOL_ACP;
+	reg |= XVTC_GPOL_AVP;
+	if (vm->flags & DISPLAY_FLAGS_INTERLACED)
+		reg |= XVTC_GPOL_FIP;
+	if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH) {
+		reg |= XVTC_GPOL_VBP;
+		reg |= XVTC_GPOL_VSP;
+	}
+	if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH) {
+		reg |= XVTC_GPOL_HBP;
+		reg |= XVTC_GPOL_HSP;
+	}
+	xlnx_vtc_writel(vtc->base, XVTC_GPOL, reg);
+
+	/* configure timing source */
+	reg = xlnx_vtc_readl(vtc->base, XVTC_CTL);
+	reg |= XVTC_CTL_VCSS;
+	reg |= XVTC_CTL_VASS;
+	reg |= XVTC_CTL_VBSS;
+	reg |= XVTC_CTL_VSSS;
+	reg |= XVTC_CTL_VFSS;
+	reg |= XVTC_CTL_VTSS;
+	reg |= XVTC_CTL_HBSS;
+	reg |= XVTC_CTL_HSSS;
+	reg |= XVTC_CTL_HFSS;
+	reg |= XVTC_CTL_HTSS;
+	xlnx_vtc_writel(vtc->base, XVTC_CTL, reg);
+
+	reg = xlnx_vtc_readl(vtc->base, XVTC_CTL);
+	xlnx_vtc_writel(vtc->base, XVTC_CTL, reg | XVTC_CTL_RU);
+	dev_dbg(vtc->dev, "set timing done\n");
+
+	return 0;
+}
+
+static int xlnx_vtc_probe(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct xlnx_vtc *vtc;
+	struct resource *res;
+	int ret;
+
+	vtc = devm_kzalloc(dev, sizeof(*vtc), GFP_KERNEL);
+	if (!vtc)
+		return -ENOMEM;
+
+	vtc->dev = dev;
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	if (!res) {
+		dev_err(dev, "failed to get resource for device\n");
+		return -EFAULT;
+	}
+
+	vtc->base = devm_ioremap_resource(dev, res);
+	if (IS_ERR(vtc->base)) {
+		dev_err(dev, "failed to remap io region\n");
+		return PTR_ERR(vtc->base);
+	}
+
+	platform_set_drvdata(pdev, vtc);
+
+	ret = of_property_read_u32(dev->of_node, "xlnx,pixels-per-clock",
+				   &vtc->ppc);
+	if (ret || (vtc->ppc != 1 && vtc->ppc != 2 && vtc->ppc != 4)) {
+		dev_err(dev, "failed to get ppc\n");
+		return ret;
+	}
+	dev_info(dev, "vtc ppc = %d\n", vtc->ppc);
+
+	xlnx_vtc_reset(vtc);
+
+	vtc->bridge.enable = &xlnx_vtc_enable;
+	vtc->bridge.disable = &xlnx_vtc_disable;
+	vtc->bridge.set_timing = &xlnx_vtc_set_timing;
+	vtc->bridge.of_node = dev->of_node;
+	ret = xlnx_bridge_register(&vtc->bridge);
+	if (ret) {
+		dev_err(dev, "Bridge registration failed\n");
+		return ret;
+	}
+
+	dev_info(dev, "Xilinx VTC IP version : 0x%08x\n",
+		 xlnx_vtc_readl(vtc->base, XVTC_VER));
+	dev_info(dev, "Xilinx VTC DRM Bridge driver probed\n");
+	return 0;
+}
+
+static int xlnx_vtc_remove(struct platform_device *pdev)
+{
+	struct xlnx_vtc *vtc = platform_get_drvdata(pdev);
+
+	xlnx_bridge_unregister(&vtc->bridge);
+
+	return 0;
+}
+
+static const struct of_device_id xlnx_vtc_of_match[] = {
+	{ .compatible = "xlnx,bridge-v-tc-6.1" },
+	{ /* end of table */ },
+};
+
+MODULE_DEVICE_TABLE(of, xlnx_vtc_of_match);
+
+static struct platform_driver xlnx_vtc_bridge_driver = {
+	.probe = xlnx_vtc_probe,
+	.remove = xlnx_vtc_remove,
+	.driver = {
+		.name = "xlnx,bridge-vtc",
+		.of_match_table = xlnx_vtc_of_match,
+	},
+};
+
+module_platform_driver(xlnx_vtc_bridge_driver);
+
+MODULE_AUTHOR("Vishal Sagar");
+MODULE_DESCRIPTION("Xilinx VTC Bridge Driver");
+MODULE_LICENSE("GPL v2");
+
diff --git a/drivers/gpu/drm/xlnx/zynqmp_disp.c b/drivers/gpu/drm/xlnx/zynqmp_disp.c
index 807fedebd3d320..f854e4c26dba91 100644
--- a/drivers/gpu/drm/xlnx/zynqmp_disp.c
+++ b/drivers/gpu/drm/xlnx/zynqmp_disp.c
@@ -69,6 +69,23 @@
  * - xlnx_crtc: Xilinx DRM specific crtc functions
  */
 
+/* The default value is ZYNQMP_DISP_AV_BUF_GFX_FMT_RGB565 */
+static uint zynqmp_disp_gfx_init_fmt;
+module_param_named(gfx_init_fmt, zynqmp_disp_gfx_init_fmt, uint, 0444);
+MODULE_PARM_DESC(gfx_init_fmt, "The initial format of the graphics layer\n"
+			       "\t\t0 = rgb565 (default)\n"
+			       "\t\t1 = rgb888\n"
+			       "\t\t2 = argb8888\n");
+/* These value should be mapped to index of av_buf_gfx_fmts[] */
+#define ZYNQMP_DISP_AV_BUF_GFX_FMT_RGB565		10
+#define ZYNQMP_DISP_AV_BUF_GFX_FMT_RGB888		5
+#define ZYNQMP_DISP_AV_BUF_GFX_FMT_ARGB8888		1
+static const u32 zynqmp_disp_gfx_init_fmts[] = {
+	ZYNQMP_DISP_AV_BUF_GFX_FMT_RGB565,
+	ZYNQMP_DISP_AV_BUF_GFX_FMT_RGB888,
+	ZYNQMP_DISP_AV_BUF_GFX_FMT_ARGB8888,
+};
+
 /* Blender registers */
 #define ZYNQMP_DISP_V_BLEND_BG_CLR_0			0x0
 #define ZYNQMP_DISP_V_BLEND_BG_CLR_1			0x4
@@ -1007,7 +1024,6 @@ static const struct zynqmp_disp_fmt av_buf_vid_fmts[] = {
 };
 
 /* List of graphics layer formats */
-#define ZYNQMP_DISP_AV_BUF_GFX_FMT_RGB565	10
 static const struct zynqmp_disp_fmt av_buf_gfx_fmts[] = {
 	{
 		.drm_fmt	= DRM_FORMAT_ABGR8888,
@@ -2655,6 +2671,9 @@ zynqmp_disp_plane_atomic_async_update(struct drm_plane *plane,
 	struct drm_plane_state *old_state =
 		drm_atomic_get_old_plane_state(new_state->state, plane);
 
+	if (plane->state->fb == new_state->fb)
+		return;
+
 	 /* Update the current state with new configurations */
 	drm_atomic_set_fb_for_plane(plane->state, new_state->fb);
 	plane->state->crtc = new_state->crtc;
@@ -2860,6 +2879,7 @@ zynqmp_disp_crtc_atomic_disable(struct drm_crtc *crtc,
 	zynqmp_disp_clk_disable(disp->pclk, &disp->pclk_en);
 	zynqmp_disp_plane_disable(crtc->primary);
 	zynqmp_disp_disable(disp, true);
+	drm_crtc_vblank_off(crtc);
 	pm_runtime_put_sync(disp->dev);
 }
 
@@ -2873,6 +2893,7 @@ static void
 zynqmp_disp_crtc_atomic_begin(struct drm_crtc *crtc,
 			      struct drm_crtc_state *old_crtc_state)
 {
+	drm_crtc_vblank_on(crtc);
 	/* Don't rely on vblank when disabling crtc */
 	spin_lock_irq(&crtc->dev->event_lock);
 	if (crtc->primary->state->fb && crtc->state->event) {
@@ -3077,6 +3098,7 @@ static int zynqmp_disp_enumerate_fmts(struct zynqmp_disp *disp)
 	struct zynqmp_disp_layer *layer;
 	u32 *bus_fmts;
 	u32 i, size, num_bus_fmts;
+	u32 gfx_fmt = ZYNQMP_DISP_AV_BUF_GFX_FMT_RGB565;
 
 	num_bus_fmts = ARRAY_SIZE(av_buf_live_fmts);
 	bus_fmts = devm_kzalloc(disp->dev, sizeof(*bus_fmts) * num_bus_fmts,
@@ -3113,7 +3135,9 @@ static int zynqmp_disp_enumerate_fmts(struct zynqmp_disp *disp)
 
 	for (i = 0; i < layer->num_fmts; i++)
 		layer->drm_fmts[i] = av_buf_gfx_fmts[i].drm_fmt;
-	layer->fmt = &av_buf_gfx_fmts[ZYNQMP_DISP_AV_BUF_GFX_FMT_RGB565];
+	if (zynqmp_disp_gfx_init_fmt < ARRAY_SIZE(zynqmp_disp_gfx_init_fmts))
+		gfx_fmt = zynqmp_disp_gfx_init_fmts[zynqmp_disp_gfx_init_fmt];
+	layer->fmt = &av_buf_gfx_fmts[gfx_fmt];
 
 	return 0;
 }
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.c b/drivers/gpu/drm/xlnx/zynqmp_dp.c
index 1f97cfddb8fbcc..4ee492ccaac404 100644
--- a/drivers/gpu/drm/xlnx/zynqmp_dp.c
+++ b/drivers/gpu/drm/xlnx/zynqmp_dp.c
@@ -470,6 +470,7 @@ void zynqmp_dp_disable_vblank(struct zynqmp_dp *dp)
  *
  * Return: 0 if the phy instances are initialized correctly, or the error code
  * returned from the callee functions.
+ * Note: We can call this function without any phy lane assigned to DP.
  */
 static int zynqmp_dp_init_phy(struct zynqmp_dp *dp)
 {
@@ -483,14 +484,12 @@ static int zynqmp_dp_init_phy(struct zynqmp_dp *dp)
 			return ret;
 		}
 	}
-
-	zynqmp_dp_write(dp->iomem, ZYNQMP_DP_SUB_TX_INTR_DS,
-			ZYNQMP_DP_TX_INTR_ALL);
-	zynqmp_dp_clr(dp->iomem, ZYNQMP_DP_TX_PHY_CONFIG,
-		      ZYNQMP_DP_TX_PHY_CONFIG_ALL_RESET);
-
 	/* Wait for PLL to be locked for the primary (1st) lane */
 	if (dp->phy[0]) {
+		zynqmp_dp_write(dp->iomem, ZYNQMP_DP_SUB_TX_INTR_DS,
+				ZYNQMP_DP_TX_INTR_ALL);
+		zynqmp_dp_clr(dp->iomem, ZYNQMP_DP_TX_PHY_CONFIG,
+				ZYNQMP_DP_TX_PHY_CONFIG_ALL_RESET);
 		ret = xpsgtr_wait_pll_lock(dp->phy[0]);
 		if (ret) {
 			dev_err(dp->dev, "failed to lock pll\n");
@@ -551,6 +550,29 @@ static int zynqmp_dp_phy_ready(struct zynqmp_dp *dp)
 	return 0;
 }
 
+/*
+ * Power Management functions
+ */
+/**
+ * zynqmp_dp_pm_resume - Resume DP IP
+ * @dp: DisplayPort IP core structure
+ *
+ * Resume the DP IP including PHY and pipeline.
+ */
+void zynqmp_dp_pm_resume(struct zynqmp_dp *dp)
+{
+	zynqmp_dp_init_phy(dp);
+}
+/**
+ * zynqmp_dp_pm_suspend - Suspend DP IP
+ * @dp: DisplayPort IP core structure
+ *
+ * Suspend the DP IP including PHY and pipeline.
+ */
+void zynqmp_dp_pm_suspend(struct zynqmp_dp *dp)
+{
+	zynqmp_dp_exit_phy(dp);
+}
 /*
  * DP functions
  */
@@ -1642,6 +1664,9 @@ int zynqmp_dp_bind(struct device *dev, struct device *master, void *data)
 	struct device_node *port;
 	int ret;
 
+	if (!dp->num_lanes)
+		return 0;
+
 	encoder->possible_crtcs |= zynqmp_disp_get_crtc_mask(dpsub->disp);
 	for_each_child_of_node(dev->of_node, port) {
 		if (!port->name || of_node_cmp(port->name, "port"))
@@ -1704,8 +1729,11 @@ void zynqmp_dp_unbind(struct device *dev, struct device *master, void *data)
 	struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
 	struct zynqmp_dp *dp = dpsub->dp;
 
-	cancel_delayed_work_sync(&dp->hpd_work);
 	disable_irq(dp->irq);
+	if (!dp->num_lanes)
+		return;
+
+	cancel_delayed_work_sync(&dp->hpd_work);
 	zynqmp_dp_exit_aux(dp);
 	drm_property_destroy(dp->drm, dp->bpc_prop);
 	drm_property_destroy(dp->drm, dp->sync_prop);
@@ -1797,18 +1825,30 @@ int zynqmp_dp_probe(struct platform_device *pdev)
 		snprintf(phy_name, sizeof(phy_name), "dp-phy%d", i);
 		dp->phy[i] = devm_phy_get(dp->dev, phy_name);
 		if (IS_ERR(dp->phy[i])) {
+			ret = PTR_ERR(dp->phy[i]);
+			dp->phy[i] = NULL;
+
 			/* 2nd lane is optional */
-			if (i == 0 || PTR_ERR(dp->phy[i]) != -ENODEV) {
-				if (PTR_ERR(dp->phy[i]) != -EPROBE_DEFER) {
-					dev_err(dp->dev,
-						"failed to get phy lane\n");
-				}
-				ret = PTR_ERR(dp->phy[i]);
-				dp->phy[i] = NULL;
-				return ret;
+			if (i == 1 && ret == -ENODEV) {
+				dp->num_lanes = 1;
+				break;
 			}
-			dp->phy[i] = NULL;
-			dp->num_lanes = 1;
+
+			/*
+			 * If no phy lane is assigned, the DP Tx gets disabled.
+			 * The display part of the DP subsystem can still be
+			 * used to drive the output to FPGA, thus let the DP
+			 * subsystem driver to proceed without this DP Tx.
+			 */
+			if (i == 0 && ret == -ENODEV) {
+				dp->num_lanes = 0;
+				goto out;
+			}
+
+			if (ret != -EPROBE_DEFER)
+				dev_err(dp->dev, "failed to get phy lane\n");
+
+			return ret;
 		}
 	}
 
@@ -1825,6 +1865,7 @@ int zynqmp_dp_probe(struct platform_device *pdev)
 		goto error;
 	}
 
+out:
 	irq = platform_get_irq(pdev, 0);
 	if (irq < 0) {
 		ret = irq;
@@ -1842,6 +1883,10 @@ int zynqmp_dp_probe(struct platform_device *pdev)
 	dpsub->dp = dp;
 	dp->dpsub = dpsub;
 
+	dev_dbg(dp->dev,
+		"ZynqMP DisplayPort Tx driver probed with %u phy lanes\n",
+		dp->num_lanes);
+
 	return 0;
 
 error:
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dp.h b/drivers/gpu/drm/xlnx/zynqmp_dp.h
index 2d7cb8a82fd041..2f6ce3f3e8cfe6 100644
--- a/drivers/gpu/drm/xlnx/zynqmp_dp.h
+++ b/drivers/gpu/drm/xlnx/zynqmp_dp.h
@@ -27,7 +27,8 @@ void zynqmp_dp_enable_vblank(struct zynqmp_dp *dp);
 void zynqmp_dp_disable_vblank(struct zynqmp_dp *dp);
 void zynqmp_dp_encoder_mode_set_stream(struct zynqmp_dp *dp,
 				       struct drm_display_mode *mode);
-
+void __maybe_unused zynqmp_dp_pm_suspend(struct zynqmp_dp *dp);
+void __maybe_unused zynqmp_dp_pm_resume(struct zynqmp_dp *dp);
 int zynqmp_dp_bind(struct device *dev, struct device *master, void *data);
 void zynqmp_dp_unbind(struct device *dev, struct device *master, void *data);
 
diff --git a/drivers/gpu/drm/xlnx/zynqmp_dpsub.c b/drivers/gpu/drm/xlnx/zynqmp_dpsub.c
index c1a84827a78123..9b3545348f7b53 100644
--- a/drivers/gpu/drm/xlnx/zynqmp_dpsub.c
+++ b/drivers/gpu/drm/xlnx/zynqmp_dpsub.c
@@ -19,6 +19,7 @@
 #include <linux/component.h>
 #include <linux/module.h>
 #include <linux/of_platform.h>
+#include <linux/of_reserved_mem.h>
 #include <linux/platform_device.h>
 #include <linux/pm_runtime.h>
 
@@ -86,11 +87,14 @@ static int zynqmp_dpsub_probe(struct platform_device *pdev)
 	if (ret)
 		goto err_disp;
 
+	/* Try the reserved memory. Proceed if there's none */
+	of_reserved_mem_device_init(&pdev->dev);
+
 	/* Populate the sound child nodes */
 	ret = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
 	if (ret) {
 		dev_err(&pdev->dev, "failed to populate child nodes\n");
-		goto err_component;
+		goto err_rmem;
 	}
 
 	dpsub->master = xlnx_drm_pipeline_init(pdev);
@@ -105,7 +109,8 @@ static int zynqmp_dpsub_probe(struct platform_device *pdev)
 
 err_populate:
 	of_platform_depopulate(&pdev->dev);
-err_component:
+err_rmem:
+	of_reserved_mem_device_release(&pdev->dev);
 	component_del(&pdev->dev, &zynqmp_dpsub_component_ops);
 err_disp:
 	zynqmp_disp_remove(pdev);
@@ -123,6 +128,7 @@ static int zynqmp_dpsub_remove(struct platform_device *pdev)
 
 	xlnx_drm_pipeline_exit(dpsub->master);
 	of_platform_depopulate(&pdev->dev);
+	of_reserved_mem_device_release(&pdev->dev);
 	component_del(&pdev->dev, &zynqmp_dpsub_component_ops);
 
 	err = zynqmp_disp_remove(pdev);
@@ -138,6 +144,33 @@ static int zynqmp_dpsub_remove(struct platform_device *pdev)
 	return err;
 }
 
+static int __maybe_unused zynqmp_dpsub_pm_suspend(struct device *dev)
+{
+	struct platform_device *pdev =
+		container_of(dev, struct platform_device, dev);
+	struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
+
+	zynqmp_dp_pm_suspend(dpsub->dp);
+
+	return 0;
+}
+
+static int __maybe_unused zynqmp_dpsub_pm_resume(struct device *dev)
+{
+	struct platform_device *pdev =
+		container_of(dev, struct platform_device, dev);
+	struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
+
+	zynqmp_dp_pm_resume(dpsub->dp);
+
+	return 0;
+}
+
+static const struct dev_pm_ops zynqmp_dpsub_pm_ops = {
+	SET_SYSTEM_SLEEP_PM_OPS(zynqmp_dpsub_pm_suspend,
+			zynqmp_dpsub_pm_resume)
+};
+
 static const struct of_device_id zynqmp_dpsub_of_match[] = {
 	{ .compatible = "xlnx,zynqmp-dpsub-1.7", },
 	{ /* end of table */ },
@@ -150,6 +183,7 @@ static struct platform_driver zynqmp_dpsub_driver = {
 	.driver			= {
 		.name		= "zynqmp-display",
 		.of_match_table	= zynqmp_dpsub_of_match,
+		.pm             = &zynqmp_dpsub_pm_ops,
 	},
 };
 
diff --git a/drivers/iio/adc/xilinx-ams.c b/drivers/iio/adc/xilinx-ams.c
index 7eaebb72099406..cc3b9aebbee404 100644
--- a/drivers/iio/adc/xilinx-ams.c
+++ b/drivers/iio/adc/xilinx-ams.c
@@ -358,17 +358,11 @@ static int ams_read_raw(struct iio_dev *indio_dev,
 				else
 					*val = AMS_SUPPLY_SCALE_6VOLT;
 				break;
-			case AMS_VCC_PSPLL0:
-			case AMS_VCC_PSPLL3:
-			case AMS_VCCINT:
-			case AMS_VCCBRAM:
-			case AMS_VCCAUX:
-			case AMS_PSDDRPLL:
-			case AMS_PSINTFPDDR:
-				*val = AMS_SUPPLY_SCALE_3VOLT;
-				break;
 			default:
-				*val = AMS_SUPPLY_SCALE_1VOLT;
+				if (chan->scan_index >= (PS_SEQ_MAX * 3))
+					*val = AMS_SUPPLY_SCALE_3VOLT;
+				else
+					*val = AMS_SUPPLY_SCALE_1VOLT;
 				break;
 			}
 			*val2 = AMS_SUPPLY_SCALE_DIV_BIT;
diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
index 2882bcc517f04b..95517e3cb3fbd5 100644
--- a/drivers/iio/adc/xilinx-xadc-core.c
+++ b/drivers/iio/adc/xilinx-xadc-core.c
@@ -322,6 +322,7 @@ static irqreturn_t xadc_zynq_interrupt_handler(int irq, void *devid)
 
 #define XADC_ZYNQ_TCK_RATE_MAX 50000000
 #define XADC_ZYNQ_IGAP_DEFAULT 20
+#define XADC_ZYNQ_PCAP_RATE_MAX 200000000
 
 static int xadc_zynq_setup(struct platform_device *pdev,
 	struct iio_dev *indio_dev, int irq)
@@ -332,6 +333,7 @@ static int xadc_zynq_setup(struct platform_device *pdev,
 	unsigned int div;
 	unsigned int igap;
 	unsigned int tck_rate;
+	int ret;
 
 	/* TODO: Figure out how to make igap and tck_rate configurable */
 	igap = XADC_ZYNQ_IGAP_DEFAULT;
@@ -341,8 +343,13 @@ static int xadc_zynq_setup(struct platform_device *pdev,
 
 	pcap_rate = clk_get_rate(xadc->clk);
 
-	if (tck_rate > XADC_ZYNQ_TCK_RATE_MAX)
-		tck_rate = XADC_ZYNQ_TCK_RATE_MAX;
+	if (pcap_rate > XADC_ZYNQ_PCAP_RATE_MAX) {
+		ret = clk_set_rate(xadc->clk,
+				   (unsigned long)XADC_ZYNQ_PCAP_RATE_MAX);
+		if (ret)
+			return ret;
+	}
+
 	if (tck_rate > pcap_rate / 2) {
 		div = 2;
 	} else {
@@ -368,6 +375,12 @@ static int xadc_zynq_setup(struct platform_device *pdev,
 			XADC_ZYNQ_CFG_REDGE | XADC_ZYNQ_CFG_WEDGE |
 			tck_div | XADC_ZYNQ_CFG_IGAP(igap));
 
+	if (pcap_rate > XADC_ZYNQ_PCAP_RATE_MAX) {
+		ret = clk_set_rate(xadc->clk, pcap_rate);
+		if (ret)
+			return ret;
+	}
+
 	return 0;
 }
 
@@ -888,6 +901,9 @@ static int xadc_write_raw(struct iio_dev *indio_dev,
 	unsigned long clk_rate = xadc_get_dclk_rate(xadc);
 	unsigned int div;
 
+	if (!clk_rate)
+		return -EINVAL;
+
 	if (info != IIO_CHAN_INFO_SAMP_FREQ)
 		return -EINVAL;
 
@@ -1045,7 +1061,7 @@ static int xadc_parse_dt(struct iio_dev *indio_dev, struct device_node *np,
 	unsigned int num_channels;
 	const char *external_mux;
 	u32 ext_mux_chan;
-	int reg;
+	u32 reg;
 	int ret;
 
 	*conf = 0;
@@ -1211,8 +1227,8 @@ static int xadc_probe(struct platform_device *pdev)
 	if (ret)
 		goto err_free_samplerate_trigger;
 
-	ret = request_irq(irq, xadc->ops->interrupt_handler, 0,
-			dev_name(&pdev->dev), indio_dev);
+	ret = devm_request_irq(&pdev->dev, irq, xadc->ops->interrupt_handler, 0,
+			       dev_name(&pdev->dev), indio_dev);
 	if (ret)
 		goto err_clk_disable_unprepare;
 
@@ -1222,7 +1238,7 @@ static int xadc_probe(struct platform_device *pdev)
 
 	ret = xadc_write_adc_reg(xadc, XADC_REG_CONF0, conf0);
 	if (ret)
-		goto err_free_irq;
+		goto err_clk_disable_unprepare;
 
 	bipolar_mask = 0;
 	for (i = 0; i < indio_dev->num_channels; i++) {
@@ -1232,15 +1248,17 @@ static int xadc_probe(struct platform_device *pdev)
 
 	ret = xadc_write_adc_reg(xadc, XADC_REG_INPUT_MODE(0), bipolar_mask);
 	if (ret)
-		goto err_free_irq;
+		goto err_clk_disable_unprepare;
 	ret = xadc_write_adc_reg(xadc, XADC_REG_INPUT_MODE(1),
 		bipolar_mask >> 16);
 	if (ret)
-		goto err_free_irq;
+		goto err_clk_disable_unprepare;
 
 	/* Disable all alarms */
-	xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_ALARM_MASK,
-		XADC_CONF1_ALARM_MASK);
+	ret = xadc_update_adc_reg(xadc, XADC_REG_CONF1, XADC_CONF1_ALARM_MASK,
+				  XADC_CONF1_ALARM_MASK);
+	if (ret)
+		goto err_clk_disable_unprepare;
 
 	/* Set thresholds to min/max */
 	for (i = 0; i < 16; i++) {
@@ -1261,14 +1279,14 @@ static int xadc_probe(struct platform_device *pdev)
 
 	ret = iio_device_register(indio_dev);
 	if (ret)
-		goto err_free_irq;
+		goto err_clk_disable_unprepare;
 
 	platform_set_drvdata(pdev, indio_dev);
 
 	return 0;
 
-err_free_irq:
-	free_irq(irq, indio_dev);
+err_clk_disable_unprepare:
+	clk_disable_unprepare(xadc->clk);
 err_free_samplerate_trigger:
 	if (xadc->ops->flags & XADC_FLAGS_BUFFERED)
 		iio_trigger_free(xadc->samplerate_trigger);
@@ -1278,8 +1296,6 @@ static int xadc_probe(struct platform_device *pdev)
 err_triggered_buffer_cleanup:
 	if (xadc->ops->flags & XADC_FLAGS_BUFFERED)
 		iio_triggered_buffer_cleanup(indio_dev);
-err_clk_disable_unprepare:
-	clk_disable_unprepare(xadc->clk);
 err_device_free:
 	kfree(indio_dev->channels);
 
@@ -1290,7 +1306,6 @@ static int xadc_remove(struct platform_device *pdev)
 {
 	struct iio_dev *indio_dev = platform_get_drvdata(pdev);
 	struct xadc *xadc = iio_priv(indio_dev);
-	int irq = platform_get_irq(pdev, 0);
 
 	iio_device_unregister(indio_dev);
 	if (xadc->ops->flags & XADC_FLAGS_BUFFERED) {
@@ -1298,7 +1313,6 @@ static int xadc_remove(struct platform_device *pdev)
 		iio_trigger_free(xadc->convst_trigger);
 		iio_triggered_buffer_cleanup(indio_dev);
 	}
-	free_irq(irq, indio_dev);
 	clk_disable_unprepare(xadc->clk);
 	cancel_delayed_work(&xadc->zynq_unmask_work);
 	kfree(xadc->data);
diff --git a/drivers/media/platform/xilinx/xilinx-dma.c b/drivers/media/platform/xilinx/xilinx-dma.c
index 2f173f11214b9e..fed23aa4942a9c 100644
--- a/drivers/media/platform/xilinx/xilinx-dma.c
+++ b/drivers/media/platform/xilinx/xilinx-dma.c
@@ -608,10 +608,12 @@ static int xvip_dma_start_streaming(struct vb2_queue *vq, unsigned int count)
 	 * Use the pipeline object embedded in the first DMA object that starts
 	 * streaming.
 	 */
+	mutex_lock(&dma->xdev->lock);
 	pipe = dma->video.entity.pipe
 	     ? to_xvip_pipeline(&dma->video.entity) : &dma->pipe;
 
 	ret = media_pipeline_start(&dma->video.entity, &pipe->pipe);
+	mutex_unlock(&dma->xdev->lock);
 	if (ret < 0)
 		goto error;
 
diff --git a/drivers/media/platform/xilinx/xilinx-sdirxss.c b/drivers/media/platform/xilinx/xilinx-sdirxss.c
index 1d360d1592b819..5d22324ef950cd 100644
--- a/drivers/media/platform/xilinx/xilinx-sdirxss.c
+++ b/drivers/media/platform/xilinx/xilinx-sdirxss.c
@@ -253,7 +253,7 @@
  * @XSDIRX_SMPTE_ST_296: SMPTE ST 296 detected with AP 1280x720
  * @XSDIRX_SMPTE_ST_2048_2: SMPTE ST 2048-2 detected with AP 2048x1080
  * @XSDIRX_SMPTE_ST_295: SMPTE ST 295 detected with AP 1920x1080
- * @XSDIRX_NTSC: NTSC encoding detected with AP 720x480
+ * @XSDIRX_NTSC: NTSC encoding detected with AP 720x486
  * @XSDIRX_PAL: PAL encoding detected with AP 720x576
  * @XSDIRX_TS_UNKNOWN: Unknown SMPTE Transport family type
  */
@@ -725,7 +725,7 @@ static int xsdirx_get_stream_properties(struct xsdirxss_state *state)
 		switch (family) {
 		case XSDIRX_NTSC:
 			format->width = 720;
-			format->height = 480;
+			format->height = 486;
 			break;
 		case XSDIRX_PAL:
 			format->width = 720;
diff --git a/drivers/media/platform/xilinx/xilinx-vipp.c b/drivers/media/platform/xilinx/xilinx-vipp.c
index 6a1f424aa7c00b..b9a1acabbdae54 100644
--- a/drivers/media/platform/xilinx/xilinx-vipp.c
+++ b/drivers/media/platform/xilinx/xilinx-vipp.c
@@ -662,6 +662,7 @@ static int xvip_composite_probe(struct platform_device *pdev)
 		return -ENOMEM;
 
 	xdev->dev = &pdev->dev;
+	mutex_init(&xdev->lock);
 	INIT_LIST_HEAD(&xdev->entities);
 	INIT_LIST_HEAD(&xdev->dmas);
 
@@ -688,6 +689,7 @@ static int xvip_composite_remove(struct platform_device *pdev)
 {
 	struct xvip_composite_device *xdev = platform_get_drvdata(pdev);
 
+	mutex_destroy(&xdev->lock);
 	xvip_graph_cleanup(xdev);
 	xvip_composite_v4l2_cleanup(xdev);
 
diff --git a/drivers/media/platform/xilinx/xilinx-vipp.h b/drivers/media/platform/xilinx/xilinx-vipp.h
index 39a3538beef759..5695cd8438af30 100644
--- a/drivers/media/platform/xilinx/xilinx-vipp.h
+++ b/drivers/media/platform/xilinx/xilinx-vipp.h
@@ -32,6 +32,7 @@
  * @num_subdevs: number of subdevs in the pipeline
  * @dmas: list of DMA channels at the pipeline output and input
  * @v4l2_caps: V4L2 capabilities of the whole device (see VIDIOC_QUERYCAP)
+ * @lock: This is to ensure all dma path entities acquire same pipeline object
  */
 struct xvip_composite_device {
 	struct v4l2_device v4l2_dev;
@@ -44,6 +45,7 @@ struct xvip_composite_device {
 
 	struct list_head dmas;
 	u32 v4l2_caps;
+	struct mutex lock; /* lock to protect xvip pipeline instance */
 };
 
 bool xvip_subdev_set_streaming(struct xvip_composite_device *xdev,
diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 561f7a4c5d4838..17f747143bc289 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -330,7 +330,9 @@ static int read_ear(struct spi_nor *nor, struct flash_info *info)
 	if (JEDEC_MFR(info) == CFI_MFR_AMD)
 		code = SPINOR_OP_BRRD;
 	/* This is actually Micron */
-	else if (JEDEC_MFR(info) == CFI_MFR_ST)
+	else if (JEDEC_MFR(info) == CFI_MFR_ST ||
+		 JEDEC_MFR(info) == CFI_MFR_MACRONIX ||
+		 JEDEC_MFR(info) == CFI_MFR_ISSI)
 		code = SPINOR_OP_RDEAR;
 	else
 		return -EINVAL;
@@ -494,7 +496,9 @@ static int write_ear(struct spi_nor *nor, u32 addr)
 
 	if (nor->jedec_id == CFI_MFR_AMD)
 		code = SPINOR_OP_BRWR;
-	if (nor->jedec_id == CFI_MFR_ST) {
+	if (nor->jedec_id == CFI_MFR_ST ||
+	    nor->jedec_id == CFI_MFR_MACRONIX ||
+	    nor->jedec_id == CFI_MFR_ISSI) {
 		write_enable(nor);
 		code = SPINOR_OP_WREAR;
 	}
@@ -1346,6 +1350,16 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "640s33b",  INFO(0x898913, 0, 64 * 1024, 128, 0) },
 
 	/* ISSI */
+	{ "is25lp080d", INFO(0x9d6014, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
+	{ "is25wp080d", INFO(0x9d7014, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
+	{ "is25lp016d", INFO(0x9d6015, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
+	{ "is25wp016d", INFO(0x9d7015, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
+	{ "is25lp032d", INFO(0x9d6016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
+	{ "is25wp032d", INFO(0x9d7016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
+	{ "is25lp064a", INFO(0x9d6017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
+	{ "is25wp064a", INFO(0x9d7017, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
+	{ "is25lp128f", INFO(0x9d6018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
+	{ "is25wp128f", INFO(0x9d7018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
 	{ "is25lp256d", INFO(0x9d6019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
 	{ "is25wp256d", INFO(0x9d7019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_HAS_LOCK) },
 	{ "is25cd512", INFO(0x7f9d20, 0, 32 * 1024,   2, SECT_4K) },
@@ -3275,6 +3289,9 @@ int spi_nor_scan(struct spi_nor *nor, const char *name,
 	if (info->flags & USE_CLSR)
 		nor->flags |= SNOR_F_USE_CLSR;
 
+	if (nor->shift)
+		mtd->erasesize = info->sector_size;
+
 #ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
 	/* prefer "small sector" erase if possible */
 	if (nor->shift &&
diff --git a/drivers/net/ethernet/cadence/Kconfig b/drivers/net/ethernet/cadence/Kconfig
index 13714830c3a28a..427d65a1a12610 100644
--- a/drivers/net/ethernet/cadence/Kconfig
+++ b/drivers/net/ethernet/cadence/Kconfig
@@ -22,7 +22,6 @@ config MACB
 	tristate "Cadence MACB/GEM support"
 	depends on HAS_DMA
 	select PHYLIB
-	select PTP_1588_CLOCK
 	---help---
 	  The Cadence MACB ethernet interface is found on many Atmel AT32 and
 	  AT91 parts.  This driver also supports the Cadence GEM (Gigabit
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index 2624fc225e3a6e..16f867fafd831d 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -321,54 +321,52 @@ static void macb_get_hwaddr(struct macb *bp)
 	eth_hw_addr_random(bp->dev);
 }
 
-static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
+static int macb_mdio_wait_for_idle(struct macb *bp)
 {
-	struct macb *bp = bus->priv;
-	int value;
-	int err;
 	ulong timeout;
 
-	err = pm_runtime_get_sync(&bp->pdev->dev);
-	if (err < 0)
-		return err;
-
 	timeout = jiffies + msecs_to_jiffies(1000);
 	/* wait for end of transfer */
-	do {
+	while (1) {
 		if (MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
 			break;
 
-		cpu_relax();
-	} while (!time_after_eq(jiffies, timeout));
+		if (time_after_eq(jiffies, timeout)) {
+			netdev_err(bp->dev, "wait for end of transfer timed out\n");
+			pm_runtime_mark_last_busy(&bp->pdev->dev);
+			pm_runtime_put_autosuspend(&bp->pdev->dev);
+			return -ETIMEDOUT;
+		}
 
-	if (time_after_eq(jiffies, timeout)) {
-		netdev_err(bp->dev, "wait for end of transfer timed out\n");
-		pm_runtime_mark_last_busy(&bp->pdev->dev);
-		pm_runtime_put_autosuspend(&bp->pdev->dev);
-		return -ETIMEDOUT;
+		cpu_relax();
 	}
 
+	return 0;
+}
+
+static int macb_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
+{
+	struct macb *bp = bus->priv;
+	int value;
+	int err;
+
+	err = pm_runtime_get_sync(&bp->pdev->dev);
+	if (err < 0)
+		return err;
+
+	err = macb_mdio_wait_for_idle(bp);
+	if (err < 0)
+		return err;
+
 	macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
 			      | MACB_BF(RW, MACB_MAN_READ)
 			      | MACB_BF(PHYA, mii_id)
 			      | MACB_BF(REGA, regnum)
 			      | MACB_BF(CODE, MACB_MAN_CODE)));
 
-	timeout = jiffies + msecs_to_jiffies(1000);
-	/* wait for end of transfer */
-	do {
-		if (MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
-			break;
-
-		cpu_relax();
-	} while (!time_after_eq(jiffies, timeout));
-
-	if (time_after_eq(jiffies, timeout)) {
-		netdev_err(bp->dev, "wait for end of transfer timed out\n");
-		pm_runtime_mark_last_busy(&bp->pdev->dev);
-		pm_runtime_put_autosuspend(&bp->pdev->dev);
-		return -ETIMEDOUT;
-	}
+	err = macb_mdio_wait_for_idle(bp);
+	if (err < 0)
+		return err;
 
 	value = MACB_BFEXT(DATA, macb_readl(bp, MAN));
 
@@ -382,27 +380,14 @@ static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
 {
 	struct macb *bp = bus->priv;
 	int err;
-	ulong timeout;
 
 	err = pm_runtime_get_sync(&bp->pdev->dev);
 	if (err < 0)
 		return err;
 
-	timeout = jiffies + msecs_to_jiffies(1000);
-	/* wait for end of transfer */
-	do {
-		if (MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
-			break;
-
-		cpu_relax();
-	} while (!time_after_eq(jiffies, timeout));
-
-	if (time_after_eq(jiffies, timeout)) {
-		netdev_err(bp->dev, "wait for end of transfer timed out\n");
-		pm_runtime_mark_last_busy(&bp->pdev->dev);
-		pm_runtime_put_autosuspend(&bp->pdev->dev);
-		return -ETIMEDOUT;
-	}
+	err = macb_mdio_wait_for_idle(bp);
+	if (err < 0)
+		return err;
 
 	macb_writel(bp, MAN, (MACB_BF(SOF, MACB_MAN_SOF)
 			      | MACB_BF(RW, MACB_MAN_WRITE)
@@ -411,21 +396,9 @@ static int macb_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
 			      | MACB_BF(CODE, MACB_MAN_CODE)
 			      | MACB_BF(DATA, value)));
 
-	timeout = jiffies + msecs_to_jiffies(1000);
-	/* wait for end of transfer */
-	do {
-		if (MACB_BFEXT(IDLE, macb_readl(bp, NSR)))
-			break;
-
-		cpu_relax();
-	} while (!time_after_eq(jiffies, timeout));
-
-	if (time_after_eq(jiffies, timeout)) {
-		netdev_err(bp->dev, "wait for end of transfer timed out\n");
-		pm_runtime_mark_last_busy(&bp->pdev->dev);
-		pm_runtime_put_autosuspend(&bp->pdev->dev);
-		return -ETIMEDOUT;
-	}
+	err = macb_mdio_wait_for_idle(bp);
+	if (err < 0)
+		return err;
 
 	pm_runtime_mark_last_busy(&bp->pdev->dev);
 	pm_runtime_put_autosuspend(&bp->pdev->dev);
@@ -635,7 +608,7 @@ static int macb_mii_init(struct macb *bp)
 		of_node_put(mdio_np);
 		err = of_mdiobus_register(bp->mii_bus, mdio_np);
 		if (err)
-			goto err_out_unregister_bus;
+			goto err_out_free_mdiobus;
 	} else if (np) {
 		/* try dt phy registration */
 		err = of_mdiobus_register(bp->mii_bus, np);
@@ -958,7 +931,6 @@ static void gem_rx_refill(struct macb *bp)
 		/* Make hw descriptor updates visible to CPU */
 		rmb();
 
-		bp->rx_prepared_head++;
 		desc = macb_rx_desc(bp, entry);
 
 		if (!bp->rx_skbuff[entry]) {
@@ -992,6 +964,7 @@ static void gem_rx_refill(struct macb *bp)
 			desc->addr &= ~MACB_BIT(RX_USED);
 			desc->ctrl = 0;
 		}
+		bp->rx_prepared_head++;
 	}
 
 	/* Make descriptor updates visible to hardware */
@@ -1758,7 +1731,7 @@ static int macb_start_xmit(struct sk_buff *skb, struct net_device *dev)
 	unsigned long flags;
 	unsigned int desc_cnt, nr_frags, frag_size, f;
 	unsigned int hdrlen;
-	bool is_lso, is_udp = 0;
+	bool is_lso, is_udp = false;
 
 	is_lso = (skb_shinfo(skb)->gso_size != 0);
 
@@ -3766,10 +3739,9 @@ static int macb_probe(struct platform_device *pdev)
 		err = of_phy_register_fixed_link(np);
 		if (err < 0) {
 			dev_err(&pdev->dev, "broken fixed-link specification");
-			goto failed_phy;
+			goto err_out_free_netdev;
 		}
 		phy_node = of_node_get(np);
-		bp->phy_node = phy_node;
 	} else {
 		int gpio = of_get_named_gpio(phy_node, "reset-gpios", 0);
 		if (gpio_is_valid(gpio)) {
@@ -3777,6 +3749,7 @@ static int macb_probe(struct platform_device *pdev)
 			gpiod_direction_output(bp->reset_gpio, 1);
 		}
 	}
+	bp->phy_node = phy_node;
 
 	err = of_get_phy_mode(np);
 	if (err < 0) {
@@ -3794,7 +3767,7 @@ static int macb_probe(struct platform_device *pdev)
 	/* IP specific init */
 	err = init(pdev);
 	if (err)
-		goto err_out_free_netdev;
+		goto err_out_phy_put;
 
 	err = register_netdev(dev);
 	if (err) {
@@ -3828,12 +3801,12 @@ static int macb_probe(struct platform_device *pdev)
 err_out_unregister_netdev:
 	unregister_netdev(dev);
 
+err_out_phy_put:
+	of_node_put(bp->phy_node);
+
 err_out_free_netdev:
 	free_netdev(dev);
 
-failed_phy:
-	of_node_put(phy_node);
-
 err_disable_clocks:
 	clk_disable_unprepare(tx_clk);
 	clk_disable_unprepare(hclk);
diff --git a/drivers/net/ethernet/cadence/macb_ptp.c b/drivers/net/ethernet/cadence/macb_ptp.c
index 70377b46d12aa6..36608f352156c6 100755
--- a/drivers/net/ethernet/cadence/macb_ptp.c
+++ b/drivers/net/ethernet/cadence/macb_ptp.c
@@ -170,10 +170,7 @@ static int gem_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
 
 	if (delta > TSU_NSEC_MAX_VAL) {
 		gem_tsu_get_time(&bp->ptp_clock_info, &now);
-		if (sign)
-			now = timespec64_sub(now, then);
-		else
-			now = timespec64_add(now, then);
+		now = timespec64_add(now, then);
 
 		gem_tsu_set_time(&bp->ptp_clock_info,
 				 (const struct timespec64 *)&now);
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 1c4c78a7abf7cb..a186f9aae21873 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -924,10 +924,7 @@ static void axienet_device_reset(struct net_device *ndev)
 					 val, (val & XXV_RX_BLKLCK_MASK),
 					 10, DELAY_OF_ONE_MILLISEC);
 		if (err) {
-			netdev_err(ndev, "%s: Block lock bit of XXV MAC didn't",
-				   __func__);
-			netdev_err(ndev, "Got Set cross check the ref clock");
-			netdev_err(ndev, "Configuration for the mac");
+			netdev_err(ndev, "XXV MAC block lock not complete! Cross-check the MAC ref clock configuration\n");
 		}
 #ifdef CONFIG_XILINX_AXI_EMAC_HWTSTAMP
 		if (!lp->is_tsn) {
@@ -999,6 +996,7 @@ static void axienet_adjust_link(struct net_device *ndev)
 			switch (phy->speed) {
 			case SPEED_2500:
 				emmc_reg |= XAE_EMMC_LINKSPD_2500;
+				break;
 			case SPEED_1000:
 				emmc_reg |= XAE_EMMC_LINKSPD_1000;
 				break;
@@ -2215,7 +2213,7 @@ static int axienet_mii_init(struct net_device *ndev)
  */
 static int axienet_open(struct net_device *ndev)
 {
-	int ret = 0, i;
+	int ret = 0, i = 0;
 	struct axienet_local *lp = netdev_priv(ndev);
 	struct phy_device *phydev = NULL;
 	struct axienet_dma_q *q;
@@ -3470,7 +3468,7 @@ static int __maybe_unused axienet_dma_probe(struct platform_device *pdev,
 	int i, ret;
 	struct axienet_local *lp = netdev_priv(ndev);
 	struct axienet_dma_q *q;
-	struct device_node *np;
+	struct device_node *np = NULL;
 	struct resource dmares;
 #ifdef CONFIG_XILINX_TSN
 	char dma_name[10];
diff --git a/drivers/net/phy/xilinx_gmii2rgmii.c b/drivers/net/phy/xilinx_gmii2rgmii.c
index 2e5150b0b8d52c..604072e1bbf8f6 100644
--- a/drivers/net/phy/xilinx_gmii2rgmii.c
+++ b/drivers/net/phy/xilinx_gmii2rgmii.c
@@ -33,17 +33,22 @@ struct gmii2rgmii {
 	struct phy_device *phy_dev;
 	struct phy_driver *phy_drv;
 	struct phy_driver conv_phy_drv;
-	int addr;
+	struct mdio_device *mdio;
 };
 
 static int xgmiitorgmii_read_status(struct phy_device *phydev)
 {
 	struct gmii2rgmii *priv = phydev->priv;
+	struct mii_bus *bus = priv->mdio->bus;
+	int addr = priv->mdio->addr;
 	u16 val = 0;
+	int err;
 
-	priv->phy_drv->read_status(phydev);
+	err = priv->phy_drv->read_status(phydev);
+	if (err < 0)
+		return err;
 
-	val = mdiobus_read(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG);
+	val = mdiobus_read(bus, addr, XILINX_GMII2RGMII_REG);
 	val &= ~XILINX_GMII2RGMII_SPEED_MASK;
 
 	if (phydev->speed == SPEED_1000)
@@ -53,7 +58,7 @@ static int xgmiitorgmii_read_status(struct phy_device *phydev)
 	else
 		val |= BMCR_SPEED10;
 
-	mdiobus_write(phydev->mdio.bus, priv->addr, XILINX_GMII2RGMII_REG, val);
+	mdiobus_write(bus, addr, XILINX_GMII2RGMII_REG, val);
 
 	return 0;
 }
@@ -81,7 +86,12 @@ static int xgmiitorgmii_probe(struct mdio_device *mdiodev)
 		return -EPROBE_DEFER;
 	}
 
-	priv->addr = mdiodev->addr;
+	if (!priv->phy_dev->drv) {
+		dev_err(dev, "External PHY driver not probed\n");
+		return -EPROBE_DEFER;
+	}
+
+	priv->mdio = mdiodev;
 	priv->phy_drv = priv->phy_dev->drv;
 	memcpy(&priv->conv_phy_drv, priv->phy_dev->drv,
 	       sizeof(struct phy_driver));
diff --git a/drivers/rtc/rtc-zynqmp.c b/drivers/rtc/rtc-zynqmp.c
index da18a8ae3c1ddb..0a795300298cfd 100644
--- a/drivers/rtc/rtc-zynqmp.c
+++ b/drivers/rtc/rtc-zynqmp.c
@@ -56,7 +56,7 @@ struct xlnx_rtc_dev {
 	void __iomem		*reg_base;
 	int			alarm_irq;
 	int			sec_irq;
-	int			calibval;
+	unsigned int		calibval;
 };
 
 static int xlnx_rtc_set_time(struct device *dev, struct rtc_time *tm)
diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c
index d5efc1a472d889..ce631e61e1504f 100644
--- a/drivers/spi/spi-zynq-qspi.c
+++ b/drivers/spi/spi-zynq-qspi.c
@@ -11,6 +11,7 @@
 
 #include <linux/clk.h>
 #include <linux/delay.h>
+#include <linux/gpio.h>
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/module.h>
@@ -56,7 +57,7 @@
 #define ZYNQ_QSPI_CONFIG_BDRATE_MASK	0x00000038 /* Baud Rate Divisor Mask */
 #define ZYNQ_QSPI_CONFIG_CPHA_MASK	0x00000004 /* Clock Phase Control */
 #define ZYNQ_QSPI_CONFIG_CPOL_MASK	0x00000002 /* Clock Polarity Control */
-#define ZYNQ_QSPI_CONFIG_SSCTRL_MASK	0x00003C00 /* Slave Select Mask */
+#define ZYNQ_QSPI_CONFIG_SSCTRL_MASK	0x00000400 /* Slave Select Mask */
 #define ZYNQ_QSPI_CONFIG_FWIDTH_MASK	0x000000C0 /* FIFO width */
 #define ZYNQ_QSPI_CONFIG_MSTREN_MASK	0x00000001 /* Master Mode */
 
@@ -367,9 +368,15 @@ static void zynq_qspi_chipselect(struct spi_device *qspi, bool is_high)
 	} else {
 		/* Select the slave */
 		config_reg &= ~ZYNQ_QSPI_CONFIG_SSCTRL_MASK;
-		config_reg |= (((~(BIT(qspi->chip_select))) <<
-				 ZYNQ_QSPI_SS_SHIFT) &
-				 ZYNQ_QSPI_CONFIG_SSCTRL_MASK);
+		if (gpio_is_valid(qspi->cs_gpio)) {
+			config_reg |= (((~(BIT(0))) <<
+					ZYNQ_QSPI_SS_SHIFT) &
+					ZYNQ_QSPI_CONFIG_SSCTRL_MASK);
+		} else {
+			config_reg |= (((~(BIT(qspi->chip_select))) <<
+					ZYNQ_QSPI_SS_SHIFT) &
+					ZYNQ_QSPI_CONFIG_SSCTRL_MASK);
+		}
 		xqspi->is_instr = 1;
 	}
 
@@ -440,6 +447,20 @@ static int zynq_qspi_setup_transfer(struct spi_device *qspi,
  */
 static int zynq_qspi_setup(struct spi_device *qspi)
 {
+	struct device *dev = &qspi->master->dev;
+	int ret;
+
+	if (gpio_is_valid(qspi->cs_gpio)) {
+		ret = devm_gpio_request(dev, qspi->cs_gpio, dev_name(dev));
+		if (ret) {
+			dev_err(dev, "Invalid cs_gpio\n");
+			return ret;
+		}
+
+		gpio_direction_output(qspi->cs_gpio,
+				!(qspi->mode & SPI_CS_HIGH));
+	}
+
 	if (qspi->master->busy)
 		return -EBUSY;
 
@@ -753,7 +774,7 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 	master->transfer_one = zynq_qspi_start_transfer;
 	master->prepare_transfer_hardware = zynq_prepare_transfer_hardware;
 	master->unprepare_transfer_hardware = zynq_unprepare_transfer_hardware;
-	master->flags = SPI_MASTER_QUAD_MODE;
+	master->flags = SPI_MASTER_QUAD_MODE | SPI_MASTER_GPIO_SS;
 
 	master->max_speed_hz = clk_get_rate(xqspi->refclk) / 2;
 	master->bits_per_word_mask = SPI_BPW_MASK(8);
diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c
index 8902ce7290be9d..2f380d3d701341 100644
--- a/drivers/spi/spi-zynqmp-gqspi.c
+++ b/drivers/spi/spi-zynqmp-gqspi.c
@@ -177,6 +177,7 @@ enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA};
  * @genfifobus:		Used to select the upper or lower bus
  * @dma_rx_bytes:	Remaining bytes to receive by DMA mode
  * @dma_addr:		DMA address after mapping the kernel buffer
+ * @tx_bus_width:	Used to represent number of data wires for tx
  * @rx_bus_width:	Used to represent number of data wires
  * @genfifoentry:	Used for storing the genfifoentry instruction.
  * @isinstr:		To determine whether the transfer is instruction
@@ -319,6 +320,17 @@ static void zynqmp_qspi_set_tapdelay(struct zynqmp_qspi *xqspi, u32 baudrateval)
 	zynqmp_gqspi_write(xqspi, GQSPI_DATA_DLY_ADJ_OFST, datadlyadj);
 }
 
+static u32 zynqmp_disable_intr(struct zynqmp_qspi *xqspi)
+{
+	u32 value;
+
+	zynqmp_gqspi_write(xqspi, GQSPI_IDR_OFST, GQSPI_ISR_IDR_MASK);
+	value = zynqmp_gqspi_read(xqspi, GQSPI_IMASK_OFST);
+	zynqmp_gqspi_write(xqspi, GQSPI_IDR_OFST, GQSPI_ISR_IDR_MASK);
+
+	return value;
+}
+
 /**
  * zynqmp_qspi_init_hw -	Initialize the hardware
  * @xqspi:	Pointer to the zynqmp_qspi structure
@@ -344,9 +356,7 @@ static void zynqmp_qspi_init_hw(struct zynqmp_qspi *xqspi)
 	/* Select the GQSPI mode */
 	zynqmp_gqspi_write(xqspi, GQSPI_SEL_OFST, GQSPI_SEL_MASK);
 	/* Clear and disable interrupts */
-	zynqmp_gqspi_write(xqspi, GQSPI_ISR_OFST,
-			   zynqmp_gqspi_read(xqspi, GQSPI_ISR_OFST) |
-			   GQSPI_ISR_WR_TO_CLR_MASK);
+	zynqmp_disable_intr(xqspi);
 	/* Clear the DMA STS */
 	zynqmp_gqspi_write(xqspi, GQSPI_QSPIDMA_DST_I_STS_OFST,
 			   zynqmp_gqspi_read(xqspi,
@@ -786,11 +796,12 @@ static irqreturn_t zynqmp_qspi_irq(int irq, void *dev_id)
 
 	if ((xqspi->bytes_to_receive == 0) && (xqspi->bytes_to_transfer == 0)
 			&& ((status & GQSPI_IRQ_MASK) == GQSPI_IRQ_MASK)) {
-		zynqmp_gqspi_write(xqspi, GQSPI_IDR_OFST, GQSPI_ISR_IDR_MASK);
+		zynqmp_disable_intr(xqspi);
 		xqspi->isinstr = false;
 		spi_finalize_current_transfer(master);
 		ret = IRQ_HANDLED;
 	}
+
 	return ret;
 }
 
@@ -1028,7 +1039,6 @@ static int zynqmp_qspi_start_transfer(struct spi_master *master,
 	if (xqspi->txbuf != NULL)
 		/* Enable interrupts for TX */
 		zynqmp_gqspi_write(xqspi, GQSPI_IER_OFST,
-				   GQSPI_IER_TXEMPTY_MASK |
 					GQSPI_IER_GENFIFOEMPTY_MASK |
 					GQSPI_IER_TXNOT_FULL_MASK);
 
@@ -1042,8 +1052,7 @@ static int zynqmp_qspi_start_transfer(struct spi_master *master,
 		} else {
 			zynqmp_gqspi_write(xqspi, GQSPI_IER_OFST,
 					GQSPI_IER_GENFIFOEMPTY_MASK |
-					GQSPI_IER_RXNEMPTY_MASK |
-					GQSPI_IER_RXEMPTY_MASK);
+					GQSPI_IER_RXNEMPTY_MASK);
 		}
 	}
 
@@ -1159,9 +1168,23 @@ static int __maybe_unused zynqmp_runtime_resume(struct device *dev)
 	return 0;
 }
 
+static int __maybe_unused zynqmp_runtime_idle(struct device *dev)
+{
+	struct platform_device *pdev = to_platform_device(dev);
+	struct spi_master *master = platform_get_drvdata(pdev);
+	struct zynqmp_qspi *xqspi = spi_master_get_devdata(master);
+	u32 value;
+
+	value = zynqmp_gqspi_read(xqspi, GQSPI_EN_OFST);
+	if (value)
+		return -EBUSY;
+
+	return 0;
+}
+
 static const struct dev_pm_ops zynqmp_qspi_dev_pm_ops = {
 	SET_RUNTIME_PM_OPS(zynqmp_runtime_suspend,
-			   zynqmp_runtime_resume, NULL)
+			   zynqmp_runtime_resume, zynqmp_runtime_idle)
 	SET_SYSTEM_SLEEP_PM_OPS(zynqmp_qspi_suspend, zynqmp_qspi_resume)
 };
 
diff --git a/drivers/staging/apf/Makefile b/drivers/staging/apf/Makefile
index a3d8acb68c8dcd..bf281a2c16dfc9 100644
--- a/drivers/staging/apf/Makefile
+++ b/drivers/staging/apf/Makefile
@@ -3,7 +3,6 @@
 ccflags-$(CONFIG_DEBUG_XILINX_APF) += -DDEBUG
 ccflags-$(CONFIG_XILINX_APF) += -Idrivers/dma
 
-obj-$(CONFIG_XILINX_APF) += xlnk-config.o
 obj-$(CONFIG_XILINX_APF) += xlnk.o
 obj-$(CONFIG_XILINX_APF) += xlnk-eng.o
 obj-$(CONFIG_XILINX_DMA_APF) += xilinx-dma-apf.o
diff --git a/drivers/staging/apf/xlnk-config.c b/drivers/staging/apf/xlnk-config.c
deleted file mode 100644
index 4eab1bc126debe..00000000000000
--- a/drivers/staging/apf/xlnk-config.c
+++ /dev/null
@@ -1,45 +0,0 @@
-#include "xlnk-config.h"
-
-struct xlnk_config_block system_config;
-
-void xlnk_config_clear_block(struct xlnk_config_block *config_block)
-{
-	int i;
-
-	for (i = 0; i < xlnk_config_valid_size; i++)
-		config_block->valid_mask[i] = 0;
-}
-
-void xlnk_init_config(void)
-{
-	int i;
-
-	system_config.dma_type = xlnk_config_dma_manual;
-
-	for (i = 0; i < xlnk_config_valid_size; i++)
-		system_config.valid_mask[i] = 1;
-}
-
-int xlnk_set_config(const struct xlnk_config_block *config_block)
-{
-#define XLNK_CONFIG_HELP(x) \
-	if (config_block->valid_mask[xlnk_config_valid_##x]) \
-	system_config.x = config_block->x
-
-	XLNK_CONFIG_HELP(dma_type);
-
-#undef XLNK_CONFIG_HELP
-	return 0;
-}
-
-void xlnk_get_config(struct xlnk_config_block *config_block)
-{
-	*config_block = system_config;
-}
-
-int xlnk_config_dma_type(enum xlnk_config_dma type)
-{
-	if (system_config.dma_type == type)
-		return 1;
-	return 0;
-}
diff --git a/drivers/staging/apf/xlnk-config.h b/drivers/staging/apf/xlnk-config.h
deleted file mode 100644
index f35c75b6755143..00000000000000
--- a/drivers/staging/apf/xlnk-config.h
+++ /dev/null
@@ -1,31 +0,0 @@
-#ifndef XLNK_CONFIG_H
-#define XLNK_CONFIG_H
-
-#include "xlnk-sysdef.h"
-
-enum xlnk_config_dma {
-	xlnk_config_dma_manual,
-	xlnk_config_dma_standard,
-	xlnk_config_dma_size,
-};
-
-enum xlnk_config_valid {
-	xlnk_config_valid_dma_type = 0,
-
-	xlnk_config_valid_size = 1,
-};
-
-struct __attribute__ ((__packed__)) xlnk_config_block
-{
-	xlnk_byte_type valid_mask[xlnk_config_valid_size];
-
-	xlnk_enum_type dma_type;
-};
-
-void xlnk_config_clear_block(struct xlnk_config_block *config_block);
-void xlnk_init_config(void);
-int xlnk_set_config(const struct xlnk_config_block *config_block);
-void xlnk_get_config(struct xlnk_config_block *config_block);
-int xlnk_config_dma_type(enum xlnk_config_dma type);
-
-#endif
diff --git a/drivers/staging/apf/xlnk-ioctl.h b/drivers/staging/apf/xlnk-ioctl.h
index 1b9ef930621f67..6cbd277655d8b8 100644
--- a/drivers/staging/apf/xlnk-ioctl.h
+++ b/drivers/staging/apf/xlnk-ioctl.h
@@ -28,7 +28,6 @@
 
 #define XLNK_IOCSHUTDOWN	_IOWR(XLNK_IOC_MAGIC, 100, unsigned long)
 #define XLNK_IOCRECRES		_IOWR(XLNK_IOC_MAGIC, 101, unsigned long)
-#define XLNK_IOCCONFIG		_IOWR(XLNK_IOC_MAGIC, 30, unsigned long)
 #define XLNK_IOC_MAXNR		101
 
 #endif
diff --git a/drivers/staging/apf/xlnk.c b/drivers/staging/apf/xlnk.c
index ceeee74ee71a4c..168f6aaaed5dbf 100644
--- a/drivers/staging/apf/xlnk.c
+++ b/drivers/staging/apf/xlnk.c
@@ -52,7 +52,6 @@
 #include <linux/semaphore.h>
 
 #include "xlnk-ioctl.h"
-#include "xlnk-config.h"
 #include "xlnk-sysdef.h"
 #include "xlnk.h"
 
@@ -60,16 +59,6 @@
 #include "xilinx-dma-apf.h"
 #endif
 
-#ifdef CONFIG_XILINX_MCDMA
-#include "xdma-if.h"
-#include "xdma.h"
-
-static void xdma_if_device_release(struct device *op)
-{
-}
-
-#endif
-
 #define DRIVER_NAME  "xlnk"
 #define DRIVER_VERSION  "0.2"
 
@@ -140,11 +129,6 @@ struct xlnk_device_pack {
 	struct xdma_channel_config dma_chan_cfg[4];  /* for xidane dma only */
 	struct xdma_device_config dma_dev_cfg;	   /* for xidane dma only */
 #endif
-
-#ifdef CONFIG_XILINX_MCDMA
-	struct xdma_device_info mcdma_dev_cfg;	 /* for mcdma only */
-#endif
-
 };
 
 static struct semaphore xlnk_devpack_sem;
@@ -158,27 +142,33 @@ static void xlnk_devpacks_init(void)
 		xlnk_devpacks[i] = NULL;
 }
 
-static void xlnk_devpacks_delete(struct xlnk_device_pack *devpack)
+static struct xlnk_device_pack *xlnk_devpacks_alloc(void)
 {
 	unsigned int i;
 
 	for (i = 0; i < MAX_XLNK_DMAS; i++) {
-		if (xlnk_devpacks[i] == devpack)
-			xlnk_devpacks[i] = NULL;
+		if (!xlnk_devpacks[i]) {
+			struct xlnk_device_pack *ret;
+
+			ret = kzalloc(sizeof(*ret), GFP_KERNEL);
+			ret->pdev.id = i;
+			xlnk_devpacks[i] = ret;
+
+			return ret;
+		}
 	}
+
+	return NULL;
 }
 
-static void xlnk_devpacks_add(struct xlnk_device_pack *devpack)
+static void xlnk_devpacks_delete(struct xlnk_device_pack *devpack)
 {
 	unsigned int i;
 
-	devpack->refs = 1;
-	for (i = 0; i < MAX_XLNK_DMAS; i++) {
-		if (!xlnk_devpacks[i]) {
-			xlnk_devpacks[i] = devpack;
-			break;
-		}
-	}
+	for (i = 0; i < MAX_XLNK_DMAS; i++)
+		if (xlnk_devpacks[i] == devpack)
+			xlnk_devpacks[i] = NULL;
+	kfree(devpack);
 }
 
 static struct xlnk_device_pack *xlnk_devpacks_find(xlnk_intptr_type base)
@@ -234,29 +224,6 @@ static void xlnk_devpacks_free_all(void)
 	}
 }
 
-static void xlnk_load_config_from_dt(struct platform_device *pdev)
-{
-	const char *dma_name = NULL;
-	struct xlnk_config_block block;
-
-	xlnk_init_config();
-	xlnk_get_config(&block);
-
-	if (of_property_read_string(xlnk_dev->of_node,
-				    "config-dma-type",
-				    &dma_name) == 0) {
-		if (strcmp(dma_name, "manual") == 0) {
-			block.valid_mask[xlnk_config_valid_dma_type] = 1;
-			block.dma_type = xlnk_config_dma_manual;
-		} else if (strcmp(dma_name, "standard") == 0) {
-			block.valid_mask[xlnk_config_valid_dma_type] = 1;
-		} else
-			pr_err("%s: Unrecognized DMA type %s\n",
-			       __func__, dma_name);
-	}
-	xlnk_set_config(&block);
-}
-
 static int xlnk_probe(struct platform_device *pdev)
 {
 	int err;
@@ -307,8 +274,6 @@ static int xlnk_probe(struct platform_device *pdev)
 	xlnk_pdev = pdev;
 	xlnk_dev = &pdev->dev;
 
-	xlnk_load_config_from_dt(pdev);
-
 	if (xlnk_pdev)
 		dev_info(&pdev->dev, "xlnk_pdev is not null\n");
 	else
@@ -566,14 +531,16 @@ static int xlnk_devregister(char *name,
 
 		nres = nirq + 1;
 
-		devpack = kzalloc(sizeof(*devpack),
-				  GFP_KERNEL);
+		devpack = xlnk_devpacks_alloc();
+		if (!devpack) {
+			up(&xlnk_devpack_sem);
+			pr_err("Failed to allocate device %s\n", name);
+			return -ENOMEM;
+		}
 		devpack->io_ptr = NULL;
 		strcpy(devpack->name, name);
 		devpack->pdev.name = devpack->name;
 
-		devpack->pdev.id = id;
-
 		devpack->pdev.dev.dma_mask = &dma_mask;
 		devpack->pdev.dev.coherent_dma_mask = dma_mask;
 
@@ -592,10 +559,9 @@ static int xlnk_devregister(char *name,
 
 		status = platform_device_register(&devpack->pdev);
 		if (status) {
-			kfree(devpack);
+			xlnk_devpacks_delete(devpack);
 			*handle = 0;
 		} else {
-			xlnk_devpacks_add(devpack);
 			*handle = (xlnk_intptr_type)devpack;
 		}
 	}
@@ -640,8 +606,7 @@ static int xlnk_dmaregister(char *name,
 		devpack->refs++;
 		status = 0;
 	} else {
-		devpack = kzalloc(sizeof(*devpack),
-				  GFP_KERNEL);
+		devpack = xlnk_devpacks_alloc();
 		if (!devpack) {
 			up(&xlnk_devpack_sem);
 			return -ENOMEM;
@@ -651,12 +616,10 @@ static int xlnk_dmaregister(char *name,
 
 		devpack->io_ptr = NULL;
 
-		devpack->pdev.id = id;
-
 		devpack->dma_chan_cfg[0].include_dre = chan0_include_dre;
-		devpack->dma_chan_cfg[0].datawidth   = chan0_data_width;
+		devpack->dma_chan_cfg[0].datawidth = chan0_data_width;
 		devpack->dma_chan_cfg[0].irq = chan0_irq;
-		devpack->dma_chan_cfg[0].poll_mode   = chan0_poll_mode;
+		devpack->dma_chan_cfg[0].poll_mode = chan0_poll_mode;
 		devpack->dma_chan_cfg[0].type =
 			(chan0_dir == XLNK_DMA_FROM_DEVICE) ?
 				"axi-dma-s2mm-channel" :
@@ -692,13 +655,11 @@ static int xlnk_dmaregister(char *name,
 
 		devpack->pdev.resource = devpack->res;
 		devpack->pdev.num_resources = 1;
-		if (xlnk_config_dma_type(xlnk_config_dma_manual))
-			status = platform_device_register(&devpack->pdev);
+		status = platform_device_register(&devpack->pdev);
 		if (status) {
-			kfree(devpack);
+			xlnk_devpacks_delete(devpack);
 			*handle = 0;
 		} else {
-			xlnk_devpacks_add(devpack);
 			*handle = (xlnk_intptr_type)devpack;
 		}
 	}
@@ -708,74 +669,6 @@ static int xlnk_dmaregister(char *name,
 	return status;
 }
 
-static int xlnk_mcdmaregister(char *name, unsigned int id,
-			      xlnk_intptr_type base, unsigned int size,
-			      unsigned int mm2s_chan_num,
-			      unsigned int mm2s_chan_irq,
-			      unsigned int s2mm_chan_num,
-			      unsigned int s2mm_chan_irq,
-			      xlnk_intptr_type *handle)
-{
-	int status = -1;
-
-#ifdef CONFIG_XILINX_MCDMA
-	struct xlnk_device_pack *devpack;
-
-	if (strcmp(name, "xdma"))
-		return -EINVAL;
-
-	devpack = xlnk_devpacks_find(base);
-	if (devpack)
-		devpack->refs++;
-	if (devpack) {
-		*handle = (xlnk_intptr_type)devpack;
-		return 0;
-	}
-
-	devpack = kzalloc(sizeof(*devpack),
-			  GFP_KERNEL);
-	if (!devpack)
-		return -ENOMEM;
-
-	strcpy(devpack->name, name);
-	devpack->pdev.name = devpack->name;
-	devpack->pdev.id = id;
-
-	devpack->mcdma_dev_cfg.tx_chans	= mm2s_chan_num;
-	devpack->mcdma_dev_cfg.rx_chans	= s2mm_chan_num;
-	devpack->mcdma_dev_cfg.legacy_mode = XDMA_MCHAN_MODE;
-	devpack->mcdma_dev_cfg.device_id   = id;
-
-	devpack->pdev.dev.platform_data	 = &devpack->mcdma_dev_cfg;
-	devpack->pdev.dev.dma_mask = &dma_mask;
-	devpack->pdev.dev.coherent_dma_mask = dma_mask;
-	devpack->pdev.dev.release = xdma_if_device_release,
-
-	devpack->res[0].start = base;
-	devpack->res[0].end   = base + size - 1;
-	devpack->res[0].flags = IORESOURCE_MEM;
-
-	devpack->res[1].start = mm2s_chan_irq;
-	devpack->res[1].end   = s2mm_chan_irq;
-	devpack->res[1].flags = IORESOURCE_IRQ;
-
-	devpack->pdev.resource	  = devpack->res;
-	devpack->pdev.num_resources = 2;
-
-	status = platform_device_register(&devpack->pdev);
-	if (status) {
-		kfree(devpack);
-		*handle = 0;
-	} else {
-		xlnk_devpacks_add(devpack);
-		*handle = (xlnk_intptr_type)devpack;
-	}
-
-#endif
-
-	return status;
-}
-
 static int xlnk_allocbuf_ioctl(struct file *filp,
 			       unsigned int code,
 			       unsigned long args)
@@ -1173,33 +1066,6 @@ static int xlnk_dmaregister_ioctl(struct file *filp, unsigned int code,
 	return status;
 }
 
-static int xlnk_mcdmaregister_ioctl(struct file *filp,
-				    unsigned int code,
-				    unsigned long args)
-{
-	union xlnk_args temp_args;
-	int status;
-	xlnk_intptr_type handle;
-
-	status = copy_from_user(&temp_args, (void __user *)args,
-				sizeof(union xlnk_args));
-
-	if (status)
-		return -ENOMEM;
-
-	status = xlnk_mcdmaregister(temp_args.mcdmaregister.name,
-				    temp_args.mcdmaregister.id,
-				    temp_args.mcdmaregister.base,
-				    temp_args.mcdmaregister.size,
-				    temp_args.mcdmaregister.mm2s_chan_num,
-				    temp_args.mcdmaregister.mm2s_chan_irq,
-				    temp_args.mcdmaregister.s2mm_chan_num,
-				    temp_args.mcdmaregister.s2mm_chan_irq,
-				    &handle);
-
-	return status;
-}
-
 static int xlnk_devunregister_ioctl(struct file *filp,
 				    unsigned int code,
 				    unsigned long args)
@@ -1271,31 +1137,6 @@ static int xlnk_cachecontrol_ioctl(struct file *filp, unsigned int code,
 	return 0;
 }
 
-static int xlnk_config_ioctl(struct file *filp, unsigned long args)
-{
-	struct xlnk_config_block block;
-	int status, setting = 0, i;
-
-	xlnk_config_clear_block(&block);
-	status = copy_from_user(&block, (void __user *)args,
-				sizeof(struct xlnk_config_block));
-	if (status) {
-		pr_err("Error in copy_from_user. status= %d\n", status);
-		return -ENOMEM;
-	}
-	for (i = 0; i < xlnk_config_valid_size; i++)
-		if (block.valid_mask[i])
-			setting = 1;
-	if (setting) {
-		status = xlnk_set_config(&block);
-	} else {
-		xlnk_get_config(&block);
-		status = copy_to_user((void __user *)args, &block,
-				      sizeof(struct xlnk_config_block));
-	}
-	return status;
-}
-
 static int xlnk_memop_ioctl(struct file *filp, unsigned long arg_addr)
 {
 	union xlnk_args args;
@@ -1453,8 +1294,6 @@ static long xlnk_ioctl(struct file *filp,
 		return xlnk_devregister_ioctl(filp, code, args);
 	case XLNK_IOCDMAREGISTER:
 		return xlnk_dmaregister_ioctl(filp, code, args);
-	case XLNK_IOCMCDMAREGISTER:
-		return xlnk_mcdmaregister_ioctl(filp, code, args);
 	case XLNK_IOCDEVUNREGISTER:
 		return xlnk_devunregister_ioctl(filp, code, args);
 	case XLNK_IOCCACHECTRL:
@@ -1463,8 +1302,6 @@ static long xlnk_ioctl(struct file *filp,
 		return xlnk_shutdown(args);
 	case XLNK_IOCRECRES:
 		return xlnk_recover_resource(args);
-	case XLNK_IOCCONFIG:
-		return xlnk_config_ioctl(filp, args);
 	case XLNK_IOCMEMOP:
 		return xlnk_memop_ioctl(filp, args);
 	default:
@@ -1506,8 +1343,8 @@ static int xlnk_mmap(struct file *filp, struct vm_area_struct *vma)
 		xlnk_buf_process[bufid] = current->pid;
 	}
 	if (status) {
-		pr_err("xlnk_mmap failed with code %d\n", EAGAIN);
-		return -EAGAIN;
+		pr_err("%s failed with code %d\n", __func__, status);
+		return status;
 	}
 
 	xlnk_vma_open(vma);
diff --git a/drivers/staging/apf/xlnk.h b/drivers/staging/apf/xlnk.h
index eb94ef2b1da35d..9d0b79b703ad26 100644
--- a/drivers/staging/apf/xlnk.h
+++ b/drivers/staging/apf/xlnk.h
@@ -127,16 +127,6 @@ union xlnk_args {
 		xlnk_uint_type chan1_include_dre;
 		xlnk_uint_type chan1_data_width;
 	} dmaregister;
-	struct __attribute__ ((__packed__)) {
-		xlnk_char_type name[32];
-		xlnk_uint_type id;
-		xlnk_intptr_type base;
-		xlnk_uint_type size;
-		xlnk_uint_type mm2s_chan_num;
-		xlnk_uint_type mm2s_chan_irq;
-		xlnk_uint_type s2mm_chan_num;
-		xlnk_uint_type s2mm_chan_irq;
-	} mcdmaregister;
 	struct __attribute__ ((__packed__)) {
 		xlnk_intptr_type phys_addr;
 		xlnk_uint_type size;
diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
index 2df7edf1d724bf..6aadbd00112dc3 100644
--- a/drivers/tty/serial/uartlite.c
+++ b/drivers/tty/serial/uartlite.c
@@ -58,6 +58,9 @@
 #define ULITE_CONTROL_RST_RX	0x02
 #define ULITE_CONTROL_IE	0x10
 
+/* Static pointer to console port */
+static struct uart_port *console_port;
+
 struct uartlite_data {
 	const struct uartlite_reg_ops *reg_ops;
 	struct clk *clk;
@@ -475,7 +478,7 @@ static void ulite_console_putchar(struct uart_port *port, int ch)
 static void ulite_console_write(struct console *co, const char *s,
 				unsigned int count)
 {
-	struct uart_port *port = &ulite_ports[co->index];
+	struct uart_port *port = console_port;
 	unsigned long flags;
 	unsigned int ier;
 	int locked = 1;
@@ -509,10 +512,8 @@ static int ulite_console_setup(struct console *co, char *options)
 	int parity = 'n';
 	int flow = 'n';
 
-	if (co->index < 0 || co->index >= ULITE_NR_UARTS)
-		return -EINVAL;
 
-	port = &ulite_ports[co->index];
+	port = console_port;
 
 	/* Has the device been initialized yet? */
 	if (!port->mapbase) {
@@ -544,14 +545,6 @@ static struct console ulite_console = {
 	.data	= &ulite_uart_driver,
 };
 
-static int __init ulite_console_init(void)
-{
-	register_console(&ulite_console);
-	return 0;
-}
-
-console_initcall(ulite_console_init);
-
 static void early_uartlite_putc(struct uart_port *port, int c)
 {
 	/*
@@ -663,6 +656,17 @@ static int ulite_assign(struct device *dev, int id, u32 base, int irq,
 
 	dev_set_drvdata(dev, port);
 
+#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
+	/*
+	 * If console hasn't been found yet try to assign this port
+	 * because it is required to be assigned for console setup function.
+	 * If register_console() don't assign value, then console_port pointer
+	 * is cleanup.
+	 */
+	if (ulite_uart_driver.cons->index == -1)
+		console_port = port;
+#endif
+
 	/* Register the port */
 	rc = uart_add_one_port(&ulite_uart_driver, port);
 	if (rc) {
@@ -672,6 +676,12 @@ static int ulite_assign(struct device *dev, int id, u32 base, int irq,
 		return rc;
 	}
 
+#ifdef CONFIG_SERIAL_UARTLITE_CONSOLE
+	/* This is not port which is used for console that's why clean it up */
+	if (ulite_uart_driver.cons->index == -1)
+		console_port = NULL;
+#endif
+
 	return 0;
 }
 
@@ -754,6 +764,15 @@ static int ulite_probe(struct platform_device *pdev)
 	if (prop)
 		id = be32_to_cpup(prop);
 #endif
+	if (!ulite_uart_driver.state) {
+		dev_dbg(&pdev->dev, "uartlite: calling uart_register_driver()\n");
+		ret = uart_register_driver(&ulite_uart_driver);
+		if (ret < 0) {
+			dev_err(&pdev->dev, "Failed to register driver\n");
+			return ret;
+		}
+	}
+
 	pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data),
 			GFP_KERNEL);
 	if (!pdata)
@@ -820,25 +839,8 @@ static struct platform_driver ulite_platform_driver = {
 
 static int __init ulite_init(void)
 {
-	int ret;
-
-	pr_debug("uartlite: calling uart_register_driver()\n");
-	ret = uart_register_driver(&ulite_uart_driver);
-	if (ret)
-		goto err_uart;
-
 	pr_debug("uartlite: calling platform_driver_register()\n");
-	ret = platform_driver_register(&ulite_platform_driver);
-	if (ret)
-		goto err_plat;
-
-	return 0;
-
-err_plat:
-	uart_unregister_driver(&ulite_uart_driver);
-err_uart:
-	pr_err("registering uartlite driver failed: err=%i", ret);
-	return ret;
+	return platform_driver_register(&ulite_platform_driver);
 }
 
 static void __exit ulite_exit(void)
diff --git a/drivers/usb/dwc3/otg.c b/drivers/usb/dwc3/otg.c
index db38565fa49386..93e53c7bcb6d00 100644
--- a/drivers/usb/dwc3/otg.c
+++ b/drivers/usb/dwc3/otg.c
@@ -397,6 +397,11 @@ static int stop_host(struct dwc3_otg *otg)
 	otg_dbg(otg, "%s: turn off host %s\n",
 		__func__, otg->otg.host->bus_name);
 
+	if (work_pending(&otg->hp_work.work)) {
+		while (!cancel_delayed_work(&otg->hp_work))
+			msleep(20);
+	}
+
 	hcd = container_of(otg->otg.host, struct usb_hcd, self);
 	xhci = hcd_to_xhci(hcd);
 
@@ -505,6 +510,8 @@ static void start_peripheral(struct dwc3_otg *otg)
 		return;
 	}
 
+	set_capabilities(otg);
+
 	dwc3_otg_setup_event_buffers(otg);
 
 	if (dwc->gadget_driver) {
@@ -542,7 +549,12 @@ static void start_peripheral(struct dwc3_otg *otg)
 
 	otg->peripheral_started = 1;
 
-	msleep(20);
+	/*
+	 * During HNP the bus shouldn't be idle for more than 155 ms, so
+	 * give enough time for the host to load the stack before start
+	 * triggerring events
+	 */
+	msleep(500);
 
 	return;
 err1:
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c
index 5d061b3d8224aa..17127231ae4f42 100644
--- a/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
@@ -1601,7 +1601,7 @@ composite_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl)
 				cdev->gadget->ep0->maxpacket;
 			if (gadget_is_superspeed(gadget)) {
 				if (gadget->speed >= USB_SPEED_SUPER) {
-					cdev->desc.bcdUSB = cpu_to_le16(0x0310);
+					cdev->desc.bcdUSB = cpu_to_le16(0x0320);
 					cdev->desc.bMaxPacketSize0 = 9;
 				} else {
 					cdev->desc.bcdUSB = cpu_to_le16(0x0210);
diff --git a/drivers/usb/gadget/function/u_ether.c b/drivers/usb/gadget/function/u_ether.c
index bdbc3fdc7c4ff4..4801ab3ae26fbb 100644
--- a/drivers/usb/gadget/function/u_ether.c
+++ b/drivers/usb/gadget/function/u_ether.c
@@ -848,6 +848,10 @@ struct net_device *gether_setup_name_default(const char *netname)
 	net->ethtool_ops = &ops;
 	SET_NETDEV_DEVTYPE(net, &gadget_type);
 
+	/* MTU range: 14 - 15412 */
+	net->min_mtu = ETH_HLEN;
+	net->max_mtu = GETHER_MAX_ETH_FRAME_LEN;
+
 	return net;
 }
 EXPORT_SYMBOL_GPL(gether_setup_name_default);
diff --git a/drivers/usb/storage/uas.c b/drivers/usb/storage/uas.c
index c0554461dbba01..2b3123aa70340e 100644
--- a/drivers/usb/storage/uas.c
+++ b/drivers/usb/storage/uas.c
@@ -285,7 +285,6 @@ static void uas_workaround_cmplt(struct urb *urb)
 {
 	struct scsi_cmnd *cmnd;
 	struct uas_cmd_info *cmdinfo;
-	unsigned long flags;
 
 	if ((urb->context != NULL) && (urb->status == 0)) {
 		cmnd = urb->context;
diff --git a/drivers/watchdog/cadence_wdt.c b/drivers/watchdog/cadence_wdt.c
index 064cf7b6c1c58b..ba0beaad0ff755 100644
--- a/drivers/watchdog/cadence_wdt.c
+++ b/drivers/watchdog/cadence_wdt.c
@@ -421,8 +421,7 @@ static void cdns_wdt_shutdown(struct platform_device *pdev)
  */
 static int __maybe_unused cdns_wdt_suspend(struct device *dev)
 {
-	struct platform_device *pdev = to_platform_device(dev);
-	struct cdns_wdt *wdt = platform_get_drvdata(pdev);
+	struct cdns_wdt *wdt = dev_get_drvdata(dev);
 
 	if (watchdog_active(&wdt->cdns_wdt_device)) {
 		cdns_wdt_stop(&wdt->cdns_wdt_device);
@@ -441,8 +440,7 @@ static int __maybe_unused cdns_wdt_suspend(struct device *dev)
 static int __maybe_unused cdns_wdt_resume(struct device *dev)
 {
 	int ret;
-	struct platform_device *pdev = to_platform_device(dev);
-	struct cdns_wdt *wdt = platform_get_drvdata(pdev);
+	struct cdns_wdt *wdt = dev_get_drvdata(dev);
 
 	if (watchdog_active(&wdt->cdns_wdt_device)) {
 		ret = clk_prepare_enable(wdt->clk);
diff --git a/drivers/watchdog/of_xilinx_wdt.c b/drivers/watchdog/of_xilinx_wdt.c
index 1cf286945b7a12..98f3c42451646d 100644
--- a/drivers/watchdog/of_xilinx_wdt.c
+++ b/drivers/watchdog/of_xilinx_wdt.c
@@ -272,8 +272,7 @@ static int xwdt_remove(struct platform_device *pdev)
  */
 static int __maybe_unused xwdt_suspend(struct device *dev)
 {
-	struct platform_device *pdev = to_platform_device(dev);
-	struct xwdt_device *xdev = platform_get_drvdata(pdev);
+	struct xwdt_device *xdev = dev_get_drvdata(dev);
 
 	if (watchdog_active(&xdev->xilinx_wdt_wdd))
 		xilinx_wdt_stop(&xdev->xilinx_wdt_wdd);
@@ -289,8 +288,7 @@ static int __maybe_unused xwdt_suspend(struct device *dev)
  */
 static int __maybe_unused xwdt_resume(struct device *dev)
 {
-	struct platform_device *pdev = to_platform_device(dev);
-	struct xwdt_device *xdev = platform_get_drvdata(pdev);
+	struct xwdt_device *xdev = dev_get_drvdata(dev);
 	int ret = 0;
 
 	if (watchdog_active(&xdev->xilinx_wdt_wdd))
diff --git a/drivers/watchdog/wdat_wdt.c b/drivers/watchdog/wdat_wdt.c
index 6d1fbda0f461ca..5294595e289d65 100644
--- a/drivers/watchdog/wdat_wdt.c
+++ b/drivers/watchdog/wdat_wdt.c
@@ -447,8 +447,7 @@ static int wdat_wdt_probe(struct platform_device *pdev)
 #ifdef CONFIG_PM_SLEEP
 static int wdat_wdt_suspend_noirq(struct device *dev)
 {
-	struct platform_device *pdev = to_platform_device(dev);
-	struct wdat_wdt *wdat = platform_get_drvdata(pdev);
+	struct wdat_wdt *wdat = dev_get_drvdata(dev);
 	int ret;
 
 	if (!watchdog_active(&wdat->wdd))
@@ -475,8 +474,7 @@ static int wdat_wdt_suspend_noirq(struct device *dev)
 
 static int wdat_wdt_resume_noirq(struct device *dev)
 {
-	struct platform_device *pdev = to_platform_device(dev);
-	struct wdat_wdt *wdat = platform_get_drvdata(pdev);
+	struct wdat_wdt *wdat = dev_get_drvdata(dev);
 	int ret;
 
 	if (!watchdog_active(&wdat->wdd))
diff --git a/sound/soc/xilinx/xilinx-dp-card.c b/sound/soc/xilinx/xilinx-dp-card.c
index 4fa48af0bd6ab8..c99faccf666af8 100644
--- a/sound/soc/xilinx/xilinx-dp-card.c
+++ b/sound/soc/xilinx/xilinx-dp-card.c
@@ -91,11 +91,6 @@ static int xilinx_dp_probe(struct platform_device *pdev)
 	return 0;
 }
 
-static int xilinx_dp_remove(struct platform_device *pdev)
-{
-	return 0;
-}
-
 static const struct of_device_id xilinx_dp_of_match[] = {
 	{ .compatible = "xlnx,dp-snd-card", },
 	{},
@@ -109,7 +104,6 @@ static struct platform_driver xilinx_dp_aud_driver = {
 		.pm		= &snd_soc_pm_ops,
 	},
 	.probe	= xilinx_dp_probe,
-	.remove	= xilinx_dp_remove,
 };
 module_platform_driver(xilinx_dp_aud_driver);
 
diff --git a/sound/soc/xilinx/xilinx-dp-pcm.c b/sound/soc/xilinx/xilinx-dp-pcm.c
index 518c1d08aca739..fa8abe788cf7da 100644
--- a/sound/soc/xilinx/xilinx-dp-pcm.c
+++ b/sound/soc/xilinx/xilinx-dp-pcm.c
@@ -57,11 +57,6 @@ static int xilinx_dp_pcm_probe(struct platform_device *pdev)
 	return 0;
 }
 
-static int xilinx_dp_pcm_dev_remove(struct platform_device *pdev)
-{
-	return 0;
-}
-
 static const struct of_device_id xilinx_dp_pcm_of_match[] = {
 	{ .compatible = "xlnx,dp-snd-pcm", },
 	{ /* end of table */ },
@@ -74,7 +69,6 @@ static struct platform_driver xilinx_dp_pcm_driver = {
 		.of_match_table	= xilinx_dp_pcm_of_match,
 	},
 	.probe	= xilinx_dp_pcm_probe,
-	.remove	= xilinx_dp_pcm_dev_remove,
 };
 module_platform_driver(xilinx_dp_pcm_driver);