diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2 new file mode 100644 index 000000000000..dbcb63bdcc06 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers.json.j2 @@ -0,0 +1,15 @@ +{# + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't1' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2 new file mode 120000 index 000000000000..c01aebb7ae12 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..ea0a8b090593 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t0.j2 @@ -0,0 +1,36 @@ +{# + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{% set ingress_lossless_pool_size = '48717824' %} +{% set ingress_lossless_pool_xoff = '4628480' %} +{% set egress_lossless_pool_size = '60817408' %} +{% set egress_lossy_pool_size = '48717824' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..bbde1ec35db6 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_defaults_t1.j2 @@ -0,0 +1,36 @@ +{# + Copyright (c) 2022-2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '40m' %} +{% set ingress_lossless_pool_size = '44318720' %} +{% set ingress_lossless_pool_xoff = '9027584' %} +{% set egress_lossless_pool_size = '60817408' %} +{% set egress_lossy_pool_size = '44318720' %} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2 new file mode 100644 index 000000000000..84b330d42dbd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/buffers_dynamic.json.j2 @@ -0,0 +1,16 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't1' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json new file mode 120000 index 000000000000..c5be59edffd4 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/hwsku.json @@ -0,0 +1 @@ +../ACS-MSN4700/hwsku.json \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini new file mode 120000 index 000000000000..66cab04d2c42 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/pg_profile_lookup.ini @@ -0,0 +1 @@ +../Mellanox-SN4700-C128/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini new file mode 120000 index 000000000000..e5ffca0b3e57 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/port_config.ini @@ -0,0 +1 @@ +../ACS-MSN4700/port_config.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 new file mode 120000 index 000000000000..eccf286dc879 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/ACS-MSN2700/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile new file mode 100644 index 000000000000..d145093cab96 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700.xml diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700.xml b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700.xml new file mode 120000 index 000000000000..5c30521c1c7b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-O32/sai_4700.xml @@ -0,0 +1 @@ +../ACS-MSN4700/sai_4700.xml \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2 new file mode 100644 index 000000000000..adf9fec9070f --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers.json.j2 @@ -0,0 +1,15 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2 new file mode 120000 index 000000000000..c01aebb7ae12 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_objects.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn2700-r0/Mellanox-SN2700-D48C8/buffers_defaults_objects.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2 new file mode 100644 index 000000000000..1648c465b51a --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t0.j2 @@ -0,0 +1,53 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '49577984' %} +{% set ingress_lossless_pool_xoff = '3407872' %} +{% set egress_lossless_pool_size = '60817408' %} +{% set egress_lossy_pool_size = '49577984' %} +{%- else -%} +{% set ingress_lossless_pool_size = '51036160' %} +{% set ingress_lossless_pool_xoff = '2572288' %} +{% set egress_lossless_pool_size = '60817408' %} +{% set egress_lossy_pool_size = '51036160' %} +{%- endif -%} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2 new file mode 100644 index 000000000000..161fefc5258c --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_defaults_t1.j2 @@ -0,0 +1,53 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{% set default_cable = '5m' %} +{%- if ((SYSTEM_DEFAULTS is defined) and ('tunnel_qos_remap' in SYSTEM_DEFAULTS) and (SYSTEM_DEFAULTS['tunnel_qos_remap']['status'] == 'enabled')) -%} +{% set ingress_lossless_pool_size = '38092800' %} +{% set ingress_lossless_pool_xoff = '13647872' %} +{% set egress_lossless_pool_size = '60817408' %} + +{%- else -%} +{% set ingress_lossless_pool_size = '42467328' %} +{% set ingress_lossless_pool_xoff = '11141120' %} +{% set egress_lossless_pool_size = '60817408' %} +{% set egress_lossy_pool_size = '42467328' %} +{%- endif -%} + +{% import 'buffers_defaults_objects.j2' as defs with context %} + +{%- macro generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) %} +{{ defs.generate_buffer_pool_and_profiles_with_inactive_ports(port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_profile_lists_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_profile_lists(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_extra_lossless_queues_with_inactive_ports(port_names_active, port_names_extra_queues, port_names_inactive) %} +{{ defs.generate_queue_buffers_with_extra_lossless_queues(port_names_active, port_names_extra_queues, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_queue_buffers_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_queue_buffers(port_names_active, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_extra_lossless_pgs_with_inactive_ports(port_names_active, port_names_extra_pgs, port_names_inactive) %} +{{ defs.generate_pg_profiles_with_extra_lossless_pgs(port_names_active, port_names_extra_pgs, port_names_inactive) }} +{%- endmacro %} + +{%- macro generate_pg_profiles_with_inactive_ports(port_names_active, port_names_inactive) %} +{{ defs.generate_pg_profiles(port_names_active, port_names_inactive) }} +{%- endmacro %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2 new file mode 100644 index 000000000000..008ba6d1ecfd --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/buffers_dynamic.json.j2 @@ -0,0 +1,18 @@ +{# + Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. + Apache-2.0 + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +#} +{%- set default_topo = 't0' %} +{%- set dynamic_mode = 'true' %} +{%- include 'buffers_config.j2' %} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json new file mode 100644 index 000000000000..3b307c07871e --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/hwsku.json @@ -0,0 +1,196 @@ +{ + "interfaces": { + "Ethernet0": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet4": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet8": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet12": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet16": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet20": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet24": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet28": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet32": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet36": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet40": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet44": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet48": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet52": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet56": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet60": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet64": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet68": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet72": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet76": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet80": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet84": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet88": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet92": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet96": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet100": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet104": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet108": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet112": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet116": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet120": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet124": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet128": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet132": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet136": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet140": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet144": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet148": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet152": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet156": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet160": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet164": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet168": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet172": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet176": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet180": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet184": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet188": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet192": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet196": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet200": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet204": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet208": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet212": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet216": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet220": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet224": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet228": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet232": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet236": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet240": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet244": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet248": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + }, + "Ethernet252": { + "default_brkout_mode": "2x200G[100G,50G,40G,25G,10G,1G]" + } + } +} diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini new file mode 120000 index 000000000000..66cab04d2c42 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/pg_profile_lookup.ini @@ -0,0 +1 @@ +../Mellanox-SN4700-C128/pg_profile_lookup.ini \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini new file mode 100644 index 000000000000..a4336d55e0d1 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/port_config.ini @@ -0,0 +1,82 @@ +## +## Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. +## Apache-2.0 +## +## Licensed under the Apache License, Version 2.0 (the "License"); +## you may not use this file except in compliance with the License. +## You may obtain a copy of the License at +## +## http://www.apache.org/licenses/LICENSE-2.0 +## +## Unless required by applicable law or agreed to in writing, software +## distributed under the License is distributed on an "AS IS" BASIS, +## WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +## See the License for the specific language governing permissions and +## limitations under the License. +## +# name lanes + +Ethernet0 0,1,2,3 etp1a 1 200000 +Ethernet4 4,5,6,7 etp1b 1 200000 +Ethernet8 8,9,10,11 etp2a 2 200000 +Ethernet12 12,13,14,15 etp2b 2 200000 +Ethernet16 16,17,18,19 etp3a 3 200000 +Ethernet20 20,21,22,23 etp3b 3 200000 +Ethernet24 24,25,26,27 etp4a 4 200000 +Ethernet28 28,29,30,31 etp4b 4 200000 +Ethernet32 32,33,34,35 etp5a 5 200000 +Ethernet36 36,37,38,39 etp5b 5 200000 +Ethernet40 40,41,42,43 etp6a 6 200000 +Ethernet44 44,45,46,47 etp6b 6 200000 +Ethernet48 48,49,50,51 etp7a 7 200000 +Ethernet52 52,53,54,55 etp7b 7 200000 +Ethernet56 56,57,58,59 etp8a 8 200000 +Ethernet60 60,61,62,63 etp8b 8 200000 +Ethernet64 64,65,66,67 etp9a 9 200000 +Ethernet68 68,69,70,71 etp9b 9 200000 +Ethernet72 72,73,74,75 etp10a 10 200000 +Ethernet76 76,77,78,79 etp10b 10 200000 +Ethernet80 80,81,82,83 etp11a 11 200000 +Ethernet84 84,85,86,87 etp11b 11 200000 +Ethernet88 88,89,90,91 etp12a 12 200000 +Ethernet92 92,93,94,95 etp12b 12 200000 +Ethernet96 96,97,98,99 etp13a 13 200000 +Ethernet100 100,101,102,103 etp13b 13 200000 +Ethernet104 104,105,106,107 etp14a 14 200000 +Ethernet108 108,109,110,111 etp14b 14 200000 +Ethernet112 112,113,114,115 etp15a 15 200000 +Ethernet116 116,117,118,119 etp15b 15 200000 +Ethernet120 120,121,122,123 etp16a 16 200000 +Ethernet124 124,125,126,127 etp16b 16 200000 +Ethernet128 128,129,130,131 etp17a 17 200000 +Ethernet132 132,133,134,135 etp17b 17 200000 +Ethernet136 136,137,138,139 etp18a 18 200000 +Ethernet140 140,141,142,143 etp18b 18 200000 +Ethernet144 144,145,146,147 etp19a 19 200000 +Ethernet148 148,149,150,151 etp19b 19 200000 +Ethernet152 152,153,154,155 etp20a 20 200000 +Ethernet156 156,157,158,159 etp20b 20 200000 +Ethernet160 160,161,162,163 etp21a 21 200000 +Ethernet164 164,165,166,167 etp21b 21 200000 +Ethernet168 168,169,170,171 etp22a 22 200000 +Ethernet172 172,173,174,175 etp22b 22 200000 +Ethernet176 176,177,178,179 etp23a 23 200000 +Ethernet180 180,181,182,183 etp23b 23 200000 +Ethernet184 184,185,186,187 etp24a 24 200000 +Ethernet188 188,189,190,191 etp24b 24 200000 +Ethernet192 192,193,194,195 etp25a 25 200000 +Ethernet196 196,197,198,199 etp25b 25 200000 +Ethernet200 200,201,202,203 etp26a 26 200000 +Ethernet204 204,205,206,207 etp26b 26 200000 +Ethernet208 208,209,210,211 etp27a 27 200000 +Ethernet212 212,213,214,215 etp27b 27 200000 +Ethernet216 216,217,218,219 etp28a 28 200000 +Ethernet220 220,221,222,223 etp28b 28 200000 +Ethernet224 224,225,226,227 etp29a 29 200000 +Ethernet228 228,229,230,231 etp29b 29 200000 +Ethernet232 232,233,234,235 etp30a 30 200000 +Ethernet236 236,237,238,239 etp30b 30 200000 +Ethernet240 240,241,242,243 etp31a 31 200000 +Ethernet244 244,245,246,247 etp31b 31 200000 +Ethernet248 248,249,250,251 etp32a 32 200000 +Ethernet252 252,253,254,255 etp32b 32 200000 diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2 b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2 new file mode 120000 index 000000000000..48221aa2b3de --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/qos.json.j2 @@ -0,0 +1 @@ +../../x86_64-mlnx_msn4600c-r0/Mellanox-SN4600C-C64/qos.json.j2 \ No newline at end of file diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile new file mode 100644 index 000000000000..d145093cab96 --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai.profile @@ -0,0 +1 @@ +SAI_INIT_CONFIG_FILE=/usr/share/sonic/hwsku/sai_4700.xml diff --git a/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700.xml b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700.xml new file mode 120000 index 000000000000..5c30521c1c7b --- /dev/null +++ b/device/mellanox/x86_64-mlnx_msn4700-r0/Mellanox-SN4700-V64/sai_4700.xml @@ -0,0 +1 @@ +../ACS-MSN4700/sai_4700.xml \ No newline at end of file