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This repository has been archived by the owner on Aug 22, 2019. It is now read-only.
Verilog has symbols that can be used in the UDP table to improve readability
Symbol Interpretation Explanation
b 0 or 1 Any known value
r (01) 0 -> 1 transition
f (10) 1 -> 0 transition
p (01) or (0x) or (x1) Any positive edge, including unknowns
n (10) or (1x) or (x0) Any negative edge, including unknowns
* (??) Any transition
As a workaround I have hacked the file to replace (01) with r as shown in the following below,
but I believe the (01) notation serves a purpose in understanding the UDP when debugging
quickly.
./src/parser ../../tests/dff_udp1a.v
../../tests/dff_udp1a.v 2879 /programming/ben-marshall/verilog-parser/src/verilog_parser.y Need to re-write this rule.
- Parse successful
Freeing data for 117 memory allocations.
Free'd 3446 bytes of 3526 bytes allocated.
Bytes remaining: 80
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Issue Description
Getting following error
File ../../tests/dff_udp1.v obtained from https://www.hdlworks.com/hdl_corner/verilog_ref/items/UserDefinedPrimitives.htm
What problem / feature / issue are you raising? Describe in as much detail
as possible.
What should happen:
What should normal behaviour for the given input be?
What actually happens:
Steps to re-create:
Describe exactly how to re-create the bug.
cd to build/debug
Obtain from https://www.hdlworks.com/hdl_corner/verilog_ref/items/UserDefinedPrimitives.htm and copy and paste file to ../../tests/dff_udp1.v
Then run
./src/parser ../../tests/dff_udp1.v
People to Notify:
Related Issues:
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