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../../tests/dff_udp1.v line 11 - ERROR: syntax error, unexpected CLOSE_BRACKET - ')' - Parse failed #17

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bbjj opened this issue Feb 5, 2018 · 2 comments
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@bbjj
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bbjj commented Feb 5, 2018

Issue Description

Getting following error

../../tests/dff_udp1.v line 11 - ERROR: syntax error, unexpected CLOSE_BRACKET
- ')'
- Parse failed

File ../../tests/dff_udp1.v obtained from https://www.hdlworks.com/hdl_corner/verilog_ref/items/UserDefinedPrimitives.htm

cat -n ../../tests/dff_udp1.v
     1	//https://www.hdlworks.com/hdl_corner/verilog_ref/items/UserDefinedPrimitives.htm
     2	
     3	primitive Dff (q, d, clk, rst);    // sequential UDP
     4	  output q;
     5	  input clk, rst, d;
     6	  reg q;
     7	  initial q = 0;
     8	  table
     9	    // d  clk  rst : old q : q
    10	       ?   ?    0  :   ?   : 0;
    11	       0   R    1  :   ?   : 0;
    12	       1  (01)  1  :   ?   : 1;
    13	       ?   N    1  :   ?   : -;
    14	       *   ?    1  :   ?   : -;
    15	       ?   ?   (0?):   ?   : -;
    16	  endtable
    17	endprimitive 

What problem / feature / issue are you raising? Describe in as much detail
as possible.

What should happen:

What should normal behaviour for the given input be?

../../tests/dff_udp1.v   - Parse successful

What actually happens:

../../tests/dff_udp1.v line 11 - ERROR: syntax error, unexpected CLOSE_BRACKET
- ')'
- Parse failed

Steps to re-create:

Describe exactly how to re-create the bug.

cd to build/debug

Obtain from https://www.hdlworks.com/hdl_corner/verilog_ref/items/UserDefinedPrimitives.htm and copy and paste file to ../../tests/dff_udp1.v

Then run
./src/parser ../../tests/dff_udp1.v

$> make clean
$> make all
$> ./src/parser ../../tests/dff_udp1.v

People to Notify:

Related Issues:

@bbjj
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bbjj commented Feb 5, 2018

Verilog has symbols that can be used in the UDP table to improve readability

Symbol  Interpretation          Explanation
  b         0 or 1              Any known value
  r         (01)                0 -> 1 transition
  f         (10)                1 -> 0 transition
  p     (01) or (0x) or (x1)    Any positive edge, including unknowns
  n     (10) or (1x) or (x0)    Any negative edge, including unknowns
  *         (??)                Any transition

@ben-marshall ben-marshall self-assigned this Feb 5, 2018
@bbjj
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bbjj commented Feb 5, 2018

As a workaround I have hacked the file to replace (01) with r as shown in the following below,
but I believe the (01) notation serves a purpose in understanding the UDP when debugging
quickly.

cat -n ../../tests/dff_udp1a.v 
     1	//https://www.hdlworks.com/hdl_corner/verilog_ref/items/UserDefinedPrimitives.htm
     2	
     3	primitive Dff (q, d, clk, rst);    // sequential UDP
     4	  output q;
     5	  input clk, rst, d;
     6	  reg q;
     7	  initial q = 0;
     8	  table
     9	    // d  clk  rst : old q : q
    10	       ?   ?    0  :   ?   : 0;
    11	       0   R    1  :   ?   : 0;
    12	    // 1  (01)  1  :   ?   : 1;
    13	       1   r    1  :   ?   : 1;    
    14	       ?   N    1  :   ?   : -;
    15	       *   ?    1  :   ?   : -;
    16	       ?   ?   (0?):   ?   : -;
    17	  endtable
    18	endprimitive 

./src/parser ../../tests/dff_udp1a.v 
../../tests/dff_udp1a.v 2879 /programming/ben-marshall/verilog-parser/src/verilog_parser.y Need to re-write this rule.
 - Parse successful
Freeing data for 117 memory allocations.
	Free'd 3446 bytes of 3526 bytes allocated.
	Bytes remaining: 80

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