diff --git a/docs/publications.rst b/docs/publications.rst index b55d4ac6e..fe37e8176 100644 --- a/docs/publications.rst +++ b/docs/publications.rst @@ -117,7 +117,8 @@ Furthermore, if you use any of the design automation algorithms, please consider @inproceedings{hofmann2023hexagonalization, title={{Scalable Physical Design for Silicon Dangling Bond Logic: How a 45\textdegree~Turn Prevents the Reinvention of the Wheel}}, author={Hofmann, Simon and Walter, Marcel and Wille, Robert}, - booktitle={IEEE International Conference on Nanotechnology (IEEE NANO)}, + booktitle={2023 IEEE 23rd International Conference on Nanotechnology (NANO)}, + pages={872-877}, year={2023} } diff --git a/include/fiction/algorithms/physical_design/hexagonalization.hpp b/include/fiction/algorithms/physical_design/hexagonalization.hpp index 053baeb5b..7172e9154 100644 --- a/include/fiction/algorithms/physical_design/hexagonalization.hpp +++ b/include/fiction/algorithms/physical_design/hexagonalization.hpp @@ -51,7 +51,8 @@ template /** * Transforms a 2DDWave-clocked Cartesian layout into a hexagonal even row clocked layout suitable for SiDBs by * remapping all gates and wires as originally proposed in \"Scalable Physical Design for Silicon Dangling Bond Logic: - * How a 45° Turn Prevents the Reinvention of the Wheel\" by S. Hofmann, M. Walter, and R. Wille in IEEE NANO 2023. + * How a 45° Turn Prevents the Reinvention of the Wheel\" by S. Hofmann, M. Walter, and R. Wille in IEEE NANO 2023 + * (https://ieeexplore.ieee.org/document/10231278). * * @param Lyt Gate-level layout that is 2DDWave-clocked. *