Release 1.0.2 sign-off checklist

[calebofearth]

Overview

This issue tracks the outstanding items to complete prior to finalizing the 1.0.2 patch release version and provides public visibility to the sign-off protocol used for releases.
Discussions among contributors have been ongoing to agree on the proposed changes in any outstanding Pull Requests, in order to converge all required tests and sign-off protocols.

Checklist

• Regressions sign-off from Microsoft (after finalizing all PRs) @calebofearth
• Coverage sign-off @calebofearth
• FPGA validation (Luke Mahowald)
• Update HW Rev ID, HW_CONFIG registers @calebofearth
• Complete Lint review @nstewart-amd
• Complete CDC review @nstewart-amd
• Complete RDC review @amullick007
• Formal Verification review @mojtaba-bisheh
• Update documentation
  • Add revised lint rules to integration specification @nstewart-amd @Nitsirks
  • Add CDC constraints to integration specification @nstewart-amd
  • Add RDC constraints/waivers to integration specification @amullick007
  • Update release notes @calebofearth
  • README updates @calebofearth
    • Add CDC tool version @nstewart-amd
    • Add RDC tool version @amullick007
  • Add latest synthesis results to the integration specification @nstewart-amd
• Tag the patch_v1.0 branch with v1.0.2 @calebofearth

Pending Pull Requests to complete

• Update HWReleaseProcess to allow RTL tagging independent of SW Caliptra#196
• Patch 1.0 RTL with Lint Fixes #518

[jlmahowa-amd]

hw/1.0 still points to patch_v1.0 so all of our nightly 1.0 FPGA runs are executing against that. I created a PR to update it to patch_v1.0.2_lint_fixes: 1626
@mhatrevi @korran Do you have any concerns?

[jlmahowa-amd]

Ran nightly SW and FPGA tests against the 1.0.2 RTL: https://github.com/chipsalliance/caliptra-sw/actions/runs/10220049591
There were a few tests that needed to be updated for the HW_REV but no real failures.

[nstewart-amd]

<style> </style>

Flow	Violation Count	Breakdown	Comments
LINT	1623	1612 – ImproperRangeIndex-ML	Known false violations CASE ID: 01648779
3 – NTL_RST05	Known reset synchronizer violation.
2 – STARC05-1.3.2.2	Known reset synchronizer violation.
		6 – UnrecSynthDir-ML	Files: •caliptra_prim_lc_sync.sv •caliptra_prim_mubi4_sync.sv •caliptra_prim_mubi8_sync.sv Code: •// pragma coverage on •// pragma coverage off
CDC	0	Clean	Clean
RDC	267	AMD analysis recommends waiver.	AMD analysis recommends waiver.

<style> </style>

Synthesis	Timing	Formality	Stdcell Area	Macro Area	Memory Area	Total Area
1.0	PASSED (500 MHz)	PASSED	86665	7872	239937	334473
1.0.3	PASSED (500 MHz)	PASSED	86527	7872	239937	334336