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codegenlinear.cpp
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codegenlinear.cpp
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// Licensed to the .NET Foundation under one or more agreements.
// The .NET Foundation licenses this file to you under the MIT license.
/*XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XX XX
XX Code Generation Support Methods for Linear Codegen XX
XX XX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
*/
#include "jitpch.h"
#ifdef _MSC_VER
#pragma hdrstop
#endif
#include "emit.h"
#include "codegen.h"
//------------------------------------------------------------------------
// genInitializeRegisterState: Initialize the register state contained in 'regSet'.
//
// Assumptions:
// On exit the "rsModifiedRegsMask" (in "regSet") holds all the registers' masks hosting an argument on the function
// and elements of "rsSpillDesc" (in "regSet") are setted to nullptr.
//
// Notes:
// This method is intended to be called only from initializeStructuresBeforeBlockCodeGeneration.
void CodeGen::genInitializeRegisterState()
{
// Initialize the spill tracking logic
regSet.rsSpillBeg();
// If any arguments live in registers, mark those regs as such
unsigned varNum;
LclVarDsc* varDsc;
for (varNum = 0, varDsc = compiler->lvaTable; varNum < compiler->lvaCount; varNum++, varDsc++)
{
// Is this variable a parameter assigned to a register?
if (!varDsc->lvIsParam || !varDsc->lvRegister)
{
continue;
}
// Is the argument live on entry to the method?
if (!VarSetOps::IsMember(compiler, compiler->fgFirstBB->bbLiveIn, varDsc->lvVarIndex))
{
continue;
}
if (varDsc->IsAddressExposed())
{
continue;
}
// Mark the register as holding the variable
regNumber reg = varDsc->GetRegNum();
if (genIsValidIntReg(reg))
{
regSet.verifyRegUsed(reg);
}
}
}
//------------------------------------------------------------------------
// genInitialize: Initialize Scopes, registers, gcInfo and current liveness variables structures
// used in the generation of blocks' code before.
//
// Assumptions:
// -The pointer logic in "gcInfo" for pointers on registers and variable is cleaned.
// -"compiler->compCurLife" becomes an empty set
// -"compiler->compCurLife" are set to be a clean set
// -If there is local var info siScopes scope logic in codegen is initialized in "siInit()"
//
// Notes:
// This method is intended to be called when code generation for blocks happens, and before the list of blocks is
// iterated.
void CodeGen::genInitialize()
{
// Initialize the line# tracking logic
if (compiler->opts.compScopeInfo)
{
siInit();
}
initializeVariableLiveKeeper();
genPendingCallLabel = nullptr;
// Initialize the pointer tracking code
gcInfo.gcRegPtrSetInit();
gcInfo.gcVarPtrSetInit();
// Initialize the register set logic
genInitializeRegisterState();
// Make sure a set is allocated for compiler->compCurLife (in the long case), so we can set it to empty without
// allocation at the start of each basic block.
VarSetOps::AssignNoCopy(compiler, compiler->compCurLife, VarSetOps::MakeEmpty(compiler));
// We initialize the stack level before first "BasicBlock" code is generated in case we need to report stack
// variable needs home and so its stack offset.
SetStackLevel(0);
}
//------------------------------------------------------------------------
// genCodeForBBlist: Generate code for all the blocks in a method
//
// Arguments:
// None
//
// Notes:
// This is the main method for linear codegen. It calls genCodeForTreeNode
// to generate the code for each node in each BasicBlock, and handles BasicBlock
// boundaries and branches.
//
void CodeGen::genCodeForBBlist()
{
unsigned savedStkLvl;
#ifdef DEBUG
genInterruptibleUsed = true;
// You have to be careful if you create basic blocks from now on
compiler->fgSafeBasicBlockCreation = false;
#endif // DEBUG
#if defined(DEBUG) && defined(TARGET_X86)
// Check stack pointer on call stress mode is not compatible with fully interruptible GC. REVIEW: why?
//
if (GetInterruptible() && compiler->opts.compStackCheckOnCall)
{
compiler->opts.compStackCheckOnCall = false;
}
#endif // defined(DEBUG) && defined(TARGET_X86)
#if defined(DEBUG) && defined(TARGET_XARCH)
// Check stack pointer on return stress mode is not compatible with fully interruptible GC. REVIEW: why?
// It is also not compatible with any function that makes a tailcall: we aren't smart enough to only
// insert the SP check in the non-tailcall returns.
//
if ((GetInterruptible() || compiler->compTailCallUsed) && compiler->opts.compStackCheckOnRet)
{
compiler->opts.compStackCheckOnRet = false;
}
#endif // defined(DEBUG) && defined(TARGET_XARCH)
genMarkLabelsForCodegen();
assert(!compiler->fgFirstBBScratch ||
compiler->fgFirstBB == compiler->fgFirstBBScratch); // compiler->fgFirstBBScratch
// has to be first.
/* Initialize structures used in the block list iteration */
genInitialize();
/*-------------------------------------------------------------------------
*
* Walk the basic blocks and generate code for each one
*
*/
BasicBlock* block;
for (block = compiler->fgFirstBB; block != nullptr; block = block->Next())
{
#ifdef DEBUG
if (compiler->verbose)
{
printf("\n=============== Generating ");
block->dspBlockHeader(compiler, true, true);
compiler->fgDispBBLiveness(block);
}
#endif // DEBUG
assert(LIR::AsRange(block).CheckLIR(compiler));
// Figure out which registers hold variables on entry to this block
regSet.ClearMaskVars();
gcInfo.gcRegGCrefSetCur = RBM_NONE;
gcInfo.gcRegByrefSetCur = RBM_NONE;
compiler->m_pLinearScan->recordVarLocationsAtStartOfBB(block);
// Updating variable liveness after last instruction of previous block was emitted
// and before first of the current block is emitted
genUpdateLife(block->bbLiveIn);
// Even if liveness didn't change, we need to update the registers containing GC references.
// genUpdateLife will update the registers live due to liveness changes. But what about registers that didn't
// change? We cleared them out above. Maybe we should just not clear them out, but update the ones that change
// here. That would require handling the changes in recordVarLocationsAtStartOfBB().
regMaskTP newLiveRegSet = RBM_NONE;
regMaskTP newRegGCrefSet = RBM_NONE;
regMaskTP newRegByrefSet = RBM_NONE;
#ifdef DEBUG
VARSET_TP removedGCVars(VarSetOps::MakeEmpty(compiler));
VARSET_TP addedGCVars(VarSetOps::MakeEmpty(compiler));
#endif
VarSetOps::Iter iter(compiler, block->bbLiveIn);
unsigned varIndex = 0;
while (iter.NextElem(&varIndex))
{
LclVarDsc* varDsc = compiler->lvaGetDescByTrackedIndex(varIndex);
if (varDsc->lvIsInReg())
{
newLiveRegSet |= varDsc->lvRegMask();
if (varDsc->lvType == TYP_REF)
{
newRegGCrefSet |= varDsc->lvRegMask();
}
else if (varDsc->lvType == TYP_BYREF)
{
newRegByrefSet |= varDsc->lvRegMask();
}
if (!varDsc->IsAlwaysAliveInMemory())
{
#ifdef DEBUG
if (verbose && VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varIndex))
{
VarSetOps::AddElemD(compiler, removedGCVars, varIndex);
}
#endif // DEBUG
VarSetOps::RemoveElemD(compiler, gcInfo.gcVarPtrSetCur, varIndex);
}
}
if ((!varDsc->lvIsInReg() || varDsc->IsAlwaysAliveInMemory()) && compiler->lvaIsGCTracked(varDsc))
{
#ifdef DEBUG
if (verbose && !VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varIndex))
{
VarSetOps::AddElemD(compiler, addedGCVars, varIndex);
}
#endif // DEBUG
VarSetOps::AddElemD(compiler, gcInfo.gcVarPtrSetCur, varIndex);
}
}
regSet.SetMaskVars(newLiveRegSet);
#ifdef DEBUG
if (compiler->verbose)
{
if (!VarSetOps::IsEmpty(compiler, addedGCVars))
{
printf("\t\t\t\t\t\t\tAdded GCVars: ");
dumpConvertedVarSet(compiler, addedGCVars);
printf("\n");
}
if (!VarSetOps::IsEmpty(compiler, removedGCVars))
{
printf("\t\t\t\t\t\t\tRemoved GCVars: ");
dumpConvertedVarSet(compiler, removedGCVars);
printf("\n");
}
}
#endif // DEBUG
gcInfo.gcMarkRegSetGCref(newRegGCrefSet DEBUGARG(true));
gcInfo.gcMarkRegSetByref(newRegByrefSet DEBUGARG(true));
/* Blocks with handlerGetsXcptnObj()==true use GT_CATCH_ARG to
represent the exception object (TYP_REF).
We mark REG_EXCEPTION_OBJECT as holding a GC object on entry
to the block, it will be the first thing evaluated
(thanks to GTF_ORDER_SIDEEFF).
*/
if (handlerGetsXcptnObj(block->bbCatchTyp))
{
for (GenTree* node : LIR::AsRange(block))
{
if (node->OperGet() == GT_CATCH_ARG)
{
gcInfo.gcMarkRegSetGCref(RBM_EXCEPTION_OBJECT);
break;
}
}
}
/* Start a new code output block */
genUpdateCurrentFunclet(block);
genLogLabel(block);
// Tell everyone which basic block we're working on
compiler->compCurBB = block;
block->bbEmitCookie = nullptr;
// If this block is a jump target or it requires a label then set 'needLabel' to true,
//
bool needLabel = block->HasFlag(BBF_HAS_LABEL);
if (block->IsFirstColdBlock(compiler))
{
#ifdef DEBUG
if (compiler->verbose)
{
printf("\nThis is the start of the cold region of the method\n");
}
#endif
// We should never split call/finally pairs between hot/cold sections
noway_assert(!block->isBBCallFinallyPairTail());
needLabel = true;
}
// We also want to start a new Instruction group by calling emitAddLabel below,
// when we need accurate bbWeights for this block in the emitter. We force this
// whenever our previous block was a BBJ_COND and it has a different weight than us.
//
// Note: We need to have set compCurBB before calling emitAddLabel
//
if (!block->IsFirst() && block->Prev()->KindIs(BBJ_COND) && (block->bbWeight != block->Prev()->bbWeight))
{
JITDUMP("Adding label due to BB weight difference: BBJ_COND " FMT_BB " with weight " FMT_WT
" different from " FMT_BB " with weight " FMT_WT "\n",
block->Prev()->bbNum, block->Prev()->bbWeight, block->bbNum, block->bbWeight);
needLabel = true;
}
#if FEATURE_LOOP_ALIGN
if (GetEmitter()->emitEndsWithAlignInstr())
{
// Force new label if current IG ends with an align instruction.
needLabel = true;
}
#endif
if (needLabel)
{
// Mark a label and update the current set of live GC refs
block->bbEmitCookie = GetEmitter()->emitAddLabel(gcInfo.gcVarPtrSetCur, gcInfo.gcRegGCrefSetCur,
gcInfo.gcRegByrefSetCur DEBUG_ARG(block));
}
if (block->IsFirstColdBlock(compiler))
{
// We require the block that starts the Cold section to have a label
noway_assert(block->bbEmitCookie);
GetEmitter()->emitSetFirstColdIGCookie(block->bbEmitCookie);
}
// Both stacks are always empty on entry to a basic block.
assert(genStackLevel == 0);
genAdjustStackLevel(block);
savedStkLvl = genStackLevel;
// Needed when jitting debug code
siBeginBlock(block);
// BBF_INTERNAL blocks don't correspond to any single IL instruction.
if (compiler->opts.compDbgInfo && block->HasFlag(BBF_INTERNAL) &&
!compiler->fgBBisScratch(block)) // If the block is the distinguished first scratch block, then no need to
// emit a NO_MAPPING entry, immediately after the prolog.
{
genIPmappingAdd(IPmappingDscKind::NoMapping, DebugInfo(), true);
}
bool firstMapping = true;
if (block->HasFlag(BBF_FUNCLET_BEG))
{
assert(compiler->UsesFunclets());
genReserveFuncletProlog(block);
}
// Clear compCurStmt and compCurLifeTree.
compiler->compCurStmt = nullptr;
compiler->compCurLifeTree = nullptr;
#ifdef SWIFT_SUPPORT
// Reassemble Swift struct parameters on the local stack frame in the
// scratch BB right after the prolog. There can be arbitrary amounts of
// codegen related to doing this, so it cannot be done in the prolog.
if (compiler->fgBBisScratch(block) && compiler->lvaHasAnySwiftStackParamToReassemble())
{
genHomeSwiftStructParameters(/* handleStack */ true);
}
#endif
// Emit poisoning into scratch BB that comes right after prolog.
// We cannot emit this code in the prolog as it might make the prolog too large.
if (compiler->compShouldPoisonFrame() && compiler->fgBBisScratch(block))
{
genPoisonFrame(newLiveRegSet);
}
// Traverse the block in linear order, generating code for each node as we
// as we encounter it.
#ifdef DEBUG
// Set the use-order numbers for each node.
{
int useNum = 0;
for (GenTree* node : LIR::AsRange(block))
{
assert((node->gtDebugFlags & GTF_DEBUG_NODE_CG_CONSUMED) == 0);
node->gtUseNum = -1;
if (node->isContained() || node->IsCopyOrReload())
{
continue;
}
for (GenTree* operand : node->Operands())
{
genNumberOperandUse(operand, useNum);
}
}
}
#endif // DEBUG
bool addRichMappings = JitConfig.RichDebugInfo() != 0;
INDEBUG(addRichMappings |= JitConfig.JitDisasmWithDebugInfo() != 0);
INDEBUG(addRichMappings |= JitConfig.WriteRichDebugInfoFile() != nullptr);
DebugInfo currentDI;
for (GenTree* node : LIR::AsRange(block))
{
// Do we have a new IL offset?
if (node->OperGet() == GT_IL_OFFSET)
{
GenTreeILOffset* ilOffset = node->AsILOffset();
DebugInfo rootDI = ilOffset->gtStmtDI.GetRoot();
if (rootDI.IsValid())
{
genEnsureCodeEmitted(currentDI);
currentDI = rootDI;
genIPmappingAdd(IPmappingDscKind::Normal, currentDI, firstMapping);
firstMapping = false;
}
if (addRichMappings && ilOffset->gtStmtDI.IsValid())
{
genAddRichIPMappingHere(ilOffset->gtStmtDI);
}
#ifdef DEBUG
assert(ilOffset->gtStmtLastILoffs <= compiler->info.compILCodeSize ||
ilOffset->gtStmtLastILoffs == BAD_IL_OFFSET);
if (compiler->opts.dspCode && compiler->opts.dspInstrs && ilOffset->gtStmtLastILoffs != BAD_IL_OFFSET)
{
while (genCurDispOffset <= ilOffset->gtStmtLastILoffs)
{
genCurDispOffset += dumpSingleInstr(compiler->info.compCode, genCurDispOffset, "> ");
}
}
#endif // DEBUG
}
genCodeForTreeNode(node);
if (node->gtHasReg(compiler) && node->IsUnusedValue())
{
genConsumeReg(node);
}
} // end for each node in block
#ifdef DEBUG
// The following set of register spill checks and GC pointer tracking checks used to be
// performed at statement boundaries. Now, with LIR, there are no statements, so they are
// performed at the end of each block.
// TODO: could these checks be performed more frequently? E.g., at each location where
// the register allocator says there are no live non-variable registers. Perhaps this could
// be done by using the map maintained by LSRA (operandToLocationInfoMap) to mark a node
// somehow when, after the execution of that node, there will be no live non-variable registers.
regSet.rsSpillChk();
/* Make sure we didn't bungle pointer register tracking */
regMaskTP ptrRegs = gcInfo.gcRegGCrefSetCur | gcInfo.gcRegByrefSetCur;
regMaskTP nonVarPtrRegs = ptrRegs & ~regSet.GetMaskVars();
// If return is a GC-type, clear it. Note that if a common
// epilog is generated (genReturnBB) it has a void return
// even though we might return a ref. We can't use the compRetType
// as the determiner because something we are tracking as a byref
// might be used as a return value of a int function (which is legal)
GenTree* blockLastNode = block->lastNode();
if ((blockLastNode != nullptr) && (blockLastNode->OperIs(GT_RETURN, GT_SWIFT_ERROR_RET)) &&
(varTypeIsGC(compiler->info.compRetType) ||
(blockLastNode->AsOp()->GetReturnValue() != nullptr &&
varTypeIsGC(blockLastNode->AsOp()->GetReturnValue()->TypeGet()))))
{
nonVarPtrRegs &= ~RBM_INTRET;
}
if (nonVarPtrRegs)
{
printf("Regset after " FMT_BB " gcr=", block->bbNum);
printRegMaskInt(gcInfo.gcRegGCrefSetCur & ~regSet.GetMaskVars());
compiler->GetEmitter()->emitDispRegSet(gcInfo.gcRegGCrefSetCur & ~regSet.GetMaskVars());
printf(", byr=");
printRegMaskInt(gcInfo.gcRegByrefSetCur & ~regSet.GetMaskVars());
compiler->GetEmitter()->emitDispRegSet(gcInfo.gcRegByrefSetCur & ~regSet.GetMaskVars());
printf(", regVars=");
printRegMaskInt(regSet.GetMaskVars());
compiler->GetEmitter()->emitDispRegSet(regSet.GetMaskVars());
printf("\n");
}
noway_assert(nonVarPtrRegs == RBM_NONE);
#endif // DEBUG
#if defined(DEBUG)
if (block->IsLast())
{
genEmitterUnitTests();
}
#endif // defined(DEBUG)
// It is possible to reach the end of the block without generating code for the current IL offset.
// For example, if the following IR ends the current block, no code will have been generated for
// offset 21:
//
// ( 0, 0) [000040] ------------ il_offset void IL offset: 21
//
// N001 ( 0, 0) [000039] ------------ nop void
//
// This can lead to problems when debugging the generated code. To prevent these issues, make sure
// we've generated code for the last IL offset we saw in the block.
genEnsureCodeEmitted(currentDI);
/* Is this the last block, and are there any open scopes left ? */
bool isLastBlockProcessed;
if (block->isBBCallFinallyPair())
{
isLastBlockProcessed = block->Next()->IsLast();
}
else
{
isLastBlockProcessed = block->IsLast();
}
if (compiler->opts.compDbgInfo && isLastBlockProcessed)
{
varLiveKeeper->siEndAllVariableLiveRange(compiler->compCurLife);
}
if (compiler->opts.compScopeInfo && (compiler->info.compVarScopesCount > 0))
{
siEndBlock(block);
}
SubtractStackLevel(savedStkLvl);
#ifdef DEBUG
// compCurLife should be equal to the liveOut set, except that we don't keep
// it up to date for vars that are not register candidates
// (it would be nice to have a xor set function)
VARSET_TP mismatchLiveVars(VarSetOps::Diff(compiler, block->bbLiveOut, compiler->compCurLife));
VarSetOps::UnionD(compiler, mismatchLiveVars,
VarSetOps::Diff(compiler, compiler->compCurLife, block->bbLiveOut));
VarSetOps::Iter mismatchLiveVarIter(compiler, mismatchLiveVars);
unsigned mismatchLiveVarIndex = 0;
bool foundMismatchedRegVar = false;
while (mismatchLiveVarIter.NextElem(&mismatchLiveVarIndex))
{
LclVarDsc* varDsc = compiler->lvaGetDescByTrackedIndex(mismatchLiveVarIndex);
if (varDsc->lvIsRegCandidate())
{
if (!foundMismatchedRegVar)
{
JITDUMP("Mismatched live reg vars after " FMT_BB ":", block->bbNum);
foundMismatchedRegVar = true;
}
JITDUMP(" V%02u", compiler->lvaTrackedIndexToLclNum(mismatchLiveVarIndex));
}
}
if (foundMismatchedRegVar)
{
JITDUMP("\n");
assert(!"Found mismatched live reg var(s) after block");
}
#endif
/* Both stacks should always be empty on exit from a basic block */
noway_assert(genStackLevel == 0);
#ifdef TARGET_AMD64
bool emitNopBeforeEHRegion = false;
// On AMD64, we need to generate a NOP after a call that is the last instruction of the block, in several
// situations, to support proper exception handling semantics. This is mostly to ensure that when the stack
// walker computes an instruction pointer for a frame, that instruction pointer is in the correct EH region.
// The document "clr-abi.md" has more details. The situations:
// 1. If the call instruction is in a different EH region as the instruction that follows it.
// 2. If the call immediately precedes an OS epilog. (Note that what the JIT or VM consider an epilog might
// be slightly different from what the OS considers an epilog, and it is the OS-reported epilog that matters
// here.)
// We handle case #1 here, and case #2 in the emitter.
if (GetEmitter()->emitIsLastInsCall())
{
// Ok, the last instruction generated is a call instruction. Do any of the other conditions hold?
// Note: we may be generating a few too many NOPs for the case of call preceding an epilog. Technically,
// if the next block is a BBJ_RETURN, an epilog will be generated, but there may be some instructions
// generated before the OS epilog starts, such as a GS cookie check.
if (block->IsLast() || !BasicBlock::sameEHRegion(block, block->Next()))
{
// We only need the NOP if we're not going to generate any more code as part of the block end.
switch (block->GetKind())
{
case BBJ_ALWAYS:
// We might skip generating the jump via a peephole optimization.
// If that happens, make sure a NOP is emitted as the last instruction in the block.
emitNopBeforeEHRegion = true;
break;
case BBJ_THROW:
case BBJ_CALLFINALLY:
case BBJ_EHCATCHRET:
// We're going to generate more code below anyway, so no need for the NOP.
case BBJ_RETURN:
case BBJ_EHFINALLYRET:
case BBJ_EHFAULTRET:
case BBJ_EHFILTERRET:
// These are the "epilog follows" case, handled in the emitter.
break;
case BBJ_COND:
case BBJ_SWITCH:
// These can't have a call as the last instruction!
default:
noway_assert(!"Unexpected bbKind");
break;
}
}
}
#endif // TARGET_AMD64
#if FEATURE_LOOP_ALIGN
auto SetLoopAlignBackEdge = [=](const BasicBlock* block, const BasicBlock* target) {
// This is the last place where we operate on blocks and after this, we operate
// on IG. Hence, if we know that the destination of "block" is the first block
// of a loop and that loop needs alignment (it has BBF_LOOP_ALIGN), then "block"
// might represent the lexical end of the loop. Propagate that information on the
// IG through "igLoopBackEdge".
//
// During emitter, this information will be used to calculate the loop size.
// Depending on the loop size, the decision of whether to align a loop or not will be taken.
// (Loop size is calculated by walking the instruction groups; see emitter::getLoopSize()).
// If `igLoopBackEdge` is set, then mark the next BasicBlock as a label. This will cause
// the emitter to create a new IG for the next block. Otherwise, if the next block
// did not have a label, additional instructions might be added to the current IG. This
// would make the "back edge" IG larger, possibly causing the size of the loop computed
// by `getLoopSize()` to be larger than actual, which could push the loop size over the
// threshold of loop size that can be aligned.
if (target->isLoopAlign())
{
if (GetEmitter()->emitSetLoopBackEdge(target))
{
if (!block->IsLast())
{
JITDUMP("Mark " FMT_BB " as label: alignment end-of-loop\n", block->Next()->bbNum);
block->Next()->SetFlags(BBF_HAS_LABEL);
}
}
}
};
#endif // FEATURE_LOOP_ALIGN
/* Do we need to generate a jump or return? */
bool removedJmp = false;
switch (block->GetKind())
{
case BBJ_RETURN:
genExitCode(block);
break;
case BBJ_THROW:
// If we have a throw at the end of a function or funclet, we need to emit another instruction
// afterwards to help the OS unwinder determine the correct context during unwind.
// We insert an unexecuted breakpoint instruction in several situations
// following a throw instruction:
// 1. If the throw is the last instruction of the function or funclet. This helps
// the OS unwinder determine the correct context during an unwind from the
// thrown exception.
// 2. If this is this is the last block of the hot section.
// 3. If the subsequent block is a special throw block.
// 4. On AMD64, if the next block is in a different EH region.
if (block->IsLast() || block->Next()->HasFlag(BBF_FUNCLET_BEG) ||
!BasicBlock::sameEHRegion(block, block->Next()) ||
(!isFramePointerUsed() && compiler->fgIsThrowHlpBlk(block->Next())) ||
block->IsLastHotBlock(compiler))
{
instGen(INS_BREAKPOINT); // This should never get executed
}
// Do likewise for blocks that end in DOES_NOT_RETURN calls
// that were not caught by the above rules. This ensures that
// gc register liveness doesn't change across call instructions
// in fully-interruptible mode.
else
{
GenTree* call = block->lastNode();
if ((call != nullptr) && (call->gtOper == GT_CALL))
{
if (call->AsCall()->IsNoReturn())
{
instGen(INS_BREAKPOINT); // This should never get executed
}
}
}
break;
case BBJ_CALLFINALLY:
block = genCallFinally(block);
break;
case BBJ_EHCATCHRET:
assert(compiler->UsesFunclets());
genEHCatchRet(block);
FALLTHROUGH;
case BBJ_EHFINALLYRET:
case BBJ_EHFAULTRET:
case BBJ_EHFILTERRET:
if (compiler->UsesFunclets())
{
genReserveFuncletEpilog(block);
}
#if defined(FEATURE_EH_WINDOWS_X86)
else
{
genEHFinallyOrFilterRet(block);
}
#endif // FEATURE_EH_WINDOWS_X86
break;
case BBJ_SWITCH:
break;
case BBJ_ALWAYS:
{
#ifdef DEBUG
GenTree* call = block->lastNode();
if ((call != nullptr) && (call->gtOper == GT_CALL))
{
// At this point, BBJ_ALWAYS should never end with a call that doesn't return.
assert(!call->AsCall()->IsNoReturn());
}
#endif // DEBUG
// If this block jumps to the next one, we might be able to skip emitting the jump
if (block->CanRemoveJumpToNext(compiler))
{
#ifdef TARGET_AMD64
if (emitNopBeforeEHRegion)
{
instGen(INS_nop);
}
#endif // TARGET_AMD64
removedJmp = true;
break;
}
#ifdef TARGET_XARCH
// Do not remove a jump between hot and cold regions.
bool isRemovableJmpCandidate = !compiler->fgInDifferentRegions(block, block->GetTarget());
inst_JMP(EJ_jmp, block->GetTarget(), isRemovableJmpCandidate);
#else
inst_JMP(EJ_jmp, block->GetTarget());
#endif // TARGET_XARCH
}
#if FEATURE_LOOP_ALIGN
SetLoopAlignBackEdge(block, block->GetTarget());
#endif // FEATURE_LOOP_ALIGN
break;
case BBJ_COND:
#if FEATURE_LOOP_ALIGN
// Either true or false target of BBJ_COND can induce a loop.
SetLoopAlignBackEdge(block, block->GetTrueTarget());
SetLoopAlignBackEdge(block, block->GetFalseTarget());
#endif // FEATURE_LOOP_ALIGN
break;
default:
noway_assert(!"Unexpected bbKind");
break;
}
#if FEATURE_LOOP_ALIGN
if (block->hasAlign())
{
// If this block has 'align' instruction in the end (identified by BBF_HAS_ALIGN),
// then need to add align instruction in the current "block".
//
// For non-adaptive alignment, add alignment instruction of size depending on the
// compJitAlignLoopBoundary.
// For adaptive alignment, alignment instruction will always be of 15 bytes for xarch
// and 16 bytes for arm64.
assert(ShouldAlignLoops());
assert(!block->isBBCallFinallyPairTail());
assert(!block->KindIs(BBJ_CALLFINALLY));
GetEmitter()->emitLoopAlignment(DEBUG_ARG1(block->KindIs(BBJ_ALWAYS) && !removedJmp));
}
if (!block->IsLast() && block->Next()->isLoopAlign())
{
if (compiler->opts.compJitHideAlignBehindJmp)
{
// The current IG is the one that is just before the IG having loop start.
// Establish a connection of recent align instruction emitted to the loop
// it actually is aligning using 'idaLoopHeadPredIG'.
GetEmitter()->emitConnectAlignInstrWithCurIG();
}
}
#endif // FEATURE_LOOP_ALIGN
#ifdef DEBUG
if (compiler->verbose)
{
varLiveKeeper->dumpBlockVariableLiveRanges(block);
}
compiler->compCurBB = nullptr;
#endif // DEBUG
} //------------------ END-FOR each block of the method -------------------
#if defined(FEATURE_EH_WINDOWS_X86)
// If this is a synchronized method on x86, and we generated all the code without
// generating the "exit monitor" call, then we must have deleted the single return block
// with that call because it was dead code. We still need to report the monitor range
// to the VM in the GC info, so create a label at the very end so we have a marker for
// the monitor end range.
//
// Do this before cleaning the GC refs below; we don't want to create an IG that clears
// the `this` pointer for lvaKeepAliveAndReportThis.
if (!compiler->UsesFunclets() && (compiler->info.compFlags & CORINFO_FLG_SYNCH) &&
(compiler->syncEndEmitCookie == nullptr))
{
JITDUMP("Synchronized method with missing exit monitor call; adding final label\n");
compiler->syncEndEmitCookie =
GetEmitter()->emitAddLabel(gcInfo.gcVarPtrSetCur, gcInfo.gcRegGCrefSetCur, gcInfo.gcRegByrefSetCur);
noway_assert(compiler->syncEndEmitCookie != nullptr);
}
#endif
// There could be variables alive at this point. For example see lvaKeepAliveAndReportThis.
// This call is for cleaning the GC refs
genUpdateLife(VarSetOps::MakeEmpty(compiler));
/* Finalize the spill tracking logic */
regSet.rsSpillEnd();
/* Finalize the temp tracking logic */
regSet.tmpEnd();
#ifdef DEBUG
if (compiler->verbose)
{
printf("\n# ");
printf("compCycleEstimate = %6d, compSizeEstimate = %5d ", compiler->compCycleEstimate,
compiler->compSizeEstimate);
printf("%s\n", compiler->info.compFullName);
}
#endif
}
/*
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XX XX
XX Register Management XX
XX XX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
*/
//------------------------------------------------------------------------
// genSpillVar: Spill a local variable
//
// Arguments:
// tree - the lclVar node for the variable being spilled
//
// Return Value:
// None.
//
// Assumptions:
// The lclVar must be a register candidate (lvIsRegCandidate())
//
void CodeGen::genSpillVar(GenTree* tree)
{
unsigned varNum = tree->AsLclVarCommon()->GetLclNum();
LclVarDsc* varDsc = compiler->lvaGetDesc(varNum);
assert(varDsc->lvIsRegCandidate());
// We don't actually need to spill if it is already living in memory
const bool needsSpill = ((tree->gtFlags & GTF_VAR_DEF) == 0) && varDsc->lvIsInReg();
if (needsSpill)
{
// In order for a lclVar to have been allocated to a register, it must not have been aliasable, and can
// therefore be store-normalized (rather than load-normalized). In fact, not performing store normalization
// can lead to problems on architectures where a lclVar may be allocated to a register that is not
// addressable at the granularity of the lclVar's defined type (e.g. x86).
var_types lclType = varDsc->GetStackSlotHomeType();
emitAttr size = emitTypeSize(lclType);
// If this is a write-thru or a single-def variable, we don't actually spill at a use,
// but we will kill the var in the reg (below).
if (!varDsc->IsAlwaysAliveInMemory())
{
instruction storeIns = ins_Store(lclType, compiler->isSIMDTypeLocalAligned(varNum));
assert(varDsc->GetRegNum() == tree->GetRegNum());
inst_TT_RV(storeIns, size, tree, tree->GetRegNum());
}
// We should only have both GTF_SPILL (i.e. the flag causing this method to be called) and
// GTF_SPILLED on a write-thru/single-def def, for which we should not be calling this method.
assert((tree->gtFlags & GTF_SPILLED) == 0);
// Remove the live var from the register.
genUpdateRegLife(varDsc, /*isBorn*/ false, /*isDying*/ true DEBUGARG(tree));
gcInfo.gcMarkRegSetNpt(varDsc->lvRegMask());
if (VarSetOps::IsMember(compiler, gcInfo.gcTrkStkPtrLcls, varDsc->lvVarIndex))
{
#ifdef DEBUG
if (!VarSetOps::IsMember(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex))
{
JITDUMP("\t\t\t\t\t\t\tVar V%02u becoming live\n", varNum);
}
else
{
JITDUMP("\t\t\t\t\t\t\tVar V%02u continuing live\n", varNum);
}
#endif
VarSetOps::AddElemD(compiler, gcInfo.gcVarPtrSetCur, varDsc->lvVarIndex);
}
}
tree->gtFlags &= ~GTF_SPILL;
// If this is NOT a write-thru, reset the var location.
if ((tree->gtFlags & GTF_SPILLED) == 0)
{
varDsc->SetRegNum(REG_STK);
if (varTypeIsMultiReg(tree))
{
varDsc->SetOtherReg(REG_STK);
}
}
else
{
// We only have 'GTF_SPILL' and 'GTF_SPILLED' on a def of a write-thru lclVar
// or a single-def var that is to be spilled at its definition.
assert(varDsc->IsAlwaysAliveInMemory() && ((tree->gtFlags & GTF_VAR_DEF) != 0));
}
if (needsSpill)
{
// We need this after "lvRegNum" has changed because now we are sure that varDsc->lvIsInReg() is false.
// "SiVarLoc" constructor uses the "LclVarDsc" of the variable.
varLiveKeeper->siUpdateVariableLiveRange(varDsc, varNum);
}
}
//------------------------------------------------------------------------
// genUpdateVarReg: Update the current register location for a multi-reg lclVar
//
// Arguments:
// varDsc - the LclVarDsc for the lclVar
// tree - the lclVar node