From c3566b1823a4092831de05daf3e55a89b36c4889 Mon Sep 17 00:00:00 2001 From: Egor Chesakov Date: Wed, 1 Dec 2021 17:19:19 -0800 Subject: [PATCH] Remove restrictions on offset in Lowering::ContainBlockStoreAddress() --- src/coreclr/jit/lowerarmarch.cpp | 18 ++++-------------- 1 file changed, 4 insertions(+), 14 deletions(-) diff --git a/src/coreclr/jit/lowerarmarch.cpp b/src/coreclr/jit/lowerarmarch.cpp index 345edc402cc3f..c1fd3ddf1984b 100644 --- a/src/coreclr/jit/lowerarmarch.cpp +++ b/src/coreclr/jit/lowerarmarch.cpp @@ -442,24 +442,14 @@ void Lowering::ContainBlockStoreAddress(GenTreeBlk* blkNode, unsigned size, GenT GenTreeIntCon* offsetNode = addr->AsOp()->gtGetOp2()->AsIntCon(); ssize_t offset = offsetNode->IconValue(); - // All integer load/store instructions on both ARM32 and ARM64 support - // offsets in range -255..255. Of course, this is a rather conservative - // check. For example, if the offset and size are a multiple of 8 we - // could allow a combined offset of up to 32760 on ARM64. +#ifdef TARGET_ARM + // All integer load/store instructions on Arm support offsets in range -255..255. + // Of course, this is a rather conservative check. if ((offset < -255) || (offset > 255) || (offset + static_cast(size) > 256)) { return; } - -#ifdef TARGET_ARM64 - // If we're going to use LDP/STP we need to ensure that the offset is - // a multiple of 8 since these instructions do not have an unscaled - // offset variant. - if ((size >= 2 * REGSIZE_BYTES) && (offset % REGSIZE_BYTES != 0)) - { - return; - } -#endif +#endif // TARGET_ARM if (!IsSafeToContainMem(blkNode, addr)) {