diff --git a/src/target/esp32.c b/src/target/esp32.c
index 4b213b7af..347da42e2 100644
--- a/src/target/esp32.c
+++ b/src/target/esp32.c
@@ -786,6 +786,7 @@ struct target_type esp32_target = {
 
 	.checksum_memory = xtensa_checksum_memory,
 
+	.get_gdb_arch = xtensa_get_gdb_arch,
 	.get_gdb_reg_list = xtensa_get_gdb_reg_list,
 
 	.run_algorithm = xtensa_run_algorithm,
diff --git a/src/target/esp32s2.c b/src/target/esp32s2.c
index 70b1c14ce..6e53b1813 100644
--- a/src/target/esp32s2.c
+++ b/src/target/esp32s2.c
@@ -784,6 +784,7 @@ struct target_type esp32s2_target = {
 
 	.checksum_memory = xtensa_checksum_memory,
 
+	.get_gdb_arch = xtensa_get_gdb_arch,
 	.get_gdb_reg_list = xtensa_get_gdb_reg_list,
 
 	.run_algorithm = xtensa_run_algorithm,
diff --git a/src/target/esp32s3.c b/src/target/esp32s3.c
index beaef2501..db177fd3e 100644
--- a/src/target/esp32s3.c
+++ b/src/target/esp32s3.c
@@ -698,6 +698,7 @@ struct target_type esp32s3_target = {
 
 	.checksum_memory = xtensa_checksum_memory,
 
+	.get_gdb_arch = xtensa_get_gdb_arch,
 	.get_gdb_reg_list = xtensa_get_gdb_reg_list,
 
 	.run_algorithm = xtensa_run_algorithm,
diff --git a/src/target/xtensa.c b/src/target/xtensa.c
index 43dcd2ac8..7b682f166 100644
--- a/src/target/xtensa.c
+++ b/src/target/xtensa.c
@@ -2550,6 +2550,11 @@ void xtensa_target_deinit(struct target *target)
 	free(xtensa->sw_brps);
 }
 
+const char *xtensa_get_gdb_arch(struct target *target)
+{
+	return "xtensa";
+}
+
 COMMAND_HELPER(xtensa_cmd_permissive_mode_do, struct xtensa *xtensa)
 {
 	if (CMD_ARGC != 1)
diff --git a/src/target/xtensa.h b/src/target/xtensa.h
index 28f205006..d560e1d6d 100644
--- a/src/target/xtensa.h
+++ b/src/target/xtensa.h
@@ -489,6 +489,7 @@ int xtensa_handle_target_event(struct target *target,
 void xtensa_set_permissive_mode(struct target *target, bool state);
 int xtensa_fetch_user_regs_u32(struct target *target);
 int xtensa_queue_write_dirty_user_regs_u32(struct target *target);
+const char *xtensa_get_gdb_arch(struct target *target);
 
 extern const struct reg_arch_type xtensa_user_reg_u32_type;
 extern const struct reg_arch_type xtensa_user_reg_u128_type;