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DD-GPS-TCLKIN-00A0.dts
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DD-GPS-TCLKIN-00A0.dts
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/*
* Copyright (C) 2013 the8thlayerof.net
*
* GPS cape
* UART4 on pins P9.11, P9.13
* PPS on pin P8.7
* TCLKIN on pin P9.41
*
* note: disable BB-BONELT-HDMI in /boot/uboot/uEnv.txt, mcasp0 on P9.41B conflicts with P9.41A
* cape_disable=capemgr.disable_partno=BB-BONELT-HDMI,BB-BONELT-HDMIN
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/plugin/;
/ {
compatible = "ti,beaglebone", "ti,beaglebone-black";
/* identification */
part-number = "DD-GPS";
version = "00A0";
/* state the resources this cape uses */
exclusive-use =
/* the pin header uses */
"P9.11", /* uart4_rxd/GPS TX */
"P9.13", /* uart4_txd/GPS RX */
"P8.7", /* timer4/GPS PPS */
"P9.41A", /* TCLKIN */
"P9.41B", /* tied to TCLKIN */
/* the hardware ip uses */
"uart4", /* 0-based counting */
"gpio2_2", /* 0-based counting */
"timer4"; /* 1-based counting */
fragment@0 {
target = <&am33xx_pinmux>;
__overlay__ {
gps_uart4_pins: pinmux_gps_uart4_pins {
pinctrl-single,pins = <
0x70 0x26 /* P9.11 uart4_rxd MODE6 INPUT (RX) */
0x74 0x06 /* P9.13 uart4_txd MODE6 OUTPUT (TX) */
>;
};
gps_pps_pins: pinmux_gps_pps_pins {
pinctrl-single,pins = <
0x90 0x22 /* P8.7 MODE2 TIMER4 */
0x1b4 0x2A /* P9.41A MODE2 TCLKIN */
0x1a8 0x0F /* P9.41B MODE7 INPUT (high-Z, tied to P9.41A) - conflicts with HDMI */
>;
};
};
};
fragment@1 {
target = <&uart5>; /* 1-based counting */
__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&gps_uart4_pins>;
};
};
fragment@2 {
target = <&ocp>;
__overlay__ {
pps_gmtimer {
compatible = "pps-gmtimer";
status = "okay";
timer = <&timer4>;
pinctrl-names = "default";
pinctrl-0 = <&gps_pps_pins>;
use-tclkin = <1>;
};
};
};
};