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New hardware platform #275
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We are definitely interested in a port of Linien to Sinara hardware! I have personally not used Sinara/Artiq myself but some of my colleagues do and I might do so myself in future projects. I have planned for some time to separate the different components of Linien more clearly, i.e. having separate packages for server, client and GUI and clearly separating migen/verilog/FPGA related code. I have so far not gotten around of actually doing this (other than some research into python namespace packages) but I think doing this would make porting Linien to other platforms much easier. We should also consider which parts of the code are actually hardware dependent and separate those in order to avoid diverging codebases. |
I believe we could help you with this refactorization while porting to Fast Servo. We will get into the project details and maybe then we could arrange some meeting to go into details and setup a work plan? |
That sounds great! I think I can set aside some time tomorrow to get this started. Also happy to have a meeting once you got an idea about the code. |
Started today with the refactor: #277. This is not yet finished and probably won't work yet, will continue as time permits. |
The PR is still WIP but I think I am on a good way and the components of linien are now more clearly separated (did not use a namespace package after all). There will be 5 packages, linien-common, linien-server, linien-client and linien-gui that will be put on pypi. There is also the gateware which is not a package but is transpiled using migen. All packages and the gateware rely on linien-common. The easiest way is probably to install packages via pip in editable mode, starting with As for dependencies: All packages and the gateware rely on What I have tested succesfully:
Things that do not work yet:
This needs to be updated but most things should still be valid: https://github.com/linien-org/linien/wiki/Development @kaolpr : Feel free to check out #277 :) The most relevant things for a port should already be clear. |
Also note, that on the RP, we are unfortunately limited to use Python 3.5, see RedPitaya/RedPitaya#233 |
@bleykauf Thank you for quick and extensive action! We're currently debugging the prototype of FastServo. As soon as we're done with it we'll dive into linien. |
@kaolpr just checking in, is this still something you consider? Separation between the different components is now much clearer. |
We do have a working prototype. I'll look into it and see when we can submit PR. |
At WUT we're developing Sinara Open Hardware ecosystem and recently received prototypes of the board that may be of interest to you. The project is called Fast Servo and is designed in a 3U form factor to be used in crate or standalone. It features 2ch 125 MSPS 16b ADC and 2ch 125 MSPS 14b DAC and is based on Trenz Xilinx Zynq module. After we're done with testing, it will be available for purchase from our industrial partners.
For more information see project Wiki.
If you are interested in using Fast Servo with linien we can contribute and port it to our board.
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