From d108c8cfa54ec14f9cd59199893a6776e1b3b941 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 4 Aug 2021 15:53:54 +0200 Subject: [PATCH] arm64: dts: HiSilicon: hi3670i: fix some warnings when probing PCI There are some warnings generated at PCI probing time, due to some DTS issues: [ 4.986196] kirin-pcie f4000000.pcie: PCI host bridge to bus 0000:00 [ 4.992572] pci_bus 0000:00: root bus resource [bus 00-01] ... [ 5.065566] pci_bus 0000:01: busn_res: can not insert [bus 01-ff] under [bus 00-01] (conflicts with (null) [bus 00-01]) And: [ 5.716927] WARNING: CPU: 5 PID: 140 at include/linux/msi.h:256 __pci_enable_msi_range+0x398/0x59c [ 5.725896] Modules linked in: nvme nvme_core wl18xx wlcore mac80211 libarc4 cfg80211 crct10dif_ce wlcore_sdio phy_hi3670_usb3 tcpci_rt1711h phy_hi3670_pcie tcpci tcpm typec rfkill pcie_kirin hisi_hikey_usb drm fuse ip_tables x_tables ipv6 [ 5.742186] mmc_host mmc1: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0) [ 5.747143] CPU: 5 PID: 140 Comm: kworker/u16:2 Not tainted 5.14.0-rc1+ #165 [ 5.763398] Hardware name: HiKey970 (DT) [ 5.767316] Workqueue: events_unbound deferred_probe_work_func [ 5.773150] pstate: 60000005 (nZCv daif -PAN -UAO -TCO BTYPE=--) [ 5.779151] pc : __pci_enable_msi_range+0x398/0x59c [ 5.784022] lr : __pci_enable_msi_range+0x2b8/0x59c [ 5.786383] mmc_host mmc1: Bus speed (slot 0) = 25000000Hz (slot req 25000000Hz, actual 25000000HZ div = 0) [ 5.788894] sp : ffff800012a3b670 [ 5.788896] x29: ffff800012a3b670 x28: ffff000103180000 x27: 0000000000000001 [ 5.809066] x26: ffff0001031802f0 x25: ffff80001216626c x24: 0000000000000000 [ 5.816197] x23: ffff0001031800c8 x22: 0000000000000001 x21: 0000000000000001 [ 5.823329] x20: 0000000000000001 x19: ffff0001008e8b80 x18: 0000000000000002 [ 5.830460] x17: 6572702066666666 x16: 6633376678302d30 x15: 0000000000000000 [ 5.837592] x14: 0000000000000001 x13: 00000000000a257a x12: 0000000000000040 [ 5.844724] x11: ffff000100400248 x10: ffff00010040024a x9 : 0000000000000000 [ 5.851855] x8 : ffff0001008e8c00 x7 : ffff800013000000 x6 : ffff800008f69190 [ 5.858987] x5 : 0000000040000000 x4 : 0000000000000000 x3 : ffff800010807b10 [ 5.866118] x2 : 0000000000000000 x1 : ffff0001031802f0 x0 : 0000000000000000 [ 5.873251] Call trace: [ 5.875690] __pci_enable_msi_range+0x398/0x59c [ 5.880214] pci_alloc_irq_vectors_affinity+0xe0/0x140 Those won't affect the device's work, but it is a lot better to not have those at the logs. Signed-off-by: Mauro Carvalho Chehab --- arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi index aa733f90df5625..7d383313452654 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi @@ -666,10 +666,10 @@ clock-names = "apb_pclk"; }; - its_pcie: interrupt-controller@f4000000 { + its_pcie: interrupt-controller@f5100000 { + reg = <0x0 0xf5100000 0x0 0x100000>; compatible = "arm,gic-v3-its"; msi-controller; - reg = <0x0 0xf5100000 0x0 0x100000>; }; pcie_phy: pcie-phy@fc000000 { @@ -701,8 +701,7 @@ <0x0 0xfc180000 0x0 0x1000>, <0x0 0xf5000000 0x0 0x2000>; reg-names = "dbi", "apb", "config"; - bus-range = <0x0 0x1>; - msi-parent = <&its_pcie>; + bus-range = <0x00 0xff>; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; @@ -733,9 +732,11 @@ #address-cells = <3>; #size-cells = <2>; ranges; + bus-range = <0x01 0xff>; + msi-parent = <&its_pcie>; pcie@1,0 { // Lane 4: M.2 - reg = <0x800 0 0 0 0>; + reg = <0x010800 0 0 0 0>; compatible = "pciclass,0604"; device_type = "pci"; reset-gpios = <&gpio3 1 0>; @@ -745,7 +746,7 @@ }; pcie@5,0 { // Lane 5: Mini PCIe - reg = <0x2800 0 0 0 0>; + reg = <0x012800 0 0 0 0>; compatible = "pciclass,0604"; device_type = "pci"; reset-gpios = <&gpio27 4 0 >; @@ -755,7 +756,7 @@ }; pcie@7,0 { // Lane 6: Ethernet - reg = <0x3800 0 0 0 0>; + reg = <0x013800 0 0 0 0>; compatible = "pciclass,0604"; device_type = "pci"; reset-gpios = <&gpio25 2 0 >;