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PM: Handle PIB Reset with data check handler on all GPEs
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Key_Cronus_Test=PM_REGRESS

Change-Id: I121aaf5efb579fde88829f2ef5354ad4c8b6d77b
CQ:SW447494
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/68622
Tested-by: Jenkins Server <[email protected]>
Tested-by: PPE CI <[email protected]>
Reviewed-by: Douglas R. Gilbert <[email protected]>
Tested-by: Cronus HW CI <[email protected]>
Tested-by: FSP CI Jenkins <[email protected]>
Reviewed-by: Gregory S. Still <[email protected]>
Reviewed-by: Jennifer A. Stofer <[email protected]>
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@davidduyue @op-jenkins
davidduyue authored and op-jenkins committed May 10, 2019
1 parent d088814 commit f52ed17
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Showing 10 changed files with 119 additions and 9 deletions.
4 changes: 2 additions & 2 deletions import/chips/p9/procedures/ppe/pk/ppe42/pk_panic_codes.h
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
/* COPYRIGHT 2016,2017 */
/* COPYRIGHT 2016,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -49,7 +49,7 @@ typedef enum
PK_DEFAULT_SPECIAL_HANDLER = 0x0007,
PPE42_PHANTOM_INTERRUPT = 0x0008,
PPE42_ILLEGAL_INSTRUCTION = 0x0009,
PK_UNUSED_000a = 0x000a,
PPE42_PIB_RESET_NOT_RECOVER = 0x000a,
PK_UNUSED_000d = 0x000d,
PK_UNUSED_001c = 0x001c,
PK_UNUSED_001d = 0x001d,
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47 changes: 46 additions & 1 deletion import/chips/p9/procedures/ppe/pk/ppe42/ppe42_exceptions.S
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
/* COPYRIGHT 2015,2018 */
/* COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -583,4 +583,49 @@ ctx_pop:

rfi

__special_machine_check_handler:

stwu %r1, -PK_CTX_SIZE(%r1)
stw %r0, PK_CTX_GPR0(%r1)
stvd %d3, PK_CTX_GPR3(%r1)
stvd %d5, PK_CTX_GPR5(%r1)
stvd %d7, PK_CTX_GPR7(%r1)
stvd %d9, PK_CTX_GPR9(%r1)
stvd %d28, PK_CTX_GPR28(%r1)
stvd %d30, PK_CTX_GPR30(%r1)
mflr %r3
stw %r3, PK_CTX_LR(%r1)
mfcr %r3
mfsprg0 %r4
stvd %d3, PK_CTX_CR(%r1)
mfxer %r3
mfctr %r4
stvd %d3, PK_CTX_XER(%r1)
mfsrr0 %r3
mfsrr1 %r4
stvd %d3, PK_CTX_SRR0(%r1)
#if defined(__PPE__)
bl __ppe42_pib_reset_handler
#endif
lwz %r0, PK_CTX_GPR0(%r1)
lvd %d7, PK_CTX_SRR0(%r1)
mtsrr1 %r8
mtsrr0 %r7
lvd %d5, PK_CTX_XER(%r1)
mtctr %r6
mtxer %r5
lvd %d30, PK_CTX_GPR30(%r1)
lvd %d28, PK_CTX_GPR28(%r1)
lvd %d9, PK_CTX_GPR9(%r1)
lvd %d7, PK_CTX_GPR7(%r1)
lvd %d5, PK_CTX_GPR5(%r1)
lvd %d3, PK_CTX_CR(%r1) ## CR,SPRG0
mtcr0 %r3
lwz %r4, PK_CTX_LR(%r1)
mtlr %r4
lvd %d3, PK_CTX_GPR3(%r1)
addi %r1, %r1, PK_CTX_SIZE

rfi

/// \endcond
44 changes: 43 additions & 1 deletion import/chips/p9/procedures/ppe/pk/ppe42/ppe42_irq_core.c
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
/* COPYRIGHT 2015,2017 */
/* COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -34,8 +34,50 @@

#define __PPE42_IRQ_CORE_C__


#include "pk.h"

uint32_t G_pib_reset_flag = 0;

#ifdef __PPE__

void
__ppe42_pib_reset_handler()
{
//PK_TRACE("Entered 1 ppe42_pib_reset_handler");
uint32_t srr1 = mfspr(SPRN_SRR1);

// assuming pib is being reset thus give timeout error
if (((srr1 & MSR_SIBRC) == MSR_SIBRC))
{
// if already waited for pib to reset, panic as still fail
if (G_pib_reset_flag == 10 )
{
G_pib_reset_flag = 0;
PK_PANIC(PPE42_PIB_RESET_NOT_RECOVER);
}

// note pib reset is being detected
// this flag will be cleared by fit timer if pib reset recovers
G_pib_reset_flag++;

// DELAY to wait pib reset to complete
volatile uint32_t loop;

for(loop = 0; loop < 6400; loop++);

PK_TRACE_INF("PIB reset flag value %x", G_pib_reset_flag);

}
else
{
// panic for all other pib return codes
PK_PANIC(PPE42_MACHINE_CHECK_PANIC);
}
}
#endif


#ifndef STATIC_IRQ_TABLE
Ppe42IrqHandler __ppe42_irq_handlers[EXTERNAL_IRQS + 1];
#endif
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6 changes: 5 additions & 1 deletion import/chips/p9/procedures/ppe/pk/ppe42/ppe42_scom.h
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
/* COPYRIGHT 2015,2017 */
/* COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -49,6 +49,7 @@ extern "C" {
#endif



/// PPE Load Virtual Double operation
#define PPE_LVD(_m_address, _m_data) \
asm volatile \
Expand Down Expand Up @@ -149,6 +150,9 @@ extern inline uint32_t getscom(const uint32_t i_chiplet, const uint32_t i_addres
extern inline void putscom_norc(const uint32_t i_address, uint64_t i_data)
{
PPE_STVD(i_address, i_data);
#ifdef PK_MACHINE_HANDLER_SUPPPORT
asm volatile ("sync");
#endif
}

#ifdef __cplusplus
Expand Down
4 changes: 3 additions & 1 deletion import/chips/p9/procedures/ppe_closed/cme/pk_app_cfg.h
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
/* COPYRIGHT 2015,2018 */
/* COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -104,6 +104,8 @@
#error "USE_PPE_IMPRECISE_MODE must be defined in order to enable USE_CME_QUEUED_SCOM or USE_CME_QUEUED_SCAN"
#endif

#define PK_MACHINE_HANDLER_SUPPORT 0

// --------------------

#if NIMBUS_DD_LEVEL == 10
Expand Down
3 changes: 3 additions & 0 deletions import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/p9_pgpe_fit.c
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Expand Up @@ -382,6 +382,7 @@ __attribute__((always_inline)) inline void handle_fit_timebase_sync()
G_tb_sync_count++;
}
}
extern uint32_t G_pib_reset_flag;

//
// handle_undervolt
Expand Down Expand Up @@ -409,6 +410,8 @@ void p9_pgpe_fit_handler(void* arg, PkIrqId irq)
{

mtmsr(PPE42_MSR_INITIAL);
PK_TRACE_DBG("IPB reset flag value %x", G_pib_reset_flag);
G_pib_reset_flag = 0;
handle_occ_beacon();
handle_core_throttle();
handle_occflg_requests();
Expand Down
7 changes: 6 additions & 1 deletion import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pk_app_cfg.h
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
/* COPYRIGHT 2015,2018 */
/* COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -107,6 +107,11 @@
/// using the table defined in pk_app_irq_table.c.
#define STATIC_IRQ_TABLE

#define PK_MACHINE_HANDLER_SUPPORT 1

#define PPE42_MACHINE_CHECK_HANDLER \
b __special_machine_check_handler


/// Static configuration data for external interrupts:
///
Expand Down
1 change: 1 addition & 0 deletions import/chips/p9/procedures/ppe_closed/pgpe/pstate_gpe/pstate_common.mk
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Expand Up @@ -90,6 +90,7 @@ PSTATE_COMMONFLAGS+= -DPK_THREAD_SUPPORT=1
PSTATE_COMMONFLAGS+= -DPK_TRACE_SUPPORT=1
PSTATE_COMMONFLAGS+= -DUSE_PK_APP_CFG_H=1
PSTATE_COMMONFLAGS+= -D__PPE_PLAT
PSTATE_COMMONFLAGS+= -D__PPE__
PSTATE_COMMONFLAGS+= -D__PK__=1
PSTATE_COMMONFLAGS+= -DPK_TRACE_SZ=2048
PSTATE_COMMONFLAGS+= -DPSTATE_GPE
Expand Down
5 changes: 4 additions & 1 deletion import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/p9_sgpe_stop_irq_handlers.c
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
/* COPYRIGHT 2015,2018 */
/* COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -71,13 +71,16 @@ SgpeStopRecord G_sgpe_stop_record __attribute__((section (".dump_ptrs"))) =
{{0, 0, 0}}
};

extern uint32_t G_pib_reset_flag;


void
p9_sgpe_fit_handler()
{
PK_TRACE("FIT: Handler Fired");

PK_TRACE_DBG("IPB reset flag value %x", G_pib_reset_flag);
G_pib_reset_flag = 0;
uint32_t tpending = in32(G_OCB_OPIT0PRA) |
in32(G_OCB_OPIT3PRA) |
in32(G_OCB_OPIT6PRB);
Expand Down
7 changes: 6 additions & 1 deletion import/chips/p9/procedures/ppe_closed/sgpe/stop_gpe/pk_app_cfg.h
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Expand Up @@ -5,7 +5,7 @@
/* */
/* OpenPOWER HCODE Project */
/* */
/* COPYRIGHT 2015,2018 */
/* COPYRIGHT 2015,2019 */
/* [+] International Business Machines Corp. */
/* */
/* */
Expand Down Expand Up @@ -156,4 +156,9 @@
/// This file provides platform specific panic codes
#define PLATFORM_PANIC_CODES_H "sgpe_panic_codes.h"

#define PK_MACHINE_HANDLER_SUPPORT 1

#define PPE42_MACHINE_CHECK_HANDLER \
b __special_machine_check_handler

#endif /*__PK_APP_CFG_H__*/

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