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HB Axone simics model changes to support DDIMM SPD i2c access
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--- Added an I2C MUX target at engine 3, port 0, device address 0xE0
--- Added EEPROM_VPD_PRIMARY_INFO data to the DIMMs.  This info also
    includes the I2C MUX target details to get to the MUX.
    EEPROM_VPD_PRIMARY_INFO fields:
          * byteAddrOffset set to 0x00
          * chipCount set to 0x01
          * maxMemorySizeKB set to 0x4000 (4 KB)
          * writeCycleTime set to 0x05    (5 ms)
          * writePageSize set to 0x20
--- Updated the I2C_BUS_SPEED_ARRAY attribute for target sys0node0proc0.
    Added speed 400 to array that corresponds to engine 3, port 0.

Change-Id: Ia1965803a12f08e816b19d9d9a6fe2dfe3a2df36
RTC: 202358
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69835
Reviewed-by: Christian R. Geddes <[email protected]>
Tested-by: Christian R. Geddes <[email protected]>
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velozr authored and crgeddes committed Dec 18, 2018
1 parent 36673e6 commit a283387
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225 changes: 223 additions & 2 deletions src/usr/targeting/common/xmltohb/simics_AXONE.system.xml
Original file line number Diff line number Diff line change
Expand Up @@ -521,7 +521,7 @@
<default>400,400,0,0,0,0,0,0,0,0,0,0,0,
400,400,400,400,0,0,0,0,0,0,0,0,0,
400,400,0,0,0,0,0,0,0,0,0,0,0,
0,400,0,0,0,0,0,0,0,0,0,0,0</default>
400,400,0,0,0,0,0,0,0,0,0,0,0</default>
</attribute>
<attribute>
<id>MRU_ID</id>
Expand Down Expand Up @@ -9403,7 +9403,7 @@
</attribute>
<attribute>
<id>AFFINITY_PATH</id>
<default>affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0/mem_port-0/dimm-0</default>
<default>affinity:sys-0/node-0/proc-0/mc-0/mi-0/mcc-0/omi-0/ocmb_chip-0/mem_port-0/dimm-0</default>
</attribute>
<attribute>
<id>FAPI_POS</id>
Expand All @@ -9413,6 +9413,23 @@
<id>VPD_REC_NUM</id>
<default>0</default>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
<default>
<field><id>byteAddrOffset</id><value>0x02</value></field>
<field><id>chipCount</id><value>0x01</value></field>
<field><id>devAddr</id><value>0xA0</value></field>
<field><id>engine</id><value>3</value></field>
<!-- Engine 3 Port 1 is directly attached to DDIMM0 in the simics axone model -->
<field><id>port</id><value>1</value></field>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>20</value></field>
<field><id>writePageSize</id><value>32</value></field>
<field><id>i2cMuxBusSelector</id><value>0xFF</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0</value></field>
</default>
</attribute>
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9443,6 +9460,24 @@
<id>VPD_REC_NUM</id>
<default>1</default>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
<default>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>engine</id><value>3</value></field>
<field><id>byteAddrOffset</id><value>0x02</value></field>
<field><id>devAddr</id><value>0xA0</value></field>
<field><id>chipCount</id><value>0x01</value></field>
<!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model -->
<field><id>port</id><value>0</value></field>
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x08</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9473,6 +9508,24 @@
<id>VPD_REC_NUM</id>
<default>2</default>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
<default>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>engine</id><value>3</value></field>
<field><id>byteAddrOffset</id><value>0x02</value></field>
<field><id>devAddr</id><value>0xA0</value></field>
<field><id>chipCount</id><value>0x01</value></field>
<!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model -->
<field><id>port</id><value>0</value></field>
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x09</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9503,6 +9556,24 @@
<id>VPD_REC_NUM</id>
<default>3</default>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
<default>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>engine</id><value>3</value></field>
<field><id>byteAddrOffset</id><value>0x02</value></field>
<field><id>devAddr</id><value>0xA0</value></field>
<field><id>chipCount</id><value>0x01</value></field>
<!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model -->
<field><id>port</id><value>0</value></field>
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0A</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9533,6 +9604,24 @@
<id>VPD_REC_NUM</id>
<default>4</default>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
<default>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>engine</id><value>3</value></field>
<field><id>byteAddrOffset</id><value>0x02</value></field>
<field><id>devAddr</id><value>0xA0</value></field>
<field><id>chipCount</id><value>0x01</value></field>
<!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model -->
<field><id>port</id><value>0</value></field>
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0B</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9563,6 +9652,24 @@
<id>VPD_REC_NUM</id>
<default>5</default>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
<default>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>engine</id><value>3</value></field>
<field><id>byteAddrOffset</id><value>0x02</value></field>
<field><id>devAddr</id><value>0xA0</value></field>
<field><id>chipCount</id><value>0x01</value></field>
<!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model -->
<field><id>port</id><value>0</value></field>
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0C</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9593,6 +9700,24 @@
<id>VPD_REC_NUM</id>
<default>6</default>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
<default>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>engine</id><value>3</value></field>
<field><id>byteAddrOffset</id><value>0x02</value></field>
<field><id>devAddr</id><value>0xA0</value></field>
<field><id>chipCount</id><value>0x01</value></field>
<!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model -->
<field><id>port</id><value>0</value></field>
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0D</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9623,6 +9748,24 @@
<id>VPD_REC_NUM</id>
<default>7</default>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
<default>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>engine</id><value>3</value></field>
<field><id>byteAddrOffset</id><value>0x02</value></field>
<field><id>devAddr</id><value>0xA0</value></field>
<field><id>chipCount</id><value>0x01</value></field>
<!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model -->
<field><id>port</id><value>0</value></field>
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0E</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9653,6 +9796,24 @@
<id>VPD_REC_NUM</id>
<default>8</default>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
<default>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>engine</id><value>3</value></field>
<field><id>byteAddrOffset</id><value>0x02</value></field>
<field><id>devAddr</id><value>0xA0</value></field>
<field><id>chipCount</id><value>0x01</value></field>
<!-- Engine 3 Port 0 connects to a 3 to 8 MUX attached to DDIMM1-8 in the simics axone model -->
<field><id>port</id><value>0</value></field>
<field><id>maxMemorySizeKB</id><value>0x4</value></field>
<field><id>writeCycleTime</id><value>05</value></field>
<field><id>writePageSize</id><value>0x20</value></field>
<!-- Valid Mux Bus Selections are 0x08-0x0F -->
<field><id>i2cMuxBusSelector</id><value>0x0F</value></field>
<field><id>i2cMuxPath</id><value>physical:sys-0/node-0/i2c_mux-0</value></field>
</default>
</attribute>
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9683,6 +9844,8 @@
<id>VPD_REC_NUM</id>
<default>9</default>
</attribute>
<!-- EEPROM_VPD_PRIMARY_INFO does not get set for dimms 9-15 in the axone simics model because
the simics model does not provide i2c address spaces for these targets-->
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9713,6 +9876,8 @@
<id>VPD_REC_NUM</id>
<default>10</default>
</attribute>
<!-- EEPROM_VPD_PRIMARY_INFO does not get set for dimms 9-15 in the axone simics model because
the simics model does not provide i2c address spaces for these targets-->
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9743,6 +9908,8 @@
<id>VPD_REC_NUM</id>
<default>11</default>
</attribute>
<!-- EEPROM_VPD_PRIMARY_INFO does not get set for dimms 9-15 in the axone simics model because
the simics model does not provide i2c address spaces for these targets-->
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9773,6 +9940,8 @@
<id>VPD_REC_NUM</id>
<default>12</default>
</attribute>
<!-- EEPROM_VPD_PRIMARY_INFO does not get set for dimms 9-15 in the axone simics model because
the simics model does not provide i2c address spaces for these targets-->
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9803,6 +9972,8 @@
<id>VPD_REC_NUM</id>
<default>13</default>
</attribute>
<!-- EEPROM_VPD_PRIMARY_INFO does not get set for dimms 9-15 in the axone simics model because
the simics model does not provide i2c address spaces for these targets-->
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9833,6 +10004,8 @@
<id>VPD_REC_NUM</id>
<default>14</default>
</attribute>
<!-- EEPROM_VPD_PRIMARY_INFO does not get set for dimms 9-15 in the axone simics model because
the simics model does not provide i2c address spaces for these targets-->
</targetInstance>

<targetInstance>
Expand Down Expand Up @@ -9863,6 +10036,8 @@
<id>VPD_REC_NUM</id>
<default>15</default>
</attribute>
<!-- EEPROM_VPD_PRIMARY_INFO does not get set for dimms 9-15 in the axone simics model because
the simics model does not provide i2c address spaces for these targets-->
</targetInstance>

<!-- ===================================================================== -->
Expand Down Expand Up @@ -12749,4 +12924,50 @@
</attribute>
</targetInstance>

<!-- ===================================================================== -->
<!-- I2C_MUX -->
<!-- ===================================================================== -->
<targetInstance>
<id>sys0node0i2cmux0</id>
<type>i2c_mux_pca9847</type>
<attribute>
<id>HUID</id>
<default>0x004D0000</default>
</attribute>
<attribute>
<id>PHYS_PATH</id>
<default>physical:sys-0/node-0/i2c_mux-0</default>
</attribute>
<attribute>
<id>AFFINITY_PATH</id>
<default>affinity:sys-0/node-0/proc-0/i2c_mux-0</default>
</attribute>
<attribute>
<id>PRIMARY_CAPABILITIES</id>
<default>
<field><id>reserved</id><value>0</value></field>
<field><id>supportsFsiScom</id><value>0</value></field>
<field><id>supportsInbandScom</id><value>0</value></field>
<field><id>supportsXscom</id><value>0</value></field>
</default>
</attribute>
<attribute>
<id>ORDINAL_ID</id>
<default>0</default>
</attribute>
<attribute>
<id>FAPI_NAME</id>
<default>NA</default>
</attribute>
<attribute>
<id>I2C_MUX_INFO</id>
<default>
<field><id>i2cMasterPath</id><value>physical:sys-0/node-0/proc-0</value></field>
<field><id>port</id><value>0</value></field>
<field><id>devAddr</id><value>0xE0</value></field>
<field><id>engine</id><value>3</value></field>
</default>
</attribute>
</targetInstance>

</attributes>
12 changes: 9 additions & 3 deletions src/usr/targeting/common/xmltohb/target_types.xml
Original file line number Diff line number Diff line change
Expand Up @@ -366,6 +366,12 @@
<default>1</default>
<id>DECONFIG_GARDABLE</id>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
</attribute>
<attribute>
<id>FAPI_I2C_CONTROL_INFO</id>
</attribute>
<attribute>
<id>FRU_ID</id>
</attribute>
Expand All @@ -386,9 +392,6 @@
<targetType>
<id>chip-ocmb-explorer</id>
<parent>chip-ocmb</parent>
<attribute>
<id>FAPI_I2C_CONTROL_INFO</id>
</attribute>
<attribute>
<default>EXPLORER</default>
<id>MODEL</id>
Expand Down Expand Up @@ -997,6 +1000,9 @@
<attribute>
<id>EEPROM_NV_INFO</id>
</attribute>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
</attribute>
<attribute>
<id>FRU_ID</id>
</attribute>
Expand Down
3 changes: 0 additions & 3 deletions src/usr/targeting/common/xmltohb/target_types_openpower.xml
Original file line number Diff line number Diff line change
Expand Up @@ -116,9 +116,6 @@

<targetTypeExtension>
<id>lcard-dimm</id>
<attribute>
<id>EEPROM_VPD_PRIMARY_INFO</id>
</attribute>
<attribute>
<id>IPMI_SENSORS</id>
</attribute>
Expand Down

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