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Update error handling for IPL procedures
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Change-Id: I4644227da8b9d84af4987e7652d7ef3e98494c3f
RTC: 155734
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/25568
Tested-by: Hostboot CI
Reviewed-by: Louis Stermole <[email protected]>
Tested-by: Jenkins Server
Reviewed-by: ANDRE A. MARIN <[email protected]>
Reviewed-by: Jennifer A. Stofer <[email protected]>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/70341
Tested-by: Jenkins Server <[email protected]>
Reviewed-by: Sachin Gupta <[email protected]>
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@brs332 @sgupta2m
brs332 authored and sgupta2m committed Jan 11, 2019
1 parent cadb2f9 commit fadf57f
Showing 1 changed file with 132 additions and 0 deletions.
132 changes: 132 additions & 0 deletions src/import/chips/p9/procedures/xml/error_info/p9_memory_mss_lib.xml
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Original file line number Diff line number Diff line change
Expand Up @@ -38,12 +38,128 @@

<hwpErrors>

<registerFfdc>
<id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
<scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP0_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP1_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP2_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR0_PRI_RP3_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP0_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP1_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP2_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR0_SEC_RP3_P0</scomRegister>

<scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP0_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP1_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP2_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR1_PRI_RP3_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP0_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP1_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP2_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR1_SEC_RP3_P0</scomRegister>

<scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP0_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP1_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP2_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR2_PRI_RP3_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP0_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP1_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP2_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR2_SEC_RP3_P0</scomRegister>

<scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP0_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP1_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP2_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR3_PRI_RP3_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP0_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP1_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP2_P0</scomRegister>
<scomRegister>MCA_DDRPHY_PC_MR3_SEC_RP3_P0</scomRegister>
</registerFfdc>

<registerFfdc>
<id>REG_FFDC_MSS_CCS_FAILURE</id>
<scomRegister>MCBIST_CCS_MODEQ</scomRegister>
<scomRegister>MCBIST_CCS_STATQ</scomRegister>
<scomRegister>MCBIST_CCS_CNTLQ</scomRegister>
<scomRegister>MCBIST_MCBMCATQ</scomRegister>

<!-- Instructions -->
<scomRegister>MCBIST_CCS_INST_ARR0_00</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_01</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_02</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_03</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_04</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_05</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_06</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_07</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_08</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_09</scomRegister>

<scomRegister>MCBIST_CCS_INST_ARR0_10</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_11</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_12</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_13</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_14</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_15</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_16</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_17</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_18</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_19</scomRegister>

<scomRegister>MCBIST_CCS_INST_ARR0_20</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_21</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_22</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_23</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_24</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_25</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_26</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_27</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_28</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_29</scomRegister>

<scomRegister>MCBIST_CCS_INST_ARR0_30</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR0_31</scomRegister>

<!-- Control array -->
<scomRegister>MCBIST_CCS_INST_ARR1_00</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_01</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_02</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_03</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_04</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_05</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_06</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_07</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_08</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_09</scomRegister>

<scomRegister>MCBIST_CCS_INST_ARR1_10</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_11</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_12</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_13</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_14</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_15</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_16</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_17</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_18</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_19</scomRegister>

<scomRegister>MCBIST_CCS_INST_ARR1_20</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_21</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_22</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_23</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_24</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_25</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_26</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_27</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_28</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_29</scomRegister>

<scomRegister>MCBIST_CCS_INST_ARR1_30</scomRegister>
<scomRegister>MCBIST_CCS_INST_ARR1_31</scomRegister>

<!-- to get the CCS state machine hung state -->
<scomRegister>MCBIST_MCBERRPTQ</scomRegister>
</registerFfdc>

<hwpError>
Expand All @@ -54,6 +170,10 @@
<id>REG_FFDC_MSS_CCS_FAILURE</id>
<target>TARGET_IN_ERROR</target>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
<target>TARGET_IN_ERROR</target>
</collectRegisterFfdc>
<callout>
<target>TARGET_IN_ERROR</target>
<priority>HIGH</priority>
Expand All @@ -71,6 +191,10 @@
<id>REG_FFDC_MSS_CCS_FAILURE</id>
<target>TARGET_IN_ERROR</target>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
<target>TARGET_IN_ERROR</target>
</collectRegisterFfdc>
<callout>
<target>TARGET_IN_ERROR</target>
<priority>HIGH</priority>
Expand All @@ -88,6 +212,10 @@
<id>REG_FFDC_MSS_CCS_FAILURE</id>
<target>TARGET_IN_ERROR</target>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
<target>TARGET_IN_ERROR</target>
</collectRegisterFfdc>
<callout>
<target>TARGET_IN_ERROR</target>
<priority>HIGH</priority>
Expand All @@ -104,6 +232,10 @@
<id>REG_FFDC_MSS_CCS_FAILURE</id>
<target>TARGET_IN_ERROR</target>
</collectRegisterFfdc>
<collectRegisterFfdc>
<id>REG_FFDC_PHY_MR_SHADOW_REGS</id>
<target>TARGET_IN_ERROR</target>
</collectRegisterFfdc>
<callout>
<target>TARGET_IN_ERROR</target>
<priority>HIGH</priority>
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