diff --git a/scripts/riscv_isa_formal/README.md b/scripts/riscv_isa_formal/README.md index 84ab2f05e..4ba93b08e 100755 --- a/scripts/riscv_isa_formal/README.md +++ b/scripts/riscv_isa_formal/README.md @@ -1,6 +1,6 @@ # RISC-V ISA Formal Verification -RISC-V ISA Formal Verification methodology has been used with Siemens EDA Onespin tool and its RISC-V ISA Processor Verification app. +RISC-V ISA Formal Verification methodology has been used with Siemens Questa Processor tool and its RISC-V ISA Processor Verification app. ## Configurations @@ -34,8 +34,8 @@ RISC-V ISA Formal Verification methodology has been used with Siemens EDA Onespi Contains all files to create assertions and to launch different tool apps on different configurations and using different modes. > [!CAUTION] -> core_checker.sv contains proprietary information and is only available to Siemens EDA OneSpin customers. -> Once OneSpin licenses have been purchased, this file can be requested to Siemens support center. +> core_checker.sv contains proprietary information and is only available to Siemens Questa Processor customers. +> Once Questa Processor licenses have been purchased, this file can be requested to Siemens support center. ## How to launch a run diff --git a/scripts/riscv_isa_formal/common/constraints.sv b/scripts/riscv_isa_formal/common/constraints.sv index bbd3d60bf..082432653 100755 --- a/scripts/riscv_isa_formal/common/constraints.sv +++ b/scripts/riscv_isa_formal/common/constraints.sv @@ -1,4 +1,4 @@ -// Copyright 2024 Siemens EDA +// Copyright 2024 Siemens // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 // // Licensed under the Solderpad Hardware License v 2.1 (the "License"); diff --git a/scripts/riscv_isa_formal/common/core_checker.sv b/scripts/riscv_isa_formal/common/core_checker.sv index 74755ca9f..439347bc5 100755 --- a/scripts/riscv_isa_formal/common/core_checker.sv +++ b/scripts/riscv_isa_formal/common/core_checker.sv @@ -1,21 +1,26 @@ +// Copyright 2024 Siemens +// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 +// +// Licensed under the Solderpad Hardware License v 2.1 (the "License"); +// you may not use this file except in compliance with the License, or, +// at your option, the Apache License version 2.0. +// You may obtain a copy of the License at +// +// https://solderpad.org/licenses/SHL-2.1/ +// +// Unless required by applicable law or agreed to in writing, any work +// distributed under the License is distributed on an "AS IS" BASIS, +// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +// See the License for the specific language governing permissions and +// limitations under the License. + /////////////////////////////////////////////////////////////////////////////// // // // RISC-V Checker // // // -// This material contains trade secrets or otherwise confidential // -// information owned by Siemens Industry Software Inc. or its affiliates // -// (collectively, "SISW"), or its licensors. Access to and use of this // -// information is strictly limited as set forth in the Customer's applicable // -// agreements with SISW. // -// // -// This material may not be copied, distributed, or otherwise disclosed // -// outside of the Customer's facilities without the express written // -// permission of SISW, and may not be used in any way not expressly // -// authorized by SISW. // -// // /////////////////////////////////////////////////////////////////////////////// -This file is available only to Siemens EDA OneSpin customers and is available by submitting a request to Siemens support center to get it. +This file is available only to Siemens Questa Processor customers and is available by submitting a request to Siemens support center to get it. diff --git a/scripts/riscv_isa_formal/common/io.sv b/scripts/riscv_isa_formal/common/io.sv index 0b5f23d3d..ae97b2456 100755 --- a/scripts/riscv_isa_formal/common/io.sv +++ b/scripts/riscv_isa_formal/common/io.sv @@ -1,4 +1,4 @@ -// Copyright 2024 Siemens EDA +// Copyright 2024 Siemens // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 // // Licensed under the Solderpad Hardware License v 2.1 (the "License"); diff --git a/scripts/riscv_isa_formal/common/other_bindings.sv b/scripts/riscv_isa_formal/common/other_bindings.sv index 362966093..b026c1484 100755 --- a/scripts/riscv_isa_formal/common/other_bindings.sv +++ b/scripts/riscv_isa_formal/common/other_bindings.sv @@ -1,4 +1,4 @@ -// Copyright 2024 Siemens EDA +// Copyright 2024 Siemens // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 // // Licensed under the Solderpad Hardware License v 2.1 (the "License"); diff --git a/scripts/riscv_isa_formal/common/setup.tcl b/scripts/riscv_isa_formal/common/setup.tcl index 793fc9f30..8f68ea6b3 100755 --- a/scripts/riscv_isa_formal/common/setup.tcl +++ b/scripts/riscv_isa_formal/common/setup.tcl @@ -1,4 +1,4 @@ -# Copyright 2024 Siemens EDA +# Copyright 2024 Siemens # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 # # Licensed under the Solderpad Hardware License v 2.1 (the "License"); diff --git a/scripts/riscv_isa_formal/common/setup_mv.tcl b/scripts/riscv_isa_formal/common/setup_mv.tcl index b87289465..021a6a430 100755 --- a/scripts/riscv_isa_formal/common/setup_mv.tcl +++ b/scripts/riscv_isa_formal/common/setup_mv.tcl @@ -1,4 +1,4 @@ -# Copyright 2024 Siemens EDA +# Copyright 2024 Siemens # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 # # Licensed under the Solderpad Hardware License v 2.1 (the "License"); diff --git a/scripts/riscv_isa_formal/common/t.sh b/scripts/riscv_isa_formal/common/t.sh index dfa71f9c1..fe536fc63 100755 --- a/scripts/riscv_isa_formal/common/t.sh +++ b/scripts/riscv_isa_formal/common/t.sh @@ -1,6 +1,6 @@ #!/bin/bash # -# Copyright 2024 Siemens EDA +# Copyright 2024 Siemens # SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 # # Licensed under the Solderpad Hardware License v 2.1 (the "License"); diff --git a/scripts/riscv_isa_formal/common/vips/obi_dmem.sv b/scripts/riscv_isa_formal/common/vips/obi_dmem.sv index 9efd68737..8f155c2b4 100755 --- a/scripts/riscv_isa_formal/common/vips/obi_dmem.sv +++ b/scripts/riscv_isa_formal/common/vips/obi_dmem.sv @@ -1,4 +1,4 @@ -// Copyright 2024 Siemens EDA +// Copyright 2024 Siemens // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 // // Licensed under the Solderpad Hardware License v 2.1 (the "License"); diff --git a/scripts/riscv_isa_formal/common/vips/obi_imem.sv b/scripts/riscv_isa_formal/common/vips/obi_imem.sv index 74f58a918..38bc2f884 100755 --- a/scripts/riscv_isa_formal/common/vips/obi_imem.sv +++ b/scripts/riscv_isa_formal/common/vips/obi_imem.sv @@ -1,4 +1,4 @@ -// Copyright 2024 Siemens EDA +// Copyright 2024 Siemens // SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 // // Licensed under the Solderpad Hardware License v 2.1 (the "License");