Make stale read and history read compatible with coprocessor cache #22510
Labels
component/coprocessor
sig/execution
SIG execution
sig/transaction
SIG:Transaction
type/enhancement
The issue or PR belongs to an enhancement.
Background
This is a subtask of #21094.
The coprocessor cache caches a response for each request on the TiDB side. If two coprocessor requests are equivalent, the second request may skip being processed on the TiKV side. However, the request is still sent to TiKV, because TiKV needs to judge whether the cached response is still valid.
For stale read and history read, the requested snapshot is older than the current. What concerns us is whether the coprocessor cache is still always valid for these kinds of reading.
Analysis
The coprocessor cache is hit when (see
copIteratorWorker.handleTaskOnce
andcopIteratorWorker.handleCopResponse
):Through the last two conditions, we can infer that as long as the start TS of the transactions of stale read and history read is set correctly, the cached response will be valid.
Conclusion
We don't need to change anything.
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