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Hello, thank you very much for your open-source project, which has provided me with a lot of help. However, when I test the store instruction with different configure, there are some problems.
when I use SEW=e8 , LMUL=m1 and vl=16, and use instruction of vsuxei16.v v12, (s6), v0, v0.t, the problem will hang up. During debug with rvv-1.0 spec, I found that vsuxei16.v with above configure, which instruction will read v12 and v13 and write to the memory address. But the ara only read v12 and wait for v13, so that the hardware hang up.
Thanks for your time. @mp-17@suehtamacv
The text was updated successfully, but these errors were encountered:
Hello, thank you very much for your open-source project, which has provided me with a lot of help. However, when I test the store instruction with different configure, there are some problems.
when I use SEW=e8 , LMUL=m1 and vl=16, and use instruction of vsuxei16.v v12, (s6), v0, v0.t, the problem will hang up. During debug with rvv-1.0 spec, I found that vsuxei16.v with above configure, which instruction will read v12 and v13 and write to the memory address. But the ara only read v12 and wait for v13, so that the hardware hang up.
Thanks for your time.
@mp-17 @suehtamacv
The text was updated successfully, but these errors were encountered: