From f1f4288a05314cce68df9c64fdc3272331296ae6 Mon Sep 17 00:00:00 2001
From: Roland Siegbert <roland.siegbert@phys.ethz.ch>
Date: Thu, 22 Aug 2024 23:53:34 +0200
Subject: [PATCH] wip: A stub to not forget the idea / PLY reading

---
 cirq-core/cirq/contrib/qasm_import/_parser.py | 24 ++++++++++++++++---
 1 file changed, 21 insertions(+), 3 deletions(-)

diff --git a/cirq-core/cirq/contrib/qasm_import/_parser.py b/cirq-core/cirq/contrib/qasm_import/_parser.py
index e7bcdae06db..8e97fb61d89 100644
--- a/cirq-core/cirq/contrib/qasm_import/_parser.py
+++ b/cirq-core/cirq/contrib/qasm_import/_parser.py
@@ -20,7 +20,7 @@
 import sympy
 from ply import yacc
 
-from cirq import ops, Circuit, NamedQubit, CX
+from cirq import ops, Circuit, NamedQubit, CX, R
 from cirq.circuits.qasm_output import QasmUGate
 from cirq.contrib.qasm_import._lexer import QasmLexer
 from cirq.contrib.qasm_import.exception import QasmException
@@ -303,8 +303,12 @@ def p_circuit_reg(self, p):
     def p_circuit_gate_or_measurement_or_if(self, p):
         """circuit :  circuit gate_op
         |  circuit measurement
-        |  circuit if"""
-        self.circuit.append(p[2])
+        |  circuit if
+        |  circuit new_reg"""
+        if isinstance(p[2], list):
+            self.circuit.append(p[2])
+        else:
+            self.circuit.append([p[2]])
         p[0] = self.circuit
 
     def p_circuit_empty(self, p):
@@ -325,8 +329,22 @@ def p_new_reg(self, p):
             self.qregs[name] = length
         else:
             self.cregs[name] = length
+        print("Calling qrags to create a qubit")
         p[0] = (name, length)
 
+    # reset
+
+    # TODO: Model this kind of after measurement
+    def p_reset(self, p):
+        """new_reg : RESET ID '[' NATURAL_NUMBER ']' ';'"""
+        name, idx = p[2], p[4]
+        if name not in self.qregs.keys():
+            raise QasmException(f"{name} is undefined at line {p.lineno(2)}")
+        if idx < 0 or idx >= self.qregs[name]:
+            raise QasmException(f"Illegal qubit index {idx} for register {name} at line {p.lineno(4)}")
+        p[0] = (name, idx)
+
+
     # gate operations
     # gate_op : ID qargs
     #         | ID ( params ) qargs