From 7f54cf26511b2716d35e2f2198bbff9da5a33123 Mon Sep 17 00:00:00 2001 From: Ximin Luo Date: Fri, 31 Jul 2020 12:58:37 +0100 Subject: [PATCH] compiletest: ignore-endian-big, fixes #74829, fixes #74885 --- .../mir-opt/const-promotion-extern-static.rs | 2 +- src/test/mir-opt/const_allocation.rs | 2 +- src/test/mir-opt/const_allocation2.rs | 2 +- src/test/mir-opt/const_allocation3.rs | 2 +- .../mir-opt/inline/inline-into-box-place.rs | 2 +- .../ui/simd/simd-intrinsic-generic-bitmask.rs | 1 + .../ui/simd/simd-intrinsic-generic-select.rs | 5 +---- src/tools/compiletest/src/header.rs | 1 + src/tools/compiletest/src/util.rs | 20 +++++++++++++++++++ 9 files changed, 28 insertions(+), 9 deletions(-) diff --git a/src/test/mir-opt/const-promotion-extern-static.rs b/src/test/mir-opt/const-promotion-extern-static.rs index e63309a9bd2ad..9c30e0400312a 100644 --- a/src/test/mir-opt/const-promotion-extern-static.rs +++ b/src/test/mir-opt/const-promotion-extern-static.rs @@ -1,7 +1,7 @@ +// ignore-endian-big extern "C" { static X: i32; } - static Y: i32 = 42; // EMIT_MIR const_promotion_extern_static.BAR.PromoteTemps.diff diff --git a/src/test/mir-opt/const_allocation.rs b/src/test/mir-opt/const_allocation.rs index bb1c48e8e3c81..b0fcb86fcee0f 100644 --- a/src/test/mir-opt/const_allocation.rs +++ b/src/test/mir-opt/const_allocation.rs @@ -1,5 +1,5 @@ +// ignore-endian-big // EMIT_MIR_FOR_EACH_BIT_WIDTH - static FOO: &[(Option, &[&str])] = &[(None, &[]), (None, &["foo", "bar"]), (Some(42), &["meh", "mop", "möp"])]; diff --git a/src/test/mir-opt/const_allocation2.rs b/src/test/mir-opt/const_allocation2.rs index 56839255c0e91..30afedffb39b3 100644 --- a/src/test/mir-opt/const_allocation2.rs +++ b/src/test/mir-opt/const_allocation2.rs @@ -1,5 +1,5 @@ +// ignore-endian-big // EMIT_MIR_FOR_EACH_BIT_WIDTH - // EMIT_MIR const_allocation2.main.ConstProp.after.mir fn main() { FOO; diff --git a/src/test/mir-opt/const_allocation3.rs b/src/test/mir-opt/const_allocation3.rs index 2ce289aea3fc9..ddeb32ab9a583 100644 --- a/src/test/mir-opt/const_allocation3.rs +++ b/src/test/mir-opt/const_allocation3.rs @@ -1,5 +1,5 @@ +// ignore-endian-big // EMIT_MIR_FOR_EACH_BIT_WIDTH - // EMIT_MIR const_allocation3.main.ConstProp.after.mir fn main() { FOO; diff --git a/src/test/mir-opt/inline/inline-into-box-place.rs b/src/test/mir-opt/inline/inline-into-box-place.rs index 30c9a5d6b8ff7..57298605b1873 100644 --- a/src/test/mir-opt/inline/inline-into-box-place.rs +++ b/src/test/mir-opt/inline/inline-into-box-place.rs @@ -1,8 +1,8 @@ +// ignore-endian-big // ignore-wasm32-bare compiled with panic=abort by default // compile-flags: -Z mir-opt-level=3 // EMIT_MIR_FOR_EACH_BIT_WIDTH #![feature(box_syntax)] - // EMIT_MIR inline_into_box_place.main.Inline.diff fn main() { let _x: Box> = box Vec::new(); diff --git a/src/test/ui/simd/simd-intrinsic-generic-bitmask.rs b/src/test/ui/simd/simd-intrinsic-generic-bitmask.rs index a323bd9e82b4a..8c436841b44e8 100644 --- a/src/test/ui/simd/simd-intrinsic-generic-bitmask.rs +++ b/src/test/ui/simd/simd-intrinsic-generic-bitmask.rs @@ -2,6 +2,7 @@ #![allow(non_camel_case_types)] // ignore-emscripten +// ignore-endian-big behavior of simd_bitmask is endian-specific // Test that the simd_bitmask intrinsic produces correct results. diff --git a/src/test/ui/simd/simd-intrinsic-generic-select.rs b/src/test/ui/simd/simd-intrinsic-generic-select.rs index 22bda4fc9d919..dc9ec5d2760fe 100644 --- a/src/test/ui/simd/simd-intrinsic-generic-select.rs +++ b/src/test/ui/simd/simd-intrinsic-generic-select.rs @@ -2,10 +2,7 @@ #![allow(non_camel_case_types)] // ignore-emscripten -// ignore-mips behavior of simd_select_bitmask is endian-specific -// ignore-mips64 behavior of simd_select_bitmask is endian-specific -// ignore-powerpc behavior of simd_select_bitmask is endian-specific -// ignore-powerpc64 behavior of simd_select_bitmask is endian-specific +// ignore-endian-big behavior of simd_select_bitmask is endian-specific // Test that the simd_select intrinsics produces correct results. diff --git a/src/tools/compiletest/src/header.rs b/src/tools/compiletest/src/header.rs index 2ab764eb9207c..99ab31ca067c3 100644 --- a/src/tools/compiletest/src/header.rs +++ b/src/tools/compiletest/src/header.rs @@ -815,6 +815,7 @@ impl Config { name == util::get_pointer_width(&self.target) || // pointer width name == self.stage_id.split('-').next().unwrap() || // stage (self.target != self.host && name == "cross-compile") || + (name == "endian-big" && util::is_big_endian(&self.target)) || (self.remote_test_client.is_some() && name == "remote") || match self.compare_mode { Some(CompareMode::Nll) => name == "compare-mode-nll", diff --git a/src/tools/compiletest/src/util.rs b/src/tools/compiletest/src/util.rs index 0437ff8c9440a..ddd7941b11469 100644 --- a/src/tools/compiletest/src/util.rs +++ b/src/tools/compiletest/src/util.rs @@ -99,6 +99,20 @@ pub const MSAN_SUPPORTED_TARGETS: &'static [&'static str] = pub const TSAN_SUPPORTED_TARGETS: &'static [&'static str] = &["aarch64-unknown-linux-gnu", "x86_64-apple-darwin", "x86_64-unknown-linux-gnu"]; +const BIG_ENDIAN: &'static [&'static str] = &[ + "armebv7r", + "mips", + "mips64", + "mipsisa32r6", + "mipsisa64r6", + "powerpc", + "powerpc64", + "s390x", + "sparc", + "sparc64", + "sparcv9", +]; + pub fn matches_os(triple: &str, name: &str) -> bool { // For the wasm32 bare target we ignore anything also ignored on emscripten // and then we also recognize `wasm32-bare` as the os for the target @@ -125,6 +139,12 @@ pub fn get_arch(triple: &str) -> &'static str { panic!("Cannot determine Architecture from triple"); } +/// Determine the endianness from `triple` +pub fn is_big_endian(triple: &str) -> bool { + let triple_arch = triple.split('-').next().unwrap(); + BIG_ENDIAN.contains(&triple_arch) +} + pub fn matches_env(triple: &str, name: &str) -> bool { if let Some(env) = triple.split('-').nth(3) { env.starts_with(name) } else { false } }