From 51d272c74f714d2171123da36944916f15483219 Mon Sep 17 00:00:00 2001 From: Simon Hosie Date: Thu, 11 Jan 2024 18:30:06 -0800 Subject: [PATCH] Add RVV inline header support. --- .github/workflows/build_and_test.yml | 2 -- src/arch/helperrvv.h | 30 ++++++++++++++++++++++++++++ src/common/keywords.txt | 2 ++ src/libm-tester/iutsimd.c | 20 +++++++++++++++---- src/libm/sleefsimddp.c | 16 --------------- src/libm/sleefsimdsp.c | 8 ++++---- src/quad-tester/qiutsimd.c | 4 ++++ 7 files changed, 56 insertions(+), 26 deletions(-) diff --git a/.github/workflows/build_and_test.yml b/.github/workflows/build_and_test.yml index 10f08087..2141f9fb 100644 --- a/.github/workflows/build_and_test.yml +++ b/.github/workflows/build_and_test.yml @@ -225,8 +225,6 @@ jobs: EXTRA_CMAKE_FLAGS="${EXTRA_CMAKE_FLAGS} -DSLEEF_DISABLE_VXE2=ON" elif [[ ${{ matrix.arch }} = "riscv64" ]]; then EXTRA_CMAKE_FLAGS="${EXTRA_CMAKE_FLAGS} -DSLEEF_ENFORCE_RVVM1=ON -DSLEEF_ENFORCE_RVVM2=ON" - # Disable inline headers, they just don't compile on riscv64 - EXTRA_CMAKE_FLAGS="${EXTRA_CMAKE_FLAGS} -DSLEEF_BUILD_INLINE_HEADERS=OFF" fi cmake -S . -B _build-${{ matrix.arch }} -GNinja \ diff --git a/src/arch/helperrvv.h b/src/arch/helperrvv.h index 6dccf485..5b28486b 100644 --- a/src/arch/helperrvv.h +++ b/src/arch/helperrvv.h @@ -55,14 +55,18 @@ #define LOG2VECTLENSP (LOG2VECTLENDP+1) #define ENABLE_SP +//@#define ENABLE_SP #define ENABLE_DP +//@#define ENABLE_DP #if CONFIG != 2 #if defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2NOFMA) #error "RVV NOFMA only supported for CONFIG=2" #else #define ENABLE_FMA_SP +//@#define ENABLE_FMA_SP #define ENABLE_FMA_DP +//@#define ENABLE_FMA_DP #endif #endif @@ -147,9 +151,13 @@ typedef vfloat64m1x4_t tdi_t; #if SLEEF_RVV_VLEN == 0 #define VECTLENSP (__riscv_vsetvlmax_e32m1()) #define VECTLENDP SLEEF_RVV_DP_RUNTIME_VL() +//@#define VECTLENSP __riscv_vsetvlmax_e32m1() +//@#define VECTLENDP __riscv_vsetvlmax_e64m1() #else #define VECTLENSP (SLEEF_RVV_SP_LMUL * SLEEF_RVV_VLEN / sizeof(float)) #define VECTLENDP (SLEEF_RVV_DP_LMUL * SLEEF_RVV_VLEN / sizeof(double)) +//@#define VECTLENSP (SLEEF_RVV_SP_LMUL * SLEEF_RVV_VLEN / sizeof(float)) +//@#define VECTLENDP (SLEEF_RVV_DP_LMUL * SLEEF_RVV_VLEN / sizeof(double)) #endif #define SLEEF_RVV_SP_VCAST_VF_F __riscv_vfmv_v_f_f32m1 #define SLEEF_RVV_SP_VCAST_VI2_I __riscv_vmv_v_x_i32m1 @@ -248,9 +256,13 @@ typedef vfloat64m2x4_t tdi_t; #if SLEEF_RVV_VLEN == 0 #define VECTLENSP (__riscv_vsetvlmax_e32m2()) #define VECTLENDP SLEEF_RVV_DP_RUNTIME_VL() +//@#define VECTLENSP __riscv_vsetvlmax_e32m2() +//@#define VECTLENDP __riscv_vsetvlmax_e64m2() #else #define VECTLENSP (SLEEF_RVV_SP_LMUL * SLEEF_RVV_VLEN / sizeof(float)) #define VECTLENDP (SLEEF_RVV_DP_LMUL * SLEEF_RVV_VLEN / sizeof(double)) +//@#define VECTLENSP (SLEEF_RVV_SP_LMUL * SLEEF_RVV_VLEN / sizeof(float)) +//@#define VECTLENDP (SLEEF_RVV_DP_LMUL * SLEEF_RVV_VLEN / sizeof(double)) #endif #define SLEEF_RVV_SP_VCAST_VF_F __riscv_vfmv_v_f_f32m2 #define SLEEF_RVV_SP_VCAST_VI2_I __riscv_vmv_v_x_i32m2 @@ -1319,6 +1331,15 @@ static INLINE void vprefetch_v_p(const void *ptr) {} #define vxor_vo_vo_vo rvv_sp_vxor_vo_vo_vo #endif // ENABLE_RVV_SP +//@#ifdef ENABLE_RVV_SP +//@#define vopmask rvv_sp_vopmask +// +//@#define vand_vo_vo_vo rvv_sp_vand_vo_vo_vo +//@#define vandnot_vo_vo_vo rvv_sp_vandnot_vo_vo_vo +//@#define vor_vo_vo_vo rvv_sp_vor_vo_vo_vo +//@#define vxor_vo_vo_vo rvv_sp_vxor_vo_vo_vo +//@#endif // ENABLE_RVV_SP + // Types and functions that conflict with ENABLE_RVV_SP #ifdef ENABLE_RVV_DP #define vopmask rvv_dp_vopmask @@ -1329,4 +1350,13 @@ static INLINE void vprefetch_v_p(const void *ptr) {} #define vxor_vo_vo_vo rvv_dp_vxor_vo_vo_vo #endif // ENABLE_RVV_DP +//@#ifdef ENABLE_RVV_DP +//@#define vopmask rvv_dp_vopmask +// +//@#define vand_vo_vo_vo rvv_dp_vand_vo_vo_vo +//@#define vandnot_vo_vo_vo rvv_dp_vandnot_vo_vo_vo +//@#define vor_vo_vo_vo rvv_dp_vor_vo_vo_vo +//@#define vxor_vo_vo_vo rvv_dp_vxor_vo_vo_vo +//@#endif // ENABLE_RVV_DP + #endif // HELPERRVV_H diff --git a/src/common/keywords.txt b/src/common/keywords.txt index e22867dc..659fa5e1 100644 --- a/src/common/keywords.txt +++ b/src/common/keywords.txt @@ -679,3 +679,5 @@ Sleef_rempitabdp Sleef_rempitabqp vcastu_vm_vi vcastu_vi_vm +rvv_sp_vopmask +rvv_dp_vopmask diff --git a/src/libm-tester/iutsimd.c b/src/libm-tester/iutsimd.c index 68bbb908..a5cd6258 100644 --- a/src/libm-tester/iutsimd.c +++ b/src/libm-tester/iutsimd.c @@ -57,6 +57,10 @@ #include #endif +#if defined(__riscv) && defined(__riscv_v) +#include +#endif + #if defined(__VSX__) #include #endif @@ -344,27 +348,35 @@ typedef Sleef_SLEEF_VECTOR_FLOAT_2 vfloat2; #endif #ifdef ENABLE_RVVM1 +#include "renamervvm1.h" +#if !defined(USE_INLINE_HEADER) #define CONFIG 1 #include "helperrvv.h" -#include "renamervvm1.h" +#endif #endif #ifdef ENABLE_RVVM1NOFMA +#include "renamervvm1nofma.h" +#if !defined(USE_INLINE_HEADER) #define CONFIG 2 #include "helperrvv.h" -#include "renamervvm1nofma.h" +#endif #endif #ifdef ENABLE_RVVM2 +#include "renamervvm2.h" +#if !defined(USE_INLINE_HEADER) #define CONFIG 1 #include "helperrvv.h" -#include "renamervvm2.h" +#endif #endif #ifdef ENABLE_RVVM2NOFMA +#include "renamervvm2nofma.h" +#if !defined(USE_INLINE_HEADER) #define CONFIG 2 #include "helperrvv.h" -#include "renamervvm2nofma.h" +#endif #endif #ifdef ENABLE_PUREC_SCALAR diff --git a/src/libm/sleefsimddp.c b/src/libm/sleefsimddp.c index 9b837fe4..2db99b06 100644 --- a/src/libm/sleefsimddp.c +++ b/src/libm/sleefsimddp.c @@ -224,12 +224,8 @@ extern const double Sleef_rempitabdp[]; // RISC-V #ifdef ENABLE_RVVM1 #define CONFIG 1 -#if !defined(SLEEF_GENHEADER) #define ENABLE_RVV_DP #include "helperrvv.h" -#else -#include "macroonlyRVVM1.h" -#endif #ifdef DORENAME #include "renamervvm1.h" #endif @@ -237,12 +233,8 @@ extern const double Sleef_rempitabdp[]; #ifdef ENABLE_RVVM1NOFMA #define CONFIG 2 -#if !defined(SLEEF_GENHEADER) #define ENABLE_RVV_DP #include "helperrvv.h" -#else -#include "macroonlyRVVM1NOFMA.h" -#endif #ifdef DORENAME #include "renamervvm1nofma.h" #endif @@ -250,12 +242,8 @@ extern const double Sleef_rempitabdp[]; #ifdef ENABLE_RVVM2 #define CONFIG 1 -#if !defined(SLEEF_GENHEADER) #define ENABLE_RVV_DP #include "helperrvv.h" -#else -#include "macroonlyRVVM2.h" -#endif #ifdef DORENAME #include "renamervvm2.h" #endif @@ -263,12 +251,8 @@ extern const double Sleef_rempitabdp[]; #ifdef ENABLE_RVVM2NOFMA #define CONFIG 2 -#if !defined(SLEEF_GENHEADER) #define ENABLE_RVV_DP #include "helperrvv.h" -#else -#include "macroonlyRVVM2NOFMA.h" -#endif #ifdef DORENAME #include "renamervvm2nofma.h" #endif diff --git a/src/libm/sleefsimdsp.c b/src/libm/sleefsimdsp.c index d9e9100c..b8d42722 100644 --- a/src/libm/sleefsimdsp.c +++ b/src/libm/sleefsimdsp.c @@ -324,8 +324,8 @@ extern const float Sleef_rempitabsp[]; // RISC-V #ifdef ENABLE_RVVM1 #define CONFIG 1 -#if !defined(SLEEF_GENHEADER) #define ENABLE_RVV_SP +#if !defined(SLEEF_GENHEADER) #include "helperrvv.h" #else #include "macroonlyRVVM1.h" @@ -337,8 +337,8 @@ extern const float Sleef_rempitabsp[]; #ifdef ENABLE_RVVM1NOFMA #define CONFIG 2 -#if !defined(SLEEF_GENHEADER) #define ENABLE_RVV_SP +#if !defined(SLEEF_GENHEADER) #include "helperrvv.h" #else #include "macroonlyRVVM1NOFMA.h" @@ -350,8 +350,8 @@ extern const float Sleef_rempitabsp[]; #ifdef ENABLE_RVVM2 #define CONFIG 1 -#if !defined(SLEEF_GENHEADER) #define ENABLE_RVV_SP +#if !defined(SLEEF_GENHEADER) #include "helperrvv.h" #else #include "macroonlyRVVM2.h" @@ -363,8 +363,8 @@ extern const float Sleef_rempitabsp[]; #ifdef ENABLE_RVVM2NOFMA #define CONFIG 2 -#if !defined(SLEEF_GENHEADER) #define ENABLE_RVV_SP +#if !defined(SLEEF_GENHEADER) #include "helperrvv.h" #else #include "macroonlyRVVM2NOFMA.h" diff --git a/src/quad-tester/qiutsimd.c b/src/quad-tester/qiutsimd.c index 74f61e1b..48a04817 100644 --- a/src/quad-tester/qiutsimd.c +++ b/src/quad-tester/qiutsimd.c @@ -60,6 +60,10 @@ #include #endif +#if defined(__riscv) && defined(__riscv_v) +#include +#endif + #if defined(__VSX__) #include #endif