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Robert Jördens edited this page Aug 28, 2020 · 13 revisions

Phaser

Quad channel 1GS/s RF generator card with dual IQ upconverter and dual 5MS/s ADC and FPGA in EEM form factor

Design files (schematics, PCB layouts, BOMs) can be found at Phaser/releases.

Overview

  • 4 channels of 1GSPs 16-bit parallel DAC
  • dual IQ mixer + 4GHz VCO + PLL
  • 31.5 dB range digital step attenuator (like Urukul)
  • 2 channels of 5MSPS ADC, using a 2-channel version of Sampler/BaseMod
  • Artix FPGA, probably same as Kasli
  • Clocking same as Urukul
  • 2 EEM connectors

Gateware

  • 5 tone 25 MS/s IQ DDS per channel in coredevice gateware
  • 20x interpolation from 25 MS/s 2 channel IQ sample stream over 1.5 Gb/s EEM link
  • digital upconversion in gateware on Phaser
  • deterministic latency
  • interfaces to all spi buses and peripherals

https://github.com/quartiq/phaser

Photo

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