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Sinara is an open-source hardware ecosystem originally designed for use in quantum physics experiments running the ARTIQ control software. It is licensed under CERN OHL v1.2.
Control electronics used in many trapped-ion and other quantum physics experiments suffers from a number of problems. In general, an ad-hoc solution is hastily put together in-house without enough consideration about good design, reproducibility, testing and documentation. This makes those systems unreliable, fragile, and difficult to use and maintain. It also duplicates work in different laboratories. In addition, the performance and features of the existing systems (e.g. regarding pulse shaping abilities) is becoming insufficient for some experiments.
To alleviate those problems, Sinara aims to be:
- high-quality
- simple to use and "turn-key"
- reproducible and open
- flexible and modular
- well tested
- well supported by the ARTIQ control software
To see how Sinara can be used in your labs, take a look at our case studies showing Sinara in Action.
Sinara is currently developed by a collaboration including M-Labs, QUARTIQ, Warsaw University of Technology (WUT), US Army Research Laboratory (ARL), the University of Oxford, the University of Maryland and NIST. The majority of the hardware was designed by WUT. The work was funded by ARL, Duke University, the University of Oxford, and the University of Freiburg.
Currently, much of this hardware is at the prototyping stage. Information about the status of the various hardware projects making up Sinara can be found here. Advice about purchasing Sinara hardware can be found here.
Following the ARTIQ model, an experiment consists of a core device (master) -- typically either a Metlino or Kasli -- controlling multiple slave devices in real time using ARTIQ's distributed real-time IO (DRTIO) protocol. DRTIO provides both gigabit communication links and time distribution over copper cable or optical fibres. It synchronises all device clocks, ensuring they have deterministic phase relationships, and enables nanosecond timing resolution for input and output events across all devices in the experiment. More detailed information about communication between devices and time distribution inside Sinara can be found here.
Sinara uses two main form factors for hardware requiring real-time control: microTCA (uTCA) and Eurocard Extension Modules (EEM). Non real-time hardware is typically connected to the host PC using ethernet.
MicroTCA (uTCA) is Sinara's preferred form factor for high performance hardware with high-speed data converters requiring deterministic phase control, such as the Sayma Smart Arbitrary Waveform Generator (SAWG). Information about uTCA hardware, including a list of parts needed to build a Sinara uTCA crate can be found here.
EEMs provide a lower cost, simpler platform than uTCA for hardware that requires real-time control, but not bandwidth or complexity of uTCA hardware.
Extension modules connect to a carrier, such as Kasli or the VHDCI carrier, which provides power and DRTIO. They are designed to be mounted either in stand-alone enclosures, or in a rack with a carrier, and connect to the carrier via ribbon cable. More details about the extension module standard can be found here.
uTCA hardware interfaces with the extension modules either directly, using a VHDCI carrier, or indirectly, using a Kasli DRTIO slave.
To do: add diagrams showing example hardware configurations to give prospective users an idea of how it all works. e.g:
- Simple Kasli rack
- Simple uTCA rack
- More complex system with uTCA + Kasli.
An overview of uTCA in Sinara can be found here, for more detailed information on specific topics, see the links below. The uTCA hardware is still in beta and not yet fullly supported by ARTIQ. See this page for status.
- uTCA Chassis
- Metlino: uTCA MCH (rack master device)
- Sayma: 8 channel 2.4GSPS Smart Arbitrary Waveform Generator
- Sayma analogue front-end mezzanines
- uTCA misc: mainly adapters and test harnesses
- Information about the Eurocard Extension Module (EEM) standard can be found here.
- Not all PCBs in this section are fully debugged and supported by ARTIQ. See this page for status.
- Code for provisioning of Kasli hardware is here.
- Code for testing of Kasli-based crates is here.
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Code for provisioning of EEM hardware is here.
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DIO_BNC: Digital IO on BNCs
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DIO_SMA: Digital IO on SMAs
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DIO_RJ45: LVDS IO on RJ45s
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Zotino: 32-channel DAC
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Sampler: 8-channel ADC
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Grabber: Camera Framegrabber
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Mirny: Quad Microwave Synthesiser
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Urukul: Quad DDS
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Clocker: Clock Buffer
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Thermostat: Temp Controller
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Humpback: SBC baseboard with FPGA
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Stabilizer: Dual channel fast servo
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Banker: FPGA-based 128x GPIO wihh adapters
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Fastino: Fast 32-channel DAC
Other supporting hardware, not requiring real-time control from the ARTIQ master:
- Booster: RF Power Amplifier
A list of hardware projects that haven't yet become professionally-designed parts of Sinara can be found here. These projects range from ideas waiting for further specification/funding to well-advanced physicist-designed projects that haven't been professionally developed/tested yet.
Development discussions take place on two forums: the GitHub issue trackers for well-defined actionable items; and the web forum for more vague questions, general brainstorming, new hardware proposals, discussions about funding, and so forth.
Two main CAD tools are used for PCB design within Sinara: Mentor Graphics Xpedition Enterprise and Altium Designer. Xpedition is preferred for more complex designs, such as the uTCA hardware. Altium is used for simpler designs, in particular those intended to be modifiable by the users (physicists).
To allow easy sharing of dependencies between projects developed with the same CAD tools, projects are organised first by the CAD tool used, and then by the project hierarchy. Projects developed in Xpedition are stored in the ARTIQ_EE directory, while Altium projects are stored in the ARTIQ_ALTIUM directory.
