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on a setup with L2 configuration and Microsoft hwsku (BSL setup) FDB test are failing.
test_fdb.py failed because after configuring "sonic-clear fdb all" the fdb table should get clean but not all the entries get removed,
For a BSL DUT, all the ports are added into the same VLAN as L2 ports, but on a T0 topology, the ports ‘connected’ to VMs are all L3 LAG interfaces, MAC learning is disabled.
So the packets sent from the Arista VMs will continually trigger mac learning on a BSL DUT, but not for a normal T0 DUT.
This is the reason why you see FDB test behaved differently on BSL and normal T0 testbed.
So my conclusion is that, the “MAC address cannot be cleared issue” is an issue of test case or test flow. The test case was designed for T0 topology, to run it on a different BSL configuration, some change has to be made.
I can suggest two possible ways to make it compatible with BSL:
Change the VM configuration before the test and restore it afterward.
for the 4 relevant Arista VMs, I disabled the LLDP, BGP and port-channel on them, like below:
ARISTA03T1#config t
ARISTA03T1(config)#no router bgp
ARISTA03T1(config)#no lldp run
ARISTA03T1(config)#interface port-Channel 1
ARISTA03T1(config-if-Po1)#shutdown
ARISTA03T1(config-if-Po1)#exit
ARISTA03T1(config)#exit
And then run the FDB test, the test was passing.
Change the test case to have more accurate mac address verification, only focus on the mac addresses generated by the test case itself, ignore the mac address triggered by other none relevant packets.
Suggestion 1 seems reasonable. In general concept, we don't need Arsita VM as BGP neighbors in BSL test cases. So I think we need another topo instead of using topo_t0.
Description
on a setup with L2 configuration and Microsoft hwsku (BSL setup) FDB test are failing.
test_fdb.py failed because after configuring "sonic-clear fdb all" the fdb table should get clean but not all the entries get removed,
For a BSL DUT, all the ports are added into the same VLAN as L2 ports, but on a T0 topology, the ports ‘connected’ to VMs are all L3 LAG interfaces, MAC learning is disabled.
So the packets sent from the Arista VMs will continually trigger mac learning on a BSL DUT, but not for a normal T0 DUT.
This is the reason why you see FDB test behaved differently on BSL and normal T0 testbed.
So my conclusion is that, the “MAC address cannot be cleared issue” is an issue of test case or test flow. The test case was designed for T0 topology, to run it on a different BSL configuration, some change has to be made.
I can suggest two possible ways to make it compatible with BSL:
for the 4 relevant Arista VMs, I disabled the LLDP, BGP and port-channel on them, like below:
And then run the FDB test, the test was passing.
Steps to reproduce the issue:
Describe the results you received:
Actual output: "show mac" output on DUT after running "sonic-clear fdb all":
[u' No. Vlan MacAddress Port Type',
u'----- ------ ----------------- ---------- -------',
u' 1 1000 52:54:00:5D:F3:56 Ethernet32 Dynamic',
u' 2 1000 52:54:00:73:1A:54 Ethernet8 Dynamic',
u' 3 1000 52:54:00:AF:D4:66 Ethernet36 Dynamic',
u' 4 1000 52:54:00:D2:4D:FD Ethernet10 Dynamic',
u' 5 1000 52:54:00:31:68:E3 Ethernet4 Dynamic',
u' 6 1000 52:54:00:1E:A7:F8 Ethernet24 Dynamic',
u' 7 1000 52:54:00:F9:8A:7F Ethernet16 Dynamic',
u' 8 1000 52:54:00:9D:26:DE Ethernet6 Dynamic',
u' 9 1000 52:54:00:E6:79:96 Ethernet20 Dynamic',
u' 10 1000 52:54:00:0E:FB:60 Ethernet22 Dynamic',
u' 11 1000 52:54:00:3F:6D:48 Ethernet28 Dynamic',
u'Total number of entries 11']
Describe the results you expected:
Expected output: "show mac" output on DUT after running "sonic-clear fdb all" :
[u'No. Vlan MacAddress Port Type',
u'----- ------ ------------ ------ ------',
u'Total number of entries 0']
Additional information you deem important:
SONiC-OS-202012.131-01efb5454_Internal
sonic_dump_arc-switch1025_20210721_124251.tar.gz
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