SampleISelDAGtoDAG.cpp

//===-- SampleISelDAGToDAG.cpp - A Dag to Dag Inst Selector for Sample --------===//
//
//                     The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines an instruction selector for the Sample target.
//
//===----------------------------------------------------------------------===//

#define DEBUG_TYPE "sample-isel"
#include "Sample.h"
#include "SampleRegisterInfo.h"
#include "SampleSubtarget.h"
#include "SampleTargetMachine.h"
#include "MCTargetDesc/SampleMCTargetDesc.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/IR/Instructions.h"
#include "llvm/IR/Intrinsics.h"
#include "llvm/IR/CFG.h"
#include "llvm/IR/Type.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAGISel.h"
#include "llvm/CodeGen/SelectionDAGNodes.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"

using namespace llvm;

//===----------------------------------------------------------------------===//
// Instruction Selector Implementation
//===----------------------------------------------------------------------===//

//===----------------------------------------------------------------------===//
// SampleDAGToDAGISel - Sample specific code to select Sample machine
// instructions for SelectionDAG operations.
//===----------------------------------------------------------------------===//
namespace {

class SampleDAGToDAGISel : public SelectionDAGISel {

  /// Subtarget - Keep a pointer to the SampleSubtarget around so that we can
  /// make the right decision when generating code for different targets.
  const SampleSubtarget *Subtarget;

public:
  explicit SampleDAGToDAGISel(SampleTargetMachine &tm) :
      SelectionDAGISel(tm), Subtarget(nullptr) {}

  // Pass Name
  StringRef getPassName() const override {
    return "Sample DAG->DAG Pattern Instruction Selection";
  }

private:
  // Include the pieces autogenerated from the target description.
  #include "SampleGenDAGISel.inc"

  void Select(SDNode *N) override;

  // Complex Pattern.
  bool SelectAddr(SDValue N, SDValue &Base, SDValue &Offset);
};
}

/// ComplexPattern used on SampleInstrInfo
/// Used on Sample Load/Store instructions
bool SampleDAGToDAGISel::
SelectAddr(SDValue N, SDValue &Base, SDValue &Offset) {
  SDLoc DL(N);
  EVT ValTy = N.getValueType();

  if (FrameIndexSDNode *FIN = dyn_cast<FrameIndexSDNode>(N)) {
    Base   = CurDAG->getTargetFrameIndex(FIN->getIndex(), ValTy);
    Offset = CurDAG->getTargetConstant(0, DL, ValTy);
    return true;
  }

  llvm_unreachable("Unknown pattern");
  return true;
}

/// Select instructions not customized! Used for
/// expanded, promoted and normal instructions
void SampleDAGToDAGISel::
Select(SDNode *Node) {
  // Select the default instruction
  SelectCode(Node);

  LLVM_DEBUG(errs() << "=> ");
  LLVM_DEBUG(Node->dumpr(CurDAG));
  LLVM_DEBUG(errs() << "\n");
}

/// createSampleISelDag - This pass converts a legalized DAG into a
/// Sample-specific DAG, ready for instruction scheduling.
FunctionPass *llvm::createSampleISelDag(SampleTargetMachine &TM) {
  return new SampleDAGToDAGISel(TM);
}