Merge pull request #258 from Sujana-M/release_3.2

ACSv3.2 Updates

README.md

@@ -17,7 +17,7 @@ A few tests are executed by running the SBSA ACS Linux application which in turn
 
 
 ## Release details
- - Code Quality: REL v3.1
+ - Code Quality: REL v3.2
  - The tests are written for version 6.0 of the SBSA specification.
  - PCIe RCiEP tests for Appendix E of SBSA 6.0 specification are also included.
  - The compliance suite is not a substitute for design verification.
@@ -146,7 +146,7 @@ On an emulation environment with secondary storage, perform the following steps:
 
 ### Emulation environment without secondary storage
 
-On an Emulation platform where secondary storage is not available, perform the following steps:
+On an emulation platform where secondary storage is not available, perform the following steps:
 
 1. Add the path to 'Sbsa.efi' file in the UEFI FD file.
 2. Build UEFI image including the UEFI Shell.
@@ -178,8 +178,8 @@ The details of the hardware or Verification IP which enable these exerciser test
 
    Below exerciser capabilities are required by exerciser test.
    - MSI-X interrupt generation.
-   - Incoming Transaction Monitoring(order, type).
-   - Initiating transacions from and to the exerciser.
+   - Incoming Transaction Monitoring (order, type).
+   - Initiating transactions from and to the exerciser.
    - Ability to check on BDF and register address seen for each configuration address along with access type.
 
  - SBSA Test 403 (Check ECAM Memory accessibility) execution time depends on the system PCIe hierarchy. For systems with multiple ECAMs the time taken to complete can be long which is normal. Please wait until the test completes.
@@ -188,7 +188,7 @@ The details of the hardware or Verification IP which enable these exerciser test
 SBSA ACS is distributed under Apache v2.0 License.
 
 
-## Feedback, contributions and support
+## Feedback, contributions, and support
 
  - For feedback, use the GitHub Issue Tracker that is associated with this repository.
  - For support, send an email to "[email protected]" with details.
@@ -197,4 +197,4 @@ SBSA ACS is distributed under Apache v2.0 License.
 
 --------------
 
-*Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved.*
+*Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.*

baremetal_app/SbsaAvs.h

@@ -21,7 +21,7 @@
 
 
   #define SBSA_ACS_MAJOR_VER  3
-  #define SBSA_ACS_MINOR_VER  1
+  #define SBSA_ACS_MINOR_VER  2
 
   #define SBSA_MIN_LEVEL_SUPPORTED 3
   #define SBSA_MAX_LEVEL_SUPPORTED 6

baremetal_app/SbsaAvsMain.c

@@ -91,7 +91,8 @@ createTimerInfoTable(
 {
   uint64_t   *TimerInfoTable;
 
-  TimerInfoTable = val_memory_alloc(sizeof(TIMER_INFO_TABLE) + (2 * sizeof(TIMER_INFO_GTBLOCK)));
+  TimerInfoTable = val_memory_alloc(sizeof(TIMER_INFO_TABLE)
+                   + (PLATFORM_OVERRIDE_TIMER_COUNT * sizeof(TIMER_INFO_GTBLOCK)));
 
   val_timer_create_info_table(TimerInfoTable);
 }
@@ -102,7 +103,8 @@ createWatchdogInfoTable(
 {
   uint64_t *WdInfoTable;
 
-  WdInfoTable = val_memory_alloc(sizeof(WD_INFO_TABLE) + (2 * sizeof(WD_INFO_BLOCK)));
+  WdInfoTable = val_memory_alloc(sizeof(WD_INFO_TABLE)
+                + (PLATFORM_OVERRIDE_WD_TIMER_COUNT * sizeof(WD_INFO_BLOCK)));
 
   val_wd_create_info_table(WdInfoTable);
 }
@@ -115,11 +117,14 @@ createPcieVirtInfoTable(
   uint64_t   *PcieInfoTable;
   uint64_t   *IoVirtInfoTable;
 
-  PcieInfoTable = val_memory_alloc(sizeof(PCIE_INFO_TABLE) + (1 * sizeof(PCIE_INFO_BLOCK)));
+  PcieInfoTable = val_memory_alloc(sizeof(PCIE_INFO_TABLE)
+                  + (PLATFORM_OVERRIDE_NUM_ECAM * sizeof(PCIE_INFO_BLOCK)));
   val_pcie_create_info_table(PcieInfoTable);
 
-  IoVirtInfoTable = val_memory_alloc(sizeof(IOVIRT_INFO_TABLE) + (4 * sizeof(IOVIRT_BLOCK))
-                                                               + (16 * sizeof(ID_MAP)));
+  IoVirtInfoTable = val_memory_alloc(sizeof(IOVIRT_INFO_TABLE)
+                    + ((IOVIRT_ITS_COUNT + IOVIRT_SMMUV3_COUNT + IOVIRT_RC_COUNT
+                    + IOVIRT_SMMUV2_COUNT + IOVIRT_NAMED_COMPONENT_COUNT + IOVIRT_PMCG_COUNT)
+                    * sizeof(IOVIRT_BLOCK)) + (IOVIRT_MAX_NUM_MAP * sizeof(ID_MAP)));
   val_iovirt_create_info_table(IoVirtInfoTable);
 }
 
@@ -130,11 +135,12 @@ createPeripheralInfoTable(
   uint64_t   *PeripheralInfoTable;
   uint64_t   *MemoryInfoTable;
 
-  PeripheralInfoTable = val_memory_alloc(sizeof(PERIPHERAL_INFO_TABLE) +
-                                        (1 * sizeof(PERIPHERAL_INFO_BLOCK)));
+  PeripheralInfoTable = val_memory_alloc(sizeof(PERIPHERAL_INFO_TABLE)
+                        + (PLATFORM_OVERRIDE_PERIPHERAL_COUNT * sizeof(PERIPHERAL_INFO_BLOCK)));
   val_peripheral_create_info_table(PeripheralInfoTable);
 
-  MemoryInfoTable = val_memory_alloc(sizeof(MEMORY_INFO_TABLE) + (PLATFORM_OVERRIDE_MEMORY_ENTRY_COUNT * sizeof(MEM_INFO_BLOCK)));
+  MemoryInfoTable = val_memory_alloc(sizeof(MEMORY_INFO_TABLE)
+                    + (PLATFORM_OVERRIDE_MEMORY_ENTRY_COUNT * sizeof(MEM_INFO_BLOCK)));
   val_memory_create_info_table(MemoryInfoTable);
 }
 
@@ -282,4 +288,3 @@ ShellAppMainsbsa(
 
   return 0;
 }
-

docs/Exerciser_porting_guide.md

@@ -0,0 +1,156 @@
+# Exerciser Porting Guide
+This document gives details of the various PCIe capabilities that exerciser device supports and how the exerciser is supposed to behave.
+
+## Introduction to PCIe Exerciser Endpoint Device
+PCIe Exerciser is a client device wrapped up by PCIe Endpoint. This device was created to meet SBSA (Server Based System Architecture) requirements for various PCIe capability validation tests.
+
+### Generating DMA
+- Before triggering DMA all the required DMA attribute fields like DMA bus address, DMA length, exerciser instance fields should be correctly set <br/>
+**pal_exerciser_set_param(Type, Value1, Value2, Bdf)** <br/>
+Type - DMA_ATTRIBUTES<br/>
+Value1 - Buffer containing the data or the Buffer where the data to be copied<br/>
+Value2 - Size of the data<br/>
+BDF - BDF of the exerciser<br/>
+- Trigger the DMA to/from the buffer<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - START_DMA<br/>
+Param - EDMA_TO_DEVICE or EDMA_FROM_DEVICE<br/>
+Bdf - BDF of the exerciser<br/>
+<br/>
+
+### Generating DMA with PASID TLP Prefixes
+- Program exerciser to start sending TLPs with PASID TLP Prefixes. This includes setting PASID Enable bit in exerciser PASID Control register and the implementation specific PASID Enable bit of the Root Port.<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - PASID_TLP_START<br/>
+Param - Substream ID<br/>
+Bdf - BDF of the exerciser<br/>
+**pal_exerciser_set_param(Type, Value1, Value2, Bdf)**<br/>
+Type - DMA_ATTRIBUTES<br/>
+Value1 - Buffer containing the data or the Buffer where the data to be copied<br/>
+Value2 - Size of the data<br/>
+BDF - BDF of the exerciser<br/>
+- Trigger the DMA to/from the buffer<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - START_DMA<br/>
+Param - EDMA_TO_DEVICE or EDMA_FROM_DEVICE<br/>
+Bdf - BDF of the exerciser<br/>
+- Disable exerciser to stop sending TLPs with PASID TLP Prefixes.<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - PASID_TLP_STOP<br/>
+Param - Substream ID<br/>
+Bdf - BDF of the exerciser<br/>
+<br/>
+
+### Generating DMA with No Snoop TLP
+- Program exerciser hierarchy to start sending/receiving TLPs with No Snoop attribute header. This includes disabling No snoop bit in exerciser control register.<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - TXN_NO_SNOOP_DISABLE<br/>
+Param - Null<br/>
+Bdf - BDF of the exerciser<br/>
+**pal_exerciser_set_param(Type, Value1, Value2, Bdf)**<br/>
+Type - DMA_ATTRIBUTES<br/>
+Value1 - Buffer containing the data or the Buffer where the data to be copied<br/>
+Value2 - Size of the data<br/>
+BDF - BDF of the exerciser<br/>
+- Trigger the DMA to/from the buffer<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - START_DMA<br/>
+Param - EDMA_TO_DEVICE or EDMA_FROM_DEVICE<br/>
+Bdf - BDF of the exerciser<br/>
+<br/>
+
+### ATS Request
+- Before starting an ATS request, untranslated input address for ATSRequest must be written onto Bus Address Register<br/>
+**pal_exerciser_set_param(Type, Value1, Value2, Bdf)**<br/>
+Type - DMA_ATTRIBUTES<br/>
+Value1 -  Untranslated input address<br/>
+Value2 - Size<br/>
+BDF - BDF of the exerciser<br/>
+- Send an ATS Translation Request for the VA<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - ATS_TXN_REQ<br/>
+Param - VA<br/>
+Bdf - BDF of the exerciser<br/>
+- Get ATS Translation Response<br/>
+**pal_exerciser_get_param(Type, Value1, Value2, Bdf)**<br/>
+Type - ATS_RES_ATTRIBUTES<br/>
+Value1 - Buffer to store translated address<br/>
+Value2 - Null<br/>
+Bdf -  BDF of the exerciser<br/>
+<br/>
+
+### Generating DMA with Address Translated(AT)
+- Configure Exerciser to issue subsequent DMA transactions with AT(Address Translated) bit Set<br/>
+**pal_exerciser_set_param(Type, Value1, Value2, Bdf)**<br/>
+Type - CFG_TXN_ATTRIBUTES<br/>
+Value1 - TXN_ADDR_TYPE<br/>
+Value2 - AT_TRANSLATED<br/>
+BDF - BDF of the exerciser<br/>
+**pal_exerciser_set_param(Type, Value1, Value2, Bdf)**<br/>
+Type - DMA_ATTRIBUTES<br/>
+Value1 - Buffer containing the data or the Buffer where the data to be copied<br/>
+Value2 - Size of the data<br/>
+BDF - BDF of the exerciser<br/>
+- Trigger the DMA to/from the buffer<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - START_DMA<br/>
+Param - EDMA_TO_DEVICE or EDMA_FROM_DEVICE<br/>
+Bdf - BDF of the exerciser<br/>
+<br/>
+
+### Trigerring MSI
+- Trigger the interrupt for this Exerciser instance<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - GENERATE_MSI<br/>
+Param - MSI index<br/>
+Bdf - BDF of the exerciser<br/>
+<br/>
+
+### Trigerring Legacy Interrupts
+-  Clear any pending interrupts<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - CLEAR_INTR<br/>
+Param - Legacy interrupt IRQ<br/>
+Bdf - BDF of the exerciser<br/>
+- Trigger the interrupt for this Exerciser instance<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - GENERATE_L_INTR<br/>
+Param - Legacy interrupt IRQ<br/>
+Bdf - BDF of the exerciser<br/>
+<br/>
+
+### Transaction Monitoring
+- Transaction monitoring capabilities in the exerciser provides the ability to record the incoming transactions, for both config and memory transactions. This includes,<br/>
+	-   config read and write transactions serviced in PCIe endpoints.<br/>
+	-   memory transactions serviced in PCIe endpoint BARs.<br/>
+	-   memory transactions which are forwarded from PCIe endpoint to device(like exerciser).<br/>
+- To start transaction monitoring<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - START_TXN_MONITOR<br/>
+Param - CFG_READ<br/>
+Bdf - BDF of the exerciser<br/>
+- After the transactions are performed, stop the transaction monitoring<br/>
+**pal_exerciser_ops(Ops, Param, Bdf)**<br/>
+Ops - STOP_TXN_MONITOR<br/>
+Param - CFG_READ<br/>
+Bdf - BDF of the exerciser<br/>
+- Read the transaction trace<br/>
+**pal_exerciser_get_param(Type, Value1, Value2, Bdf)**<br/>
+Type -<br/>
+	- CFG_TXN_ATTRIBUTES: Indicates transaction attributes. cfg or mem transaction<br/>
+	- TRANSACTION_TYPE: Indicates transaction type. Read or Write transaction<br/>
+	- ADDRESS_ATTRIBUTES: Config or memory address<br/>
+	- DATA_ATTRIBUTES: Transaction data read or written to<br/>
+Value1 - Requested transaction data<br/>
+Value2 - Null<br/>
+Bdf -  BDF of the exerciser<br/>
+<br/>
+<br/>
+
+## License
+Arm SBSA ACS is distributed under Apache v2.0 License.
+
+--------------
+
+*Copyright (c) 2022, Arm Limited and Contributors. All rights reserved.*
+

linux_app/sbsa-acs-app/include/sbsa_app.h

@@ -1,5 +1,5 @@
 /** @file
- * Copyright (c) 2016-2020, Arm Limited or its affiliates. All rights reserved.
+ * Copyright (c) 2016-2020, 2022 Arm Limited or its affiliates. All rights reserved.
  * SPDX-License-Identifier : Apache-2.0
 
  * Licensed under the Apache License, Version 2.0 (the "License");
@@ -21,7 +21,7 @@
 
 
 #define SBSA_APP_VERSION_MAJOR  3
-#define SBSA_APP_VERSION_MINOR  1
+#define SBSA_APP_VERSION_MINOR  2
 
 #include "sbsa_drv_intf.h"
 

platform/pal_baremetal.mk

@@ -35,7 +35,8 @@ CC = $(GCC49_AARCH64_PREFIX)gcc -march=armv8.2-a -DTARGET_EMULATION
 AR = $(GCC49_AARCH64_PREFIX)ar
 CC_FLAGS = -g -Os -fshort-wchar -fno-builtin -fno-strict-aliasing -Wall -Werror -Wextra -Wmissing-declarations -Wstrict-prototypes -Wconversion -Wsign-conversion -Wstrict-overflow
 
-DEPS = $(SBSA_ROOT)/val/include/pal_interface.h
+DEPS = $(SBSA_ROOT)/platform/pal_baremetal/FVP/include/platform_override_fvp.h
+DEPS += $(SBSA_ROOT)/val/include/pal_interface.h
 
 FILES   += $(foreach files,$(SBSA_DIR)/,$(wildcard $(files)/*.S))
 FILES   += $(foreach files,$(SBSA_DIR)/,$(wildcard $(files)/*.c))