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Merge pull request #15453 from MaximIntegrated/fix-spi_glitch
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Fix MAX32660, MAX32670 SPI glitch fix
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0xc0170 authored Sep 13, 2023
2 parents 67c25e8 + cbe0f73 commit 7049bfc
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Showing 2 changed files with 2 additions and 2 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -764,7 +764,7 @@ int MXC_SPI_RevA_TransSetup(mxc_spi_reva_req_t *req)
states[spi_num].started = 0;
states[spi_num].req_done = 0;
// HW requires disabling/renabling SPI block at end of each transaction (when SS is inactive).
if (states[spi_num].ssDeassert == 1) {
if (states[spi_num].drv_ssel && (states[spi_num].ssDeassert == 1)) {
(req->spi)->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN);
}

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Original file line number Diff line number Diff line change
Expand Up @@ -764,7 +764,7 @@ int MXC_SPI_RevA_TransSetup(mxc_spi_reva_req_t *req)
states[spi_num].started = 0;
states[spi_num].req_done = 0;
// HW requires disabling/renabling SPI block at end of each transaction (when SS is inactive).
if (states[spi_num].ssDeassert == 1) {
if (states[spi_num].drv_ssel && (states[spi_num].ssDeassert == 1) ) {
(req->spi)->ctrl0 &= ~(MXC_F_SPI_REVA_CTRL0_EN);
}

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