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Merge pull request #15458 from MultiTechSystems/xdot-max32670
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Add target support for XDOT_MAX32670
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@0xc0170
0xc0170 authored Oct 31, 2023
2 parents 7c7d20d + 4ba13f1 commit 72f27ce
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16 changes: 16 additions & 0 deletions targets/TARGET_Maxim/TARGET_MAX32670/TARGET_XDOT_MAX32670/CMakeLists.txt
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add_library(mbed-xdot-max32670 INTERFACE)

target_include_directories(mbed-xdot-max32670
INTERFACE
.
)

target_link_libraries(mbed-xdot-max32670
INTERFACE
mbed-max32670
)

target_sources(mbed-xdot-max32670
INTERFACE
SystemInit.c
)
72 changes: 72 additions & 0 deletions targets/TARGET_Maxim/TARGET_MAX32670/TARGET_XDOT_MAX32670/PeripheralNames.h
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/*******************************************************************************
* Copyright (C) Maxim Integrated Products, Inc., All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Except as contained in this notice, the name of Maxim Integrated
* Products, Inc. shall not be used except as stated in the Maxim Integrated
* Products, Inc. Branding Policy.
*
* The mere transfer of this software does not imply any licenses
* of trade secrets, proprietary technology, copyrights, patents,
* trademarks, maskwork rights, or any other form of intellectual
* property whatsoever. Maxim Integrated Products, Inc. retains all
* ownership rights.
*******************************************************************************
*/

#ifndef MBED_PERIPHERALNAMES_H
#define MBED_PERIPHERALNAMES_H

#include "cmsis.h"

#ifdef __cplusplus
extern "C" {
#endif

typedef enum {
UART_0 = MXC_BASE_UART0,
UART_1 = MXC_BASE_UART1,
UART_2 = MXC_BASE_UART2,
UART_3 = MXC_BASE_UART3,
#if defined(MBED_CONF_TARGET_STDIO_UART)
STDIO_UART = MBED_CONF_TARGET_STDIO_UART,
#else
STDIO_UART = UART_0,
#endif
} UARTName;

typedef enum {
I2C_0 = MXC_BASE_I2C0,
I2C_1 = MXC_BASE_I2C1,
I2C_2 = MXC_BASE_I2C2,
} I2CName;

typedef enum {
SPI_0 = MXC_BASE_SPI0,
SPI_1 = MXC_BASE_SPI1,
SPI_2 = MXC_BASE_SPI2,
} SPIName;


#ifdef __cplusplus
}
#endif

#endif
189 changes: 189 additions & 0 deletions targets/TARGET_Maxim/TARGET_MAX32670/TARGET_XDOT_MAX32670/PinNames.h
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/*******************************************************************************
* Copyright (C) 2022 Maxim Integrated Products, Inc., All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included
* in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
* IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
* OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
* Except as contained in this notice, the name of Maxim Integrated
* Products, Inc. shall not be used except as stated in the Maxim Integrated
* Products, Inc. Branding Policy.
*
* The mere transfer of this software does not imply any licenses
* of trade secrets, proprietary technology, copyrights, patents,
* trademarks, maskwork rights, or any other form of intellectual
* property whatsoever. Maxim Integrated Products, Inc. retains all
* ownership rights.
*******************************************************************************
*/

/* MBED TARGET LIST: MAX32670EVKIT */

#ifndef MBED_PINNAMES_H
#define MBED_PINNAMES_H

#include "cmsis.h"
#include "gpio_regs.h"

#ifdef __cplusplus
extern "C" {
#endif

typedef enum {
PIN_INPUT = 0,
PIN_OUTPUT = 1
} PinDirection;

#define PORT_SHIFT 12

#define PINNAME_TO_PORT(name) ((unsigned int)(name) >> PORT_SHIFT)
#define PINNAME_TO_PIN(name) ((unsigned int)(name) & ~(0xFFFFFFFF << PORT_SHIFT))
#define NOT_CONNECTED (int)0xFFFFFFFF

typedef enum {
// Port 0
P0_0 = (0 << PORT_SHIFT),
P0_1, P0_2, P0_3, P0_4, P0_5, P0_6, P0_7, P0_8, P0_9, P0_10, P0_11, P0_12, P0_13, P0_14, P0_15,
P0_16, P0_17, P0_18, P0_19, P0_20, P0_21, P0_22, P0_23,P0_24, P0_25, P0_26, P0_27, P0_28, P0_29, P0_30, P0_31,

// Port 1
P1_0 = (1 << PORT_SHIFT),
P1_1, P1_2, P1_3, P1_4, P1_5, P1_6, P1_7, P1_8, P1_9, P1_10, P1_11, P1_12, P1_13, P1_14, P1_15,
P1_16, P1_17, P1_18, P1_19, P1_20, P1_21, P1_22, P1_23,P1_24, P1_25, P1_26, P1_27, P1_28, P1_29, P1_30, P1_31,

// USB bridge connected UART pins
#if defined(MBED_CONF_TARGET_STDIO_UART_TX)
CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX,
#else
CONSOLE_TX = P0_29,
#endif // MBED_CONF_TARGET_STDIO_UART_TX

#if defined(MBED_CONF_TARGET_STDIO_UART_RX)
CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX,
#else
CONSOLE_RX = P0_28,
#endif // MBED_CONF_TARGET_STDIO_UART_RX

STDIO_UART_TX = CONSOLE_TX,
STDIO_UART_RX = CONSOLE_RX,

// ----- Start of xDot external pin definitions -----
WAKE = P0_19,
GPIO0 = P0_30,
GPIO1 = P0_27,
GPIO2 = P0_26,
GPIO3 = P0_25,

// AT command port UART
UART_RX = P0_8,
UART_TX = P0_9,
UART_CTS = P0_10,
UART_RTS = P0_11,

UART0_RX = UART_RX,
UART0_TX = UART_TX,
UART0_CTS = UART_CTS,
UART0_RTS = UART_RTS,

// debug UART
UART1_RX = P0_28,
UART1_TX = P0_29,

// SwD
SWDIO = P0_0,
SWCLK = P0_1,

// I2C
I2C1_SCL = P0_12,
I2C1_SDA = P0_13,

// SPI
SPI0_SCK = P0_4,
SPI0_MOSI = P0_3,
SPI0_MISO = P0_2,
SPI0_SS = P0_5,
// ----- End of xDot external pin definitions -----

// ----- Start of xDot dedicated internal pins. -----
MEM_PWR_EN = P0_24, // Power to EEPROM, Flash & Secure element
FLASH_CS = P0_23,

// EEPROM and SE I2C
I2C0_SCL = P0_6,
I2C0_SDA = P0_7,
SE_SDA = I2C0_SDA,
SE_SCL = I2C0_SCL,

// SX1262
SPI1_SCK = P0_16,
SPI1_MOSI = P0_15,
SPI1_MISO = P0_14,
SPI1_SS = P0_17,
LORA_MISO = SPI1_MISO,
LORA_MOSI = SPI1_MOSI,
LORA_SCK = SPI1_SCK,
LORA_NSS = SPI1_SS,

LORA_RESET = P0_20,
LORA_BUSY = P0_21,
LORA_DIO1 = P0_22,

RF_SW_CTRL = P0_18, // RF switch, active high
// ----- End of xDot dedicated internal pins. -----

// ----- Start of aliases for MAX32670 serial_api.c -----
// The xDot does not use these serial UARTs or the serial_api
// code. These pins are used on the xDot as detailed above.
UART0B_RX = P0_24,
UART0B_TX = P0_25,

UART1B_RX = P0_2,
UART1B_TX = P0_3,

UART2B_RX = P0_14,
UART2B_TX = P0_15,
// ----- end of aliases for MAX32670 serial_api.c -----

// Not connected
NC = NOT_CONNECTED
} PinName;

#define LED1 P0_30
#define I2C_SCL I2C1_SCL
#define I2C_SDA I2C1_SDA
#define SPI_MISO SPI0_MISO
#define SPI_MOSI SPI0_MOSI
#define SPI_SCK SPI0_SCK
#define SPI_NSS SPI0_SS

typedef enum {
PullNone = 0,
PullUp = 1,
PullDown = 2,
PullDefault = PullUp
} PinMode;

typedef enum {
LED_ON = 0,
LED_OFF = 1
} LedStates;

#ifdef __cplusplus
}
#endif

#endif
114 changes: 114 additions & 0 deletions targets/TARGET_Maxim/TARGET_MAX32670/TARGET_XDOT_MAX32670/SystemInit.c
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/* mbed Microcontroller Library
*******************************************************************************
* Copyright (c) 2023, MultiTech Systems
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of MultiTech nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/

#include <string.h>
#include <stdio.h>
#include <stdlib.h>
#include "max32670.h"
#include "gcr_regs.h"
#include "mxc_sys.h"
#include "pwrseq_regs.h"

#define XDOT_ERFO_FREQ 24000000 // Change to 24000000 for xDot 1.5 Rev A

void SystemCoreClockUpdateXdot(void)
{
uint32_t base_freq, div, clk_src;

// Get the clock source and frequency
clk_src = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_SEL);
switch (clk_src)
{
case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_EXTCLK:
base_freq = EXTCLK_FREQ;
break;
case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERFO:
base_freq = XDOT_ERFO_FREQ;
break;
case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_INRO:
base_freq = INRO_FREQ;
break;
case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO:
base_freq = IPO_FREQ;
break;
case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IBRO:
base_freq = IBRO_FREQ;
break;
case MXC_S_GCR_CLKCTRL_SYSCLK_SEL_ERTCO:
base_freq = ERTCO_FREQ;
break;
default:
// Codes 001 and 111 are reserved.
// This code should never execute, however, initialize to safe value.
base_freq = HIRC_FREQ;
break;
}
// Get the clock divider
if (clk_src == MXC_S_GCR_CLKCTRL_SYSCLK_SEL_IPO)
{
base_freq = base_freq >> ((MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_IPO_DIV)>> MXC_F_GCR_CLKCTRL_IPO_DIV_POS);
}
div = (MXC_GCR->clkctrl & MXC_F_GCR_CLKCTRL_SYSCLK_DIV) >> MXC_F_GCR_CLKCTRL_SYSCLK_DIV_POS;

SystemCoreClock = base_freq >> div;
}

int PreInit(void)
{
return 0;
}

void SystemInit(void)
{
/* Make sure interrupts are enabled. */
__enable_irq();

#if (__FPU_PRESENT == 1)
/* Enable FPU on Cortex-M4, which occupies coprocessor slots 10 & 11 */
/* Grant full access, per "Table B3-24 CPACR bit assignments". */
/* DDI0403D "ARMv7-M Architecture Reference Manual" */
SCB->CPACR |= SCB_CPACR_CP10_Msk | SCB_CPACR_CP11_Msk;
__DSB();
__ISB();
#endif

MXC_PWRSEQ->lpcn &= ~(1 << 31); // Ensure ERTCO is on

MXC_SYS_Clock_Select(MXC_SYS_CLOCK_IPO);
SystemCoreClockUpdateXdot();

// Increase drive strength of I2C_SE bus and Mem Pwr En.
// Note: Mem Pwr En doesn't help, higher drive strength on se i2c pins seems to though
MXC_GPIO0->ds0 |= (1 << 6) | (1 << 7) | (1 << 24);
MXC_GPIO0->ds1 |= (1 << 6) | (1 << 7) | (1 << 24);

MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO0);
MXC_SYS_ClockEnable(MXC_SYS_PERIPH_CLOCK_GPIO1);
}
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