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Update CMSIS to 5.8.0 #14900

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merged 16 commits into from
Jul 30, 2021
Merged

Update CMSIS to 5.8.0 #14900

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7941286
[CMSIS_5]: Updated to 13b9f72f2
0xc0170 Jul 9, 2021
8ade0d4
CMSIS/RTX: Patch RTX4 to preserve osThreadDef compatibility
bulislaw Jul 4, 2017
06b815a
CMSIS/RTX: Patch to conditionally compile
Mar 28, 2018
4744fdb
CMSIS/RTX: Allow overwriting mutex ops for ARMC
bulislaw Oct 18, 2017
b9043fb
cmsis: importer sha removal
0xc0170 Jul 9, 2021
218e93c
cmsis: fix license header in rtx_def
0xc0170 Jul 12, 2021
8bdec2b
retarget: move compat header for ARMClang prior any cmsis headers
0xc0170 Jul 12, 2021
38ca4bd
semihosting: add compat header where is required
0xc0170 Jul 12, 2021
00580ce
cmsis: fix rtx_def inclusion in .S files for Gcc Arm
Jul 19, 2021
dca1d5c
cmsis: fix armcc compat header redefition of enable/disable irq
Jul 19, 2021
c018771
musca targets: use IsException instead of removed isIrqMode
Jul 19, 2021
c122158
cmsis: preprocess irq files
Jul 19, 2021
4822ac5
cypress: fix cy_syslib breakpoint undefined
Jul 19, 2021
180eb75
cmsis: patch fpu in asm for armcc5
Jul 26, 2021
5e29db6
rtos: fix delay with 0
Jul 27, 2021
049d1f1
cmsis importer: add commits for Mbed OS changes
Jul 30, 2021
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8 changes: 4 additions & 4 deletions cmsis/CMSIS_5/CMSIS/RTOS2/Include/cmsis_os2.h
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2018 Arm Limited. All rights reserved.
* Copyright (c) 2013-2020 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
Expand All @@ -17,7 +17,7 @@
*
* ----------------------------------------------------------------------
*
* $Date: 18. June 2018
* $Date: 12. June 2020
* $Revision: V2.1.3
*
* Project: CMSIS-RTOS2 API
Expand Down Expand Up @@ -86,7 +86,7 @@ typedef enum {
osKernelLocked = 3, ///< Locked.
osKernelSuspended = 4, ///< Suspended.
osKernelError = -1, ///< Error.
osKernelReserved = 0x7FFFFFFFU ///< Prevents enum down-size compiler optimization.
osKernelReserved = 0x7FFFFFFF ///< Prevents enum down-size compiler optimization.
} osKernelState_t;

/// Thread state.
Expand Down Expand Up @@ -723,7 +723,7 @@ osStatus_t osMessageQueueGet (osMessageQueueId_t mq_id, void *msg_ptr, uint8_t *
/// \return maximum number of messages.
uint32_t osMessageQueueGetCapacity (osMessageQueueId_t mq_id);

/// Get maximum message size in a Memory Pool.
/// Get maximum message size in a Message Queue.
/// \param[in] mq_id message queue ID obtained by \ref osMessageQueueNew.
/// \return maximum message size in bytes.
uint32_t osMessageQueueGetMsgSize (osMessageQueueId_t mq_id);
Expand Down
15 changes: 12 additions & 3 deletions cmsis/CMSIS_5/CMSIS/RTOS2/Include/os_tick.h
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@@ -1,11 +1,11 @@
/**************************************************************************//**
* @file os_tick.h
* @brief CMSIS OS Tick header file
* @version V1.0.1
* @date 24. November 2017
* @version V1.0.2
* @date 19. March 2021
******************************************************************************/
/*
* Copyright (c) 2017-2017 ARM Limited. All rights reserved.
* Copyright (c) 2017-2021 ARM Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
Expand All @@ -27,6 +27,11 @@

#include <stdint.h>

#ifdef __cplusplus
extern "C"
{
#endif

/// IRQ Handler.
#ifndef IRQHANDLER_T
#define IRQHANDLER_T
Expand Down Expand Up @@ -68,4 +73,8 @@ uint32_t OS_Tick_GetCount (void);
/// \return OS Tick overflow status (1 - overflow, 0 - no overflow).
uint32_t OS_Tick_GetOverflow (void);

#ifdef __cplusplus
}
#endif

#endif /* OS_TICK_H */
6 changes: 3 additions & 3 deletions cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Config/RTX_Config.c
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2018 Arm Limited. All rights reserved.
* Copyright (c) 2013-2021 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
Expand All @@ -17,7 +17,7 @@
*
* -----------------------------------------------------------------------------
*
* $Revision: V5.1.0
* $Revision: V5.1.1
*
* Project: CMSIS-RTOS RTX
* Title: RTX Configuration
Expand All @@ -40,7 +40,7 @@ __WEAK uint32_t osRtxErrorNotify (uint32_t code, void *object_id) {
(void)object_id;

switch (code) {
case osRtxErrorStackUnderflow:
case osRtxErrorStackOverflow:
// Stack overflow detected for thread (thread_id=object_id)
break;
case osRtxErrorISRQueueOverflow:
Expand Down
102 changes: 51 additions & 51 deletions cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Config/RTX_Config.h
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2020 Arm Limited. All rights reserved.
* Copyright (c) 2013-2021 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
Expand All @@ -17,7 +17,7 @@
*
* -----------------------------------------------------------------------------
*
* $Revision: V5.5.1
* $Revision: V5.5.2
*
* Project: CMSIS-RTOS RTX
* Title: RTX Configuration definitions
Expand Down Expand Up @@ -69,7 +69,7 @@

// </e>

// <o>ISR FIFO Queue
// <o>ISR FIFO Queue
// <4=> 4 entries <8=> 8 entries <12=> 12 entries <16=> 16 entries
// <24=> 24 entries <32=> 32 entries <48=> 48 entries <64=> 64 entries
// <96=> 96 entries <128=> 128 entries <196=> 196 entries <256=> 256 entries
Expand Down Expand Up @@ -143,10 +143,10 @@
#endif

// <q>Stack overrun checking
// <i> Enables stack overrun check at thread switch.
// <i> Enables stack overrun check at thread switch (requires RTX source variant).
// <i> Enabling this option increases slightly the execution time of a thread switch.
#ifndef OS_STACK_CHECK
#define OS_STACK_CHECK 1
#define OS_STACK_CHECK 0
#endif

// <q>Stack usage watermark
Expand All @@ -156,8 +156,8 @@
#define OS_STACK_WATERMARK 0
#endif

// <o>Processor mode for Thread execution
// <0=> Unprivileged mode
// <o>Processor mode for Thread execution
// <0=> Unprivileged mode
// <1=> Privileged mode
// <i> Default: Privileged mode
#ifndef OS_PRIVILEGE_MODE
Expand Down Expand Up @@ -367,125 +367,125 @@
// <i> Recording levels for RTX components.
// <i> Only applicable if events for the respective component are generated.

// <h>Memory Management
// <e.7>Memory Management
// <i> Recording level for Memory Management events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_MEMORY_LEVEL
#define OS_EVR_MEMORY_LEVEL 0x01U
// </e>
#ifndef OS_EVR_MEMORY_LEVEL
#define OS_EVR_MEMORY_LEVEL 0x81U
#endif

// <h>Kernel
// <e.7>Kernel
// <i> Recording level for Kernel events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_KERNEL_LEVEL
#define OS_EVR_KERNEL_LEVEL 0x01U
// </e>
#ifndef OS_EVR_KERNEL_LEVEL
#define OS_EVR_KERNEL_LEVEL 0x81U
#endif

// <h>Thread
// <e.7>Thread
// <i> Recording level for Thread events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_THREAD_LEVEL
#define OS_EVR_THREAD_LEVEL 0x05U
// </e>
#ifndef OS_EVR_THREAD_LEVEL
#define OS_EVR_THREAD_LEVEL 0x85U
#endif

// <h>Generic Wait
// <e.7>Generic Wait
// <i> Recording level for Generic Wait events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_WAIT_LEVEL
#define OS_EVR_WAIT_LEVEL 0x01U
// </e>
#ifndef OS_EVR_WAIT_LEVEL
#define OS_EVR_WAIT_LEVEL 0x81U
#endif

// <h>Thread Flags
// <e.7>Thread Flags
// <i> Recording level for Thread Flags events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_THFLAGS_LEVEL
#define OS_EVR_THFLAGS_LEVEL 0x01U
// </e>
#ifndef OS_EVR_THFLAGS_LEVEL
#define OS_EVR_THFLAGS_LEVEL 0x81U
#endif

// <h>Event Flags
// <e.7>Event Flags
// <i> Recording level for Event Flags events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_EVFLAGS_LEVEL
#define OS_EVR_EVFLAGS_LEVEL 0x01U
// </e>
#ifndef OS_EVR_EVFLAGS_LEVEL
#define OS_EVR_EVFLAGS_LEVEL 0x81U
#endif

// <h>Timer
// <e.7>Timer
// <i> Recording level for Timer events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_TIMER_LEVEL
#define OS_EVR_TIMER_LEVEL 0x01U
// </e>
#ifndef OS_EVR_TIMER_LEVEL
#define OS_EVR_TIMER_LEVEL 0x81U
#endif

// <h>Mutex
// <e.7>Mutex
// <i> Recording level for Mutex events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_MUTEX_LEVEL
#define OS_EVR_MUTEX_LEVEL 0x01U
// </e>
#ifndef OS_EVR_MUTEX_LEVEL
#define OS_EVR_MUTEX_LEVEL 0x81U
#endif

// <h>Semaphore
// <e.7>Semaphore
// <i> Recording level for Semaphore events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_SEMAPHORE_LEVEL
#define OS_EVR_SEMAPHORE_LEVEL 0x01U
// </e>
#ifndef OS_EVR_SEMAPHORE_LEVEL
#define OS_EVR_SEMAPHORE_LEVEL 0x81U
#endif

// <h>Memory Pool
// <e.7>Memory Pool
// <i> Recording level for Memory Pool events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_MEMPOOL_LEVEL
#define OS_EVR_MEMPOOL_LEVEL 0x01U
// </e>
#ifndef OS_EVR_MEMPOOL_LEVEL
#define OS_EVR_MEMPOOL_LEVEL 0x81U
#endif

// <h>Message Queue
// <e.7>Message Queue
// <i> Recording level for Message Queue events.
// <o.0>Error events
// <o.1>API function call events
// <o.2>Operation events
// <o.3>Detailed operation events
// </h>
#ifndef OS_EVR_MSGQUEUE_LEVEL
#define OS_EVR_MSGQUEUE_LEVEL 0x01U
// </e>
#ifndef OS_EVR_MSGQUEUE_LEVEL
#define OS_EVR_MSGQUEUE_LEVEL 0x81U
#endif

// </h>
Expand Down
46 changes: 46 additions & 0 deletions cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Include/rtx_def.h
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Original file line number Diff line number Diff line change
@@ -0,0 +1,46 @@
/*
* Copyright (c) 2021 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
* -----------------------------------------------------------------------------
*
* Project: CMSIS-RTOS RTX
* Title: RTX derived definitions
*
* -----------------------------------------------------------------------------
*/
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This file failed CI due to missing SPDX header

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I am reporting this upstream, it should be fixed asap. I assume as this is already released and new version might take some time, we can patch this file manually. I'll check.

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Fix for upstream ARM-software/CMSIS_5#1238


#ifndef RTX_DEF_H_
#define RTX_DEF_H_

#ifdef _RTE_
#include "RTE_Components.h"
#endif
#include "RTX_Config.h"

#if (defined(OS_OBJ_MEM_USAGE) && (OS_OBJ_MEM_USAGE != 0))
#define RTX_OBJ_MEM_USAGE
#endif

#if (defined(OS_STACK_CHECK) && (OS_STACK_CHECK != 0))
#define RTX_STACK_CHECK
#endif

#ifdef RTE_CMSIS_RTOS2_RTX5_ARMV8M_NS
#define DOMAIN_NS 1
#endif

#endif // RTX_DEF_H_
15 changes: 12 additions & 3 deletions cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Include/rtx_evr.h
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2019 Arm Limited. All rights reserved.
* Copyright (c) 2013-2021 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
Expand All @@ -26,8 +26,6 @@
#ifndef RTX_EVR_H_
#define RTX_EVR_H_

#include "cmsis_os2.h" // CMSIS RTOS API
#include "RTX_Config.h" // RTX Configuration
#include "rtx_os.h" // RTX OS definitions

// Initial Thread configuration covered also Thread Flags and Generic Wait
Expand Down Expand Up @@ -393,6 +391,17 @@ extern void EvrRtxKernelGetSysTimerFreq (uint32_t freq);
#define EvrRtxKernelGetSysTimerFreq(freq)
#endif

/**
\brief Event on RTOS kernel system error (Error)
\param[in] code error code.
\param[in] object_id object that caused the error.
*/
#if (!defined(EVR_RTX_DISABLE) && (OS_EVR_KERNEL != 0) && !defined(EVR_RTX_KERNEL_ERROR_NOTIFY_DISABLE))
extern void EvrRtxKernelErrorNotify (uint32_t code, void *object_id);
#else
#define EvrRtxKernelErrorNotify(code, object_id)
#endif


// ==== Thread Events ====

Expand Down
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