Merge pull request #194 from coreboot/main

[pull] main from coreboot:main

payloads/libpayload/Makefile.mk

@@ -79,7 +79,7 @@ CFLAGS += -nostdlib -fno-builtin -ffreestanding -fomit-frame-pointer
 CFLAGS += -ffunction-sections -fdata-sections
 CFLAGS += -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes -Wvla
 CFLAGS += -Wwrite-strings -Wredundant-decls -Wimplicit-fallthrough
-CFLAGS += -Wstrict-aliasing -Wshadow -Werror
+CFLAGS += -Wstrict-aliasing -Wshadow -Wno-address-of-packed-member -Werror
 
 ifeq ($(CONFIG_LP_LTO),y)
 CFLAGS += -flto

payloads/libpayload/include/endian.h

@@ -193,6 +193,16 @@ static inline void le64enc(void *pp, uint32_t u)
 #define letohl(in) le32toh(in)
 #define letohll(in) le64toh(in)
 
+/* read/write with uintptr_t address */
+#define read8p(addr)	read8((void *)((uintptr_t)(addr)))
+#define read16p(addr)	read16((void *)((uintptr_t)(addr)))
+#define read32p(addr)	read32((void *)((uintptr_t)(addr)))
+#define read64p(addr)	read64((void *)((uintptr_t)(addr)))
+#define write8p(addr, value)	write8((void *)((uintptr_t)(addr)), value)
+#define write16p(addr, value)	write16((void *)((uintptr_t)(addr)), value)
+#define write32p(addr, value)	write32((void *)((uintptr_t)(addr)), value)
+#define write64p(addr, value)	write64((void *)((uintptr_t)(addr)), value)
+
 /* Handy bit manipulation macros */
 
 #define __clrsetbits(endian, bits, addr, clear, set) \
@@ -238,4 +248,19 @@ static inline void le64enc(void *pp, uint32_t u)
 #define clrbits32(addr, clear)		clrsetbits32(addr, clear, 0)
 #define clrbits64(addr, clear)		clrsetbits64(addr, clear, 0)
 
+#define clrsetbits8p(addr, clear, set)	clrsetbits8((void *)((uintptr_t)(addr)), clear, set)
+#define clrsetbits16p(addr, clear, set)	clrsetbits16((void *)((uintptr_t)(addr)), clear, set)
+#define clrsetbits32p(addr, clear, set)	clrsetbits32((void *)((uintptr_t)(addr)), clear, set)
+#define clrsetbits64p(addr, clear, set)	clrsetbits64((void *)((uintptr_t)(addr)), clear, set)
+
+#define setbits8p(addr, set)		clrsetbits8((void *)((uintptr_t)(addr)), 0, set)
+#define setbits16p(addr, set)		clrsetbits16((void *)((uintptr_t)(addr)), 0, set)
+#define setbits32p(addr, set)		clrsetbits32((void *)((uintptr_t)(addr)), 0, set)
+#define setbits64p(addr, set)		clrsetbits64((void *)((uintptr_t)(addr)), 0, set)
+
+#define clrbits8p(addr, clear)		clrsetbits8((void *)((uintptr_t)(addr)), clear, 0)
+#define clrbits16p(addr, clear)		clrsetbits16((void *)((uintptr_t)(addr)), clear, 0)
+#define clrbits32p(addr, clear)		clrsetbits32((void *)((uintptr_t)(addr)), clear, 0)
+#define clrbits64p(addr, clear)		clrsetbits64((void *)((uintptr_t)(addr)), clear, 0)
+
 #endif /* _ENDIAN_H_ */

payloads/libpayload/tests/Makefile.mk

@@ -44,7 +44,7 @@ TEST_CFLAGS += -I$(cmockasrc)/include
 
 # Minimal subset of warnings and errors. Tests can be less strict than actual build.
 TEST_CFLAGS += -Wall -Wundef -Wstrict-prototypes -Wvla
-TEST_CFLAGS += -Wwrite-strings -Wimplicit-fallthrough
+TEST_CFLAGS += -Wwrite-strings -Wno-address-of-packed-member -Wimplicit-fallthrough
 TEST_CFLAGS += -Wstrict-aliasing -Wshadow -Werror
 TEST_CFLAGS += -Wno-unknown-warning-option -Wno-source-mgr -Wno-main-return-type
 

spd/lp5/memory_parts.json

@@ -262,6 +262,17 @@
                 "speedMbps": 8533,
                 "lp5x": true
             }
+        },
+        {
+            "name":  "MT62F2G32D4DS-020 WT:F",
+            "attribs": {
+                "densityPerDieGb": 16,
+                "diesPerPackage": 4,
+                "bitWidthPerChannel": 16,
+                "ranksPerChannel": 2,
+                "speedMbps": 8533,
+                "lp5x": true
+            }
         }
     ]
 }

spd/lp5/set-0/parts_spd_manifest.generated.txt

@@ -26,3 +26,4 @@ MT62F1G32D2DS-023 WT:B,spd-11.hex
 MT62F2G32D4DS-023 WT:B,spd-10.hex
 MT62F1G32D2DS-023 WT:C,spd-11.hex
 K3KL8L80DM-MGCU,spd-11.hex
+MT62F2G32D4DS-020 WT:F,spd-10.hex

spd/lp5/set-1/parts_spd_manifest.generated.txt

@@ -26,3 +26,4 @@ MT62F1G32D2DS-023 WT:B,spd-11.hex
 MT62F2G32D4DS-023 WT:B,spd-10.hex
 MT62F1G32D2DS-023 WT:C,spd-11.hex
 K3KL8L80DM-MGCU,spd-11.hex
+MT62F2G32D4DS-020 WT:F,spd-10.hex

src/device/azalia_device.c

@@ -155,10 +155,8 @@ u32 azalia_find_verb(const u32 *verb_table, u32 verb_table_bytes, u32 viddid, co
 }
 
 /*
- * Wait 50usec for the codec to indicate it is ready.
- * No response would imply that the codec is non-operative.
+ * Wait 50usec for the controller to indicate it is ready.
  */
-
 static int wait_for_ready(u8 *base)
 {
 	struct stopwatch sw;
@@ -179,7 +177,6 @@ static int wait_for_ready(u8 *base)
  * Wait for the codec to indicate that it accepted the previous command.
  * No response would imply that the codec is non-operative.
  */
-
 static int wait_for_valid(u8 *base)
 {
 	struct stopwatch sw;
@@ -206,6 +203,16 @@ static int wait_for_valid(u8 *base)
 		udelay(1);
 	}
 
+	/*
+	 * HDA spec 1.0a "3.4.3 Offset 68h: Immediate Command Status"
+	 * tells us to clear the busy bit explicitly, then poll until
+	 * the controller is ready.
+	 */
+	write32(base + HDA_ICII_REG, 0);
+	if (wait_for_ready(base) < 0) {
+		printk(BIOS_WARNING, "azalia_audio: controller is unresponsive.\n");
+		return -2;
+	}
 	return -1;
 }
 
@@ -238,15 +245,15 @@ __weak void mainboard_azalia_program_runtime_verbs(u8 *base, u32 viddid)
 static bool codec_is_operative(u8 *base, const int addr)
 {
 	if (wait_for_ready(base) < 0) {
-		printk(BIOS_DEBUG, "azalia_audio: codec #%d not ready\n", addr);
+		printk(BIOS_WARNING, "azalia_audio: controller not ready\n");
 		return false;
 	}
 
 	const u32 reg32 = (addr << 28) | 0x000f0000;
 	write32(base + HDA_IC_REG, reg32);
 
 	if (wait_for_valid(base) < 0) {
-		printk(BIOS_DEBUG, "azalia_audio: codec #%d not valid\n", addr);
+		printk(BIOS_NOTICE, "azalia_audio: codec #%d doesn't respond\n", addr);
 		return false;
 	}
 	return true;

src/drivers/mipi/panel-IVO_T109NW41.c

@@ -21,7 +21,7 @@ struct panel_serializable_data IVO_T109NW41 = {
 	.init = {
 		PANEL_DELAY(60),
 		PANEL_DCS(0xB9, 0x83, 0x10, 0x21, 0x55, 0x00),
-		PANEL_DCS(0xB1, 0x2C, 0xED, 0xED, 0x0F, 0xCF, 0x42, 0xF5, 0x39,
+		PANEL_DCS(0xB1, 0x2C, 0xED, 0xED, 0x27, 0xE7, 0x52, 0xF5, 0x39,
 			0x36, 0x36, 0x36, 0x36, 0x32, 0x8B, 0x11, 0x65, 0x00, 0x88,
 			0xFA, 0xFF, 0xFF, 0x8F, 0xFF, 0x08, 0xD6, 0x33),
 		PANEL_DCS(0xB2, 0x00, 0x47, 0xB0, 0x80, 0x00, 0x12, 0x71, 0x3C,
@@ -65,11 +65,11 @@ struct panel_serializable_data IVO_T109NW41 = {
 			0xAA, 0xAA, 0xAA, 0xA0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
 			0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
-		PANEL_DCS(0xE0, 0x04, 0X04, 0X06, 0X0A, 0X0A, 0X05, 0X12, 0X14,
-			0X17, 0X13, 0X2C, 0X33, 0X39, 0X4B, 0X4C, 0X56, 0X61, 0X78,
-			0X7A, 0X41, 0X50, 0X68, 0X73, 0X04, 0X04, 0X06, 0X0A, 0X0A,
-			0X05, 0X12, 0X14, 0X17, 0X13, 0X2C, 0X33, 0X39, 0X4B, 0X4C,
-			0X56, 0X61, 0X78, 0X7A, 0X41, 0X50, 0X68, 0X73),
+		PANEL_DCS(0xE0, 0x00, 0x07, 0x10, 0x17, 0x1C, 0x33, 0x48, 0x50,
+			0x57, 0x50, 0x68, 0x6E, 0x71, 0x7F, 0x81, 0x8A, 0x8E, 0x9B,
+			0x9C, 0x4D, 0x56, 0x5D, 0x73, 0x00, 0x07, 0x10, 0x17, 0x1C,
+			0x33, 0x48, 0x50, 0x57, 0x50, 0x68, 0x6E, 0x71, 0x7F, 0x81,
+			0x8A, 0x8E, 0x9B, 0x9C, 0x4D, 0x56, 0x5D, 0x73),
 		PANEL_DCS(0xE7, 0x07, 0x10, 0x10, 0x1A, 0x26, 0x9E, 0x00, 0x4F,
 			0xA0, 0x14, 0x14, 0x00, 0x00, 0x00, 0x00, 0x12, 0x0A, 0x02,
 			0x02, 0x00, 0x33, 0x02, 0x04, 0x18, 0x01),

src/include/smbios.h

@@ -870,7 +870,10 @@ enum misc_slot_type {
 	SlotTypePciExpressGen5x2 = 0xC0,
 	SlotTypePciExpressGen5x4 = 0xC1,
 	SlotTypePciExpressGen5x8 = 0xC2,
-	SlotTypePciExpressGen5x16 = 0xC3
+	SlotTypePciExpressGen5x16 = 0xC3,
+	SlotTypePciExpressGen6AndBeyond = 0xC4,
+	SlotTypeEDSFF_E1 = 0xC5,
+	SlotTypeEDSFF_E3 = 0xC6,
 };
 
 /* System Slots - Slot Data Bus Width. */

src/mainboard/arm/Kconfig

@@ -0,0 +1,18 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+if VENDOR_ARM
+
+choice
+	prompt "Mainboard model"
+	default BOARD_ARM_RDN2
+
+source "src/mainboard/arm/*/Kconfig.name"
+
+endchoice
+
+source "src/mainboard/arm/*/Kconfig"
+
+config MAINBOARD_VENDOR
+	default "Arm"
+
+endif # VENDOR_ARM

src/mainboard/arm/Kconfig.name

@@ -0,0 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config VENDOR_ARM
+	bool "Arm"

src/mainboard/arm/rdn2/Kconfig

@@ -0,0 +1,64 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+if BOARD_ARM_RDN2
+
+config BOARD_SPECIFIC_OPTIONS
+	def_bool y
+	select ARCH_BOOTBLOCK_ARMV8_64
+	select ARCH_VERSTAGE_ARMV8_64
+	select ARCH_ROMSTAGE_ARMV8_64
+	select ARCH_RAMSTAGE_ARMV8_64
+	select ARM64_USE_ARCH_TIMER
+	select BOARD_ROMSIZE_KB_65536
+	select BOOTBLOCK_CUSTOM
+	select DRIVERS_UART_PL011
+	select HAVE_ACPI_TABLES
+	select ACPI_GTDT
+	select ACPI_COMMON_MADT_GICC_V3
+	select MISSING_BOARD_RESET
+	select PCI
+	select PROBE_RAM
+	select ACPI_IORT
+	select ACPI_GTDT
+	select ACPI_COMMON_MADT_GICC_V3
+	select ACPI_PPTT
+	select GENERATE_SMBIOS_TABLES
+
+config ARM64_CURRENT_EL
+	default 2
+
+config ECAM_MMCONF_BASE_ADDRESS
+	default 0x1010000000
+
+config ECAM_MMCONF_BUS_NUMBER
+	default 256
+
+config MEMLAYOUT_LD_FILE
+	string
+	default "src/mainboard/arm/rdn2/memlayout.ld"
+
+config FATAL_ASSERTS
+	default y
+
+config FMDFILE
+	default "src/mainboard/arm/rdn2/flash.fmd"
+
+config MAINBOARD_DIR
+	default "arm/rdn2"
+
+config MAINBOARD_PART_NUMBER
+	default "Neoverse N2"
+
+config MAX_CPUS
+	int
+	default 128
+
+config MAINBOARD_VENDOR
+	string
+	default "Arm"
+
+config DRAM_SIZE_MB
+	int
+	default 2048
+
+endif #  BOARD_ARM_RDN2

src/mainboard/arm/rdn2/Kconfig.name

@@ -0,0 +1,8 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+config BOARD_ARM_RDN2
+	bool "Neoverse N2"
+	help
+	  To execute, do:
+	  FVP_RD_N2\models\Win64_VC2019\FVP_RD_N2 -C board.flashloader0.fname=coreboot.rom \
+	  -C css.trustedBootROMloader.fname=bl1.bin

src/mainboard/arm/rdn2/Makefile.mk

@@ -0,0 +1,19 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+bootblock-y += bootblock.c
+
+romstage-y += cbmem.c
+
+bootblock-y += media.c
+romstage-y += media.c
+ramstage-y += media.c
+
+bootblock-y += uart.c
+romstage-y += uart.c
+ramstage-y += uart.c
+ramstage-y += acpi.c
+ramstage-$(CONFIG_ACPI_PPTT) += pptt.c
+
+bootblock-y += bootblock_custom.S
+
+CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/include