[pull] main from coreboot:main #191

Change-Id: Ib3997e8a4fccefeaa316a07c319323e5e979e5fd Signed-off-by: Yidi Lin <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84690 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Yu-Ping Wu <[email protected]>

TPM_RDRESP_NEED_DELAY was introduced in 2018 in CB:25322 after observing errors with SLB9635 by Infineon. It has been confirmed also SLB9670 and SLB9672 require a fix or delay here. Presumably, prior to CB:4388 SLB9635 did not have this problem, as this particular TPM shipped with samsung/lumpy Chromebook since 2011. In CB:4388 the code changed from polling the status register (+burst_count) using a 32bit read to separated 8bit reads. So far, experiments on samsung/lumpy and SLB9635 indicate that it would be sufficient to add a single tpm_read_status() call to see TIS_STS_DATA_AVAILABLE as set at the time of evaluating the loop exit condition. Change-Id: If5c3e93c7946ebf8226f7bba47b38253f6920c61 Signed-off-by: Kyösti Mälkki <[email protected]> Co-authored-by: Bill XIE <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76315 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Bill XIE <[email protected]> Reviewed-by: Matt DeVillier <[email protected]>

After CB:76315, TPM_RDRESP_NEED_DELAY, whose historical mission has ended, could be removed. Signed-off-by: Bill XIE <[email protected]> Change-Id: I51e046fb738d2ff7a23225739de62a1a7780bc1c Reviewed-on: https://review.coreboot.org/c/coreboot/+/84717 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Tim Crawford <[email protected]>

Because we import the doimage_mv/Makefile.mk directly into the main coreboot makefile, this was setting a global CFLAGS variable. That's not a huge issue since coreboot doesn't use the global CFLAGS variable, but it should be updated anyway. Signed-off-by: Martin Roth <[email protected]> Change-Id: Iebe281ca891745c1f993df274ef75b1440059c85 Reviewed-on: https://review.coreboot.org/c/coreboot/+/83857 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: David Hendricks <[email protected]>

When validating the FMAP against the IFD, the BIOS region is a somewhat specical case, since the FMAP BIOS region usually does not match the IFD BIOS region. Instead the FMAP region usually resides somewhere inside the IFD BIOS region and the where depends on CONFIG_CBFS_SIZE. Signed-off-by: Maximilian Brune <[email protected]> Change-Id: I920a0ee246cfd2b4ae0870256357d4f285e1730d Reviewed-on: https://review.coreboot.org/c/coreboot/+/79368 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: David Hendricks <[email protected]>

Add targeted feature list for Xeon 6 coreboot. The listed features are targeted to be supported by Xeon 6 coreboot design, while some specific items might need fixes and improvements per community feedback. Change-Id: Ibecd63dfca10712223ccdd943109ba28ed668200 Signed-off-by: Shuo Liu <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84701 Reviewed-by: Lean Sheng Tan <[email protected]> Tested-by: build bot (Jenkins) <[email protected]>

The original URL now points to "AMD Documentation Hub" and not the document. Change-Id: Icc42943340132843df2387cc1203178a0774a387 Signed-off-by: Nicholas Sudsgaard <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84720 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Marshall Dawson <[email protected]>

This change reiterates that the coreboot leadership may revoke a user's privileges. This does not change anything, as it already says "The community organizers may take any action they deem appropriate, up to and including a temporary ban or permanent expulsion from the community without warning". Also add a note that the discussions are private. If someone wants to make the issue public, the coreboot leadership can't stop them, but the board believes in handling these issues privately. Finally, add a note that if there's an issue with someone on the arbitration board, issues may be taken directly to the leadership board. Change-Id: I5e2010a16f31f892bd1761b56b96ea773877dea0 Signed-off-by: Martin Roth <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80619 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Eric Lai <[email protected]> Reviewed-by: David Hendricks <[email protected]>

According to CB:68982, add SPDX license headers to rex template Makefile. Without this patch, build bot may report build failed. BUG=none TEST=Run create_coreboot_variant.sh and check Makefile Change-Id: I7d100a2303be063590f1389a7eed8f9a52071241 Signed-off-by: Tyler Wang <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84712 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Eric Lai <[email protected]> Reviewed-by: Subrata Banik <[email protected]>

nullptr was introduced in C11 spec and gcc 4.7. https://en.cppreference.com/w/cpp/language/nullptr https://stackoverflow.com/questions/16256586/how-to-enable-c11-on-later-versions-of-gcc coreboot switched to GCC 4.7.2 on October 25, 2021, prior to coreboot v4.1. https://review.coreboot.org/c/coreboot/+/1609 GCC-13 implemented nullptr constant: https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3042.htm So use it insted of NULL macro. Change-Id: I7d47e692a33d739345a81f589d4329a31beeb8c5 Signed-off-by: Elyes Haouas <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83860 Reviewed-by: Martin L Roth <[email protected]> Tested-by: build bot (Jenkins) <[email protected]>

Add AOLD Method, which returns an integer based on whether Audio Offload is enabled. Leave the existing control of Audio Offload in `soc/soc_chip.h`. Add `cnvi_bt_audio_offload` in the USB ACPI `chip.h` to control the aforementioned return value. The value in `soc/soc_chip.h` and `chip.h` should match. Change-Id: Idb804fb1cf0edef4a98479a6261ca68255dbf075 Signed-off-by: Sean Rhodes <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84134 Reviewed-by: Nicholas Sudsgaard <[email protected]> Tested-by: build bot (Jenkins) <[email protected]>

Print a warning when the FSP UPD for CNVi Audio Offload is enabled without the corresponding USB ACPI driver being enabled. Throw an error when the USB ACPI driver is enabled without the corresponding UPD being enabled. Change-Id: I449c43998dd379dc68a33db47a2fe51cfe5cda2f Signed-off-by: Sean Rhodes <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84716 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Martin L Roth <[email protected]>

Add support for RTD3 for Intel Bluetooth. This is done by controlling the enable GPIO (GPP_VGPIO_0 for most SOCs) that exists on all wireless cards since Jefferson Peak. The exception is GalePeak2, which uses VSEC and this driver doesn't support that. Change-Id: Ibea97ab0ae0a9f1eb6aaca43d831bb4ce7bdc02e Signed-off-by: Sean Rhodes <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84626 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Nicholas Sudsgaard <[email protected]>

…iver Linux has never supported this feature, and according to our FAE, the Windows driver dropped support for it in 2022 so remove it. Change-Id: I4f0b6108bb5db657490a8b9395bb99378fc63c4d Signed-off-by: Sean Rhodes <[email protected]> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84624 Tested-by: build bot (Jenkins) <[email protected]> Reviewed-by: Nicholas Sudsgaard <[email protected]>

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[pull] main from coreboot:main #191

[pull] main from coreboot:main #191

Commits on Oct 14, 2024