GitHub - BrandonTorres/UARTNexys2: A UART design for the Nexys2

Name		Name	Last commit message	Last commit date
Latest commit History 1 Commit
AISO.v		AISO.v
Baud_Counter.v		Baud_Counter.v
Baud_Decoder.v		Baud_Decoder.v
Baud_Delay.v		Baud_Delay.v
Bit_Counter.v		Bit_Counter.v
LAB4.V		LAB4.V
Lab3_top.v		Lab3_top.v
Lab3_topRx_tb.v		Lab3_topRx_tb.v
Lab3_top_tb.v		Lab3_top_tb.v
Nexys2_500E.ucf		Nexys2_500E.ucf
PISO11.v		PISO11.v
RSFlop.v		RSFlop.v
dec8to255.v		dec8to255.v
embedded_kcpsm3.v		embedded_kcpsm3.v
kcpsm3.v		kcpsm3.v
lab3.V		lab3.V
proc_tb.v		proc_tb.v
reg8.v		reg8.v