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i#1569 AArch64: Make drutil work with load/store (register).
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AArch64's load/store (register) has an optional "extend" operation
in contrast to ARM's optional shift.

Review-URL: https://codereview.appspot.com/307270043
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egrimley-arm committed Sep 12, 2016
1 parent 9fd9343 commit a4d1705
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Showing 2 changed files with 30 additions and 3 deletions.
10 changes: 10 additions & 0 deletions core/arch/aarch64/instr_create.h
Original file line number Diff line number Diff line change
Expand Up @@ -243,6 +243,11 @@

#define INSTR_CREATE_add(dc, rd, rn, rm_or_imm) \
INSTR_CREATE_add_shift(dc, rd, rn, rm_or_imm, OPND_CREATE_LSL(), OPND_CREATE_INT(0))
#define INSTR_CREATE_add_extend(dc, rd, rn, rm, ext, exa) \
instr_create_1dst_4src(dc, OP_add, rd, rn, \
opnd_create_reg_ex(opnd_get_reg(rm), 0, DR_OPND_EXTENDED), \
opnd_add_flags(ext, DR_OPND_IS_EXTEND), \
exa)
#define INSTR_CREATE_add_shift(dc, rd, rn, rm_or_imm, sht, sha) \
opnd_is_reg(rm_or_imm) ? \
instr_create_1dst_4src((dc), OP_add, (rd), (rn), \
Expand Down Expand Up @@ -290,6 +295,11 @@
instr_create_1dst_1src((dc), OP_strh, (mem), (Rt))
#define INSTR_CREATE_sub(dc, rd, rn, rm_or_imm) \
INSTR_CREATE_sub_shift(dc, rd, rn, rm_or_imm, OPND_CREATE_LSL(), OPND_CREATE_INT(0))
#define INSTR_CREATE_sub_extend(dc, rd, rn, rm, ext, exa) \
instr_create_1dst_4src(dc, OP_sub, rd, rn, \
opnd_create_reg_ex(opnd_get_reg(rm), 0, DR_OPND_EXTENDED), \
opnd_add_flags(ext, DR_OPND_IS_EXTEND), \
exa)
#define INSTR_CREATE_sub_shift(dc, rd, rn, rm_or_imm, sht, sha) \
opnd_is_reg(rm_or_imm) ? \
instr_create_1dst_4src((dc), OP_sub, (rd), (rn), \
Expand Down
23 changes: 20 additions & 3 deletions ext/drutil/drutil.c
Original file line number Diff line number Diff line change
Expand Up @@ -306,8 +306,6 @@ drutil_insert_get_mem_addr_arm(void *drcontext, instrlist_t *bb, instr_t *where,
# endif /* ARM/AARCH64 */
else {
instr_t *instr;
uint amount;
dr_shift_type_t shift;
reg_id_t base = opnd_get_base(memref);
reg_id_t index = opnd_get_index(memref);
bool negated = TEST(DR_OPND_NEGATED, opnd_get_flags(memref));
Expand Down Expand Up @@ -355,7 +353,9 @@ drutil_insert_get_mem_addr_arm(void *drcontext, instrlist_t *bb, instr_t *where,
/* "add" instr is inserted below with a fake index reg added here */
}
if (index != REG_NULL) {
shift = opnd_get_index_shift(memref, &amount);
# ifdef ARM
uint amount;
dr_shift_type_t shift = opnd_get_index_shift(memref, &amount);
instr = negated ?
INSTR_CREATE_sub_shimm(drcontext,
opnd_create_reg(dst),
Expand All @@ -369,6 +369,23 @@ drutil_insert_get_mem_addr_arm(void *drcontext, instrlist_t *bb, instr_t *where,
opnd_create_reg(index),
OPND_CREATE_INT(shift),
OPND_CREATE_INT(amount));
# else /* AARCH64 */
uint amount;
dr_extend_type_t extend = opnd_get_index_extend(memref, NULL, &amount);
instr = negated ?
INSTR_CREATE_sub_extend(drcontext,
opnd_create_reg(dst),
opnd_create_reg(base),
opnd_create_reg(index),
OPND_CREATE_INT(extend),
OPND_CREATE_INT(amount)) :
INSTR_CREATE_add_extend(drcontext,
opnd_create_reg(dst),
opnd_create_reg(base),
opnd_create_reg(index),
OPND_CREATE_INT(extend),
OPND_CREATE_INT(amount));
# endif /* ARM/AARCH64 */
PRE(bb, where, instr);
} else if (base != dst) {
PRE(bb, where, XINST_CREATE_move(drcontext,
Expand Down

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