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i#3044 AArch64 SVE codec: Add memory scalar+vector 64-bit offset #5892

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merged 2 commits into from
Mar 3, 2023

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This patch adds the appropriate macros, tests and codec entries to encode the following variants:

LD1B    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1D    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #3]
LD1D    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1H    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #1]
LD1H    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1SB   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1SH   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #1]
LD1SH   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1SW   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #2]
LD1SW   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1W    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #2]
LD1W    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1B  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1D  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #3]
LDFF1D  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1H  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #1]
LDFF1H  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1SB { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1SH { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #1]
LDFF1SH { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1SW { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #2]
LDFF1SW { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1W  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #2]
LDFF1W  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
PRFB    <prfop>, <Pg>, [<Xn|SP>, <Zm>.D]
PRFD    <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, LSL #3]
PRFH    <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, LSL #1]
PRFW    <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, LSL #2]
ST1B    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D]
ST1D    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D, LSL #3]
ST1D    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D]
ST1H    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D, LSL #1]
ST1H    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D]
ST1W    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D, LSL #2]
ST1W    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D]

Issue: #3044

This patch adds the appropriate macros, tests and codec entries
to encode the following variants:
LD1B    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1D    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #3]
LD1D    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1H    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #1]
LD1H    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1SB   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1SH   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #1]
LD1SH   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1SW   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #2]
LD1SW   { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LD1W    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #2]
LD1W    { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1B  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1D  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #3]
LDFF1D  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1H  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #1]
LDFF1H  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1SB { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1SH { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #1]
LDFF1SH { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1SW { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #2]
LDFF1SW { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
LDFF1W  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D, LSL #2]
LDFF1W  { <Zt>.D }, <Pg>/Z, [<Xn|SP>, <Zm>.D]
PRFB    <prfop>, <Pg>, [<Xn|SP>, <Zm>.D]
PRFD    <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, LSL #3]
PRFH    <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, LSL #1]
PRFW    <prfop>, <Pg>, [<Xn|SP>, <Zm>.D, LSL #2]
ST1B    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D]
ST1D    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D, LSL #3]
ST1D    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D]
ST1H    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D, LSL #1]
ST1H    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D]
ST1W    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D, LSL #2]
ST1W    { <Zt>.D }, <Pg>, [<Xn|SP>, <Zm>.D]

Issue: #3044
@jackgallagher-arm jackgallagher-arm merged commit 280c399 into master Mar 3, 2023
@jackgallagher-arm jackgallagher-arm deleted the i3044-add-memory-scalar-plus-vector-64 branch March 3, 2023 14:13
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