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[NFC] Update FileCheck prefixes in some tests (#2848)
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mbrkusanin authored Nov 24, 2023
1 parent 62a35d8 commit 8d38dd6
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Showing 3 changed files with 34 additions and 34 deletions.
28 changes: 14 additions & 14 deletions lgc/test/BuiltIns/cs-globalinvocationid.lgc
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by tool/update_llpc_test_checks.py UTC_ARGS: --tool lgc
; RUN: lgc -mcpu=gfx1010 - < %s | FileCheck --check-prefixes=GFX8 %s
; RUN: lgc -mcpu=gfx1010 - < %s | FileCheck --check-prefixes=GFX10 %s
; RUN: lgc -mcpu=gfx1100 - < %s | FileCheck --check-prefixes=GFX11 %s

define dllexport spir_func void @lgc.shader.CS.main() local_unnamed_addr #0 !lgc.shaderstage !0 {
Expand Down Expand Up @@ -27,19 +27,19 @@ attributes #0 = { nounwind }
!2 = !{!"DescriptorBuffer", i32 6, i32 0, i32 0, i32 4, i32 0, i32 0, i32 4}
; Compute mode, containing workgroup size
!3 = !{i32 5, i32 6, i32 7}
; GFX8-LABEL: amdgpu_cs_main:
; GFX8: s_getpc_b64 s[6:7]
; GFX8-NEXT: s_mov_b32 s0, s1
; GFX8-NEXT: s_mov_b32 s1, s7
; GFX8-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x0
; GFX8-NEXT: s_mov_b32 null, 0
; GFX8-NEXT: v_mad_u64_u32 v[5:6], s0, s4, 7, v[2:3]
; GFX8-NEXT: v_mad_u64_u32 v[2:3], s0, s2, 5, v[0:1]
; GFX8-NEXT: v_mad_u64_u32 v[3:4], s0, s3, 6, v[1:2]
; GFX8-NEXT: v_mov_b32_e32 v4, v5
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: buffer_store_dwordx3 v[2:4], off, s[8:11], 0
; GFX8-NEXT: s_endpgm
; GFX10-LABEL: amdgpu_cs_main:
; GFX10: s_getpc_b64 s[6:7]
; GFX10-NEXT: s_mov_b32 s0, s1
; GFX10-NEXT: s_mov_b32 s1, s7
; GFX10-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x0
; GFX10-NEXT: s_mov_b32 null, 0
; GFX10-NEXT: v_mad_u64_u32 v[5:6], s0, s4, 7, v[2:3]
; GFX10-NEXT: v_mad_u64_u32 v[2:3], s0, s2, 5, v[0:1]
; GFX10-NEXT: v_mad_u64_u32 v[3:4], s0, s3, 6, v[1:2]
; GFX10-NEXT: v_mov_b32_e32 v4, v5
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_store_dwordx3 v[2:4], off, s[8:11], 0
; GFX10-NEXT: s_endpgm
;
; GFX11-LABEL: amdgpu_cs_main:
; GFX11: s_getpc_b64 s[6:7]
Expand Down
18 changes: 9 additions & 9 deletions lgc/test/BuiltIns/cs-localinvocationid.lgc
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by tool/update_llpc_test_checks.py UTC_ARGS: --tool lgc
; RUN: lgc -mcpu=gfx1010 - < %s | FileCheck --check-prefixes=GFX8 %s
; RUN: lgc -mcpu=gfx1010 - < %s | FileCheck --check-prefixes=GFX10 %s
; RUN: lgc -mcpu=gfx1100 - < %s | FileCheck --check-prefixes=GFX11 %s

define dllexport spir_func void @lgc.shader.CS.main() local_unnamed_addr #0 !lgc.shaderstage !0 {
Expand Down Expand Up @@ -28,14 +28,14 @@ attributes #0 = { nounwind }
; Compute mode, containing workgroup size
!3 = !{i32 5, i32 6, i32 7}

; GFX8-LABEL: amdgpu_cs_main:
; GFX8: s_getpc_b64 s[2:3]
; GFX8-NEXT: s_mov_b32 s0, s1
; GFX8-NEXT: s_mov_b32 s1, s3
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x0
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GFX8-NEXT: s_endpgm
; GFX10-LABEL: amdgpu_cs_main:
; GFX10: s_getpc_b64 s[2:3]
; GFX10-NEXT: s_mov_b32 s0, s1
; GFX10-NEXT: s_mov_b32 s1, s3
; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x0
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_store_dwordx3 v[0:2], off, s[0:3], 0
; GFX10-NEXT: s_endpgm
;
; GFX11-LABEL: amdgpu_cs_main:
; GFX11: s_getpc_b64 s[2:3]
Expand Down
22 changes: 11 additions & 11 deletions lgc/test/BuiltIns/cs-localinvocationindex.lgc
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by tool/update_llpc_test_checks.py UTC_ARGS: --tool lgc
; RUN: lgc -mcpu=gfx1010 - < %s | FileCheck --check-prefixes=GFX8 %s
; RUN: lgc -mcpu=gfx1010 - < %s | FileCheck --check-prefixes=GFX10 %s
; RUN: lgc -mcpu=gfx1100 - < %s | FileCheck --check-prefixes=GFX11 %s

define dllexport spir_func void @lgc.shader.CS.main() local_unnamed_addr #0 !lgc.shaderstage !0 {
Expand Down Expand Up @@ -28,16 +28,16 @@ attributes #0 = { nounwind }
; Compute mode, containing workgroup size
!3 = !{i32 5, i32 6, i32 7}

; GFX8-LABEL: amdgpu_cs_main:
; GFX8: s_getpc_b64 s[2:3]
; GFX8-NEXT: s_mov_b32 s0, s1
; GFX8-NEXT: s_mov_b32 s1, s3
; GFX8-NEXT: v_mad_u64_u32 v[1:2], s4, v2, 6, v[1:2]
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x0
; GFX8-NEXT: v_mad_u64_u32 v[0:1], s4, v1, 5, v[0:1]
; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX8-NEXT: s_endpgm
; GFX10-LABEL: amdgpu_cs_main:
; GFX10: s_getpc_b64 s[2:3]
; GFX10-NEXT: s_mov_b32 s0, s1
; GFX10-NEXT: s_mov_b32 s1, s3
; GFX10-NEXT: v_mad_u64_u32 v[1:2], s4, v2, 6, v[1:2]
; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x0
; GFX10-NEXT: v_mad_u64_u32 v[0:1], s4, v1, 5, v[0:1]
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX10-NEXT: s_endpgm
;
; GFX11-LABEL: amdgpu_cs_main:
; GFX11: s_getpc_b64 s[2:3]
Expand Down

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