Description: DDR4 naive write & read test based on DDR4 SDRAM (MIG) example design. All DDR4 IP settings remain default.Only tested with xsim behavioral simulation.
Procedure:
- Write 20 data into DDR4
- Read first 10 data
- Read the other 10 data
- Add them
- Write back 10 results into DDR4
- Read these results to verify correctness
Details: Please refer to the acticle: https://www.cnblogs.com/georgelin/articles/17986150