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refactor(rom): Apply suggestion from #938
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arturum1 committed Sep 9, 2024
1 parent d774683 commit 9988c11
Showing 1 changed file with 10 additions and 10 deletions.
20 changes: 10 additions & 10 deletions lib/hardware/memories/rom/iob_rom_2p/hardware/src/iob_rom_2p.v
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
`timescale 1ns / 1ps

module iob_rom_2p #(
parameter HEXFILE = "none",
parameter DATA_W = 0,
parameter ADDR_W = 0
parameter HEXFILE = "none",
parameter DATA_W = 0,
parameter ADDR_W = 0
) (
input clk_i,

Expand All @@ -20,24 +20,24 @@ module iob_rom_2p #(
output [DATA_W-1:0] r_data_o
);

wire en_int;
wire en_int;
wire [ADDR_W-1:0] addr_int;

// Internal Single Port ROM
iob_rom_sp #(
.HEXFILE(HEXFILE),
.DATA_W(DATA_W),
.ADDR_W(ADDR_W)
.DATA_W (DATA_W),
.ADDR_W (ADDR_W)
) iob_rom_sp_inst (
.clk_i (clk_i),
.r_en_i (en_int),
.addr_i (addr_int),
.r_data_o(r_data_o)
);

assign en_int = r1_en_i | r2_en_i;
assign addr_int = r1_en_i ? r1_addr_i : r2_addr_i;
assign r1_ready_o = r1_en_i;
assign r2_ready_o = r1_en_i ? 0 : r2_en_i;
assign en_int = r1_en_i | r2_en_i;
assign addr_int = r1_en_i ? r1_addr_i : r2_addr_i;
assign r1_ready_o = 1'b1;
assign r2_ready_o = ~r1_en_i;

endmodule

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