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feat(fpga): add fpga test target, update CI to run fpga-test #615

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merged 2 commits into from
Oct 31, 2023
Merged

feat(fpga): add fpga test target, update CI to run fpga-test #615

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d24d7f6
fix(fpga): add fpga test target
P-Miranda Oct 31, 2023
b1a4df5
feat(CI): update fpga targets to run test
P-Miranda Oct 31, 2023
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8 changes: 4 additions & 4 deletions .github/workflows/ci.yml
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Original file line number Diff line number Diff line change
Expand Up @@ -90,9 +90,9 @@ jobs:
with:
submodules: 'recursive'
- name: init mem and no ext mem
run: make fpga-run BOARD=CYCLONEV-GT-DK INIT_MEM=1 USE_EXTMEM=0
run: make fpga-test BOARD=CYCLONEV-GT-DK INIT_MEM=1 USE_EXTMEM=0
- name: no init mem and ext mem
run: make fpga-run BOARD=CYCLONEV-GT-DK INIT_MEM=0 USE_EXTMEM=1
run: make fpga-test BOARD=CYCLONEV-GT-DK INIT_MEM=0 USE_EXTMEM=1


aes-ku040:
Expand All @@ -106,9 +106,9 @@ jobs:
with:
submodules: 'recursive'
- name: init mem and no ext mem
run: make fpga-run BOARD=AES-KU040-DB-G INIT_MEM=1 USE_EXTMEM=0
run: make fpga-test BOARD=AES-KU040-DB-G INIT_MEM=1 USE_EXTMEM=0
- name: no init mem and ext mem
run: make fpga-run BOARD=AES-KU040-DB-G INIT_MEM=0 USE_EXTMEM=1
run: make fpga-test BOARD=AES-KU040-DB-G INIT_MEM=0 USE_EXTMEM=1

doc:
runs-on: self-hosted
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3 changes: 3 additions & 0 deletions submodules/LIB/hardware/fpga/Makefile
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Expand Up @@ -79,6 +79,9 @@ else
endif
endif

test: run
sync && sleep 1 && test "$$(cat test.log)" = "Test passed!"

# clean
clean: $(FPGA_TOOL)-clean
find . -maxdepth 1 -type f -not \( -name "Makefile" -o -name "fpga_build.mk" -o -name "uut_build.mk" \) -delete
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