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PTW, RVH: init the A、D、PPN of fake pte to avoid wrong pf and wrong gp…
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…addr in L1TLB (#3423)

1. init a、d、ppn of fake pte
2. modify the logic of isPf and isAf
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pxk27 authored Aug 27, 2024
1 parent 2a363ba commit d15c243
Showing 1 changed file with 4 additions and 0 deletions.
4 changes: 4 additions & 0 deletions src/main/scala/xiangshan/cache/mmu/PageTableWalker.scala
Original file line number Diff line number Diff line change
Expand Up @@ -186,6 +186,10 @@ class PTW()(implicit p: Parameters) extends XSModule with HasPtwConst with HasPe
fake_pte.perm.r := true.B
fake_pte.perm.w := true.B
fake_pte.perm.x := true.B
fake_pte.perm.a := true.B
fake_pte.perm.d := true.B
fake_pte.ppn := ppn(ppnLen - 1, 0)
fake_pte.ppn_high := ppn(ptePPNLen - 1, ppnLen)

io.req.ready := idle
val ptw_resp = Wire(new PtwMergeResp)
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