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feat: riscv64: Unify the 'c906' and 'virt64' architecture portings #9181

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merged 5 commits into from
Sep 11, 2024

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polarvid
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@polarvid polarvid commented Jul 12, 2024

拉取/合并请求描述:(PR description)

[

为什么提交这份PR (why to submit this PR)

Part of the patch set on #9151

Unify the 'c906' and 'virt64' under RISC-V portings.

你的解决方案是什么 (what is your solution)

See messages on each commit for detailed descriptions.

请提供验证的bsp和config (provide the config and bsp)

  • BSP:
  • .config:
  • action:

]

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

  • 本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
  • 本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality:

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

  • 已经仔细查看过代码改动的对比 Already check the difference between PR and old code
  • 代码风格正确,包括缩进空格,命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
  • 没有垃圾代码,代码尽量精简,不包含#if 0代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up
  • 所有变更均有原因及合理的,并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
  • 对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
  • 代码是高质量的 Code in this PR is of high quality
  • 已经使用formatting 等源码格式化工具确保格式符合RT-Thread代码规范 This PR complies with RT-Thread code specification

@polarvid polarvid changed the title Shell/rv next [dev] remove redundant codes for risc-v arch portings Jul 12, 2024
@polarvid polarvid changed the title [dev] remove redundant codes for risc-v arch portings [base:riscv64] remove redundant codes for risc-v arch portings Jul 12, 2024
@polarvid polarvid force-pushed the shell/rv-next branch 2 times, most recently from 3d9b0f7 to b48eac7 Compare July 12, 2024 07:01
@BernardXiong BernardXiong added Arch: RISC-V BSP related with risc-v RT-Smart RT-Thread Smart related PR or issues labels Jul 13, 2024
@polarvid polarvid changed the base branch from riscv64 to master August 28, 2024 09:18
@polarvid polarvid changed the title [base:riscv64] remove redundant codes for risc-v arch portings feat: riscv64: add general common64 for rv64 portings Aug 28, 2024
@BernardXiong BernardXiong added the 🎯 Focus Should focus on this issue/discussion/pr label Aug 28, 2024
@polarvid polarvid force-pushed the shell/rv-next branch 2 times, most recently from caf56d7 to e05fdca Compare September 6, 2024 03:08
@polarvid polarvid changed the title feat: riscv64: add general common64 for rv64 portings feat: riscv64: Unify the 'c906' and 'virt64' architecture portings Sep 6, 2024
@polarvid polarvid marked this pull request as ready for review September 6, 2024 03:31
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polarvid commented Sep 6, 2024

@heyuanjie87 原来的 milkv 修改我放 https://github.com/polarvid/rt-thread-mirror/tree/TEST/rv-next 分支上面了,你可以基于那个审查一下这个 PR ,感谢。

@heyuanjie87
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@heyuanjie87 原来的 milkv 修改我放 https://github.com/polarvid/rt-thread-mirror/tree/TEST/rv-next 分支上面了,你可以基于那个审查一下这个 PR ,感谢。

周一帮你测试下

Changes:
- added config for NEW_CTX_SWITCH
- used new context on c906 sched switch routine
- update _rt_hw_stack_init to fit into NEW_CTX_SWITCH
- separated vector ctx from the generic

Signed-off-by: Shell <[email protected]>
These changes are designed to standardize the memory management across
'virt64' and 'c906', ensuring efficient handling of address spaces and
page tables.

Changes:
- Creation of ASID management files (`asid.c`) for both 'c906' and
  'virt64' architectures, which is essential for maintaining stability.
- Extensive updates to the MMU configuration and handling in `mmu.c` and `mmu.h` files.
- Addition of functions to manage ASID allocation and switching of page tables.
- For c906, accommodated the early memory setup to the one from virt64.

Signed-off-by: Shell <[email protected]>
This patch aims to unify the two currently separated RISC-V 64-bit
architecture ports, 'virt64' and 'c906', into a single generic
'common64' port. The changes include renaming files and updating
includes to use a unified 'interrupt.h' header, as well as making
adjustments to IO and trap handling to be more consistent between the
two architectures.

Changes:
- Renamed 'rt_interrupt.h' to 'interrupt.h' and updated includes accordingly.
- Unified IO register access functions in 'riscv_io.h'.
- Added 'opcode.h' for portable assembly support.
- Updated 'plic.c' and 'plic.h' to handle interrupts in a unified manner.
- Modified 'trap.c' to handle exceptions and interrupts consistently for 'rv64'.

Signed-off-by: Shell <[email protected]>
This patch consolidates the separated architecture-specific code for
rv64 (virt64 and c906) under a more unified approach. The changes
aim to enhance maintainability and code reuse, reducing duplication
between these two architectures while adding small improvements in
porting compatibility.

Changes:
- Modified build scripts (SConscript) for both virt64 and c906 to
  remove ASID and vector dependencies when not required.
- Updated c906's sbi.c and sbi.h to use standard integer types
  (uint32_t) and include the missing <stdint.h> header.
- Unified inline function declaration for `sbi_call` across both
  c906 and virt64 using `rt_inline`.
- Disabled FPU and vector in c906's startup assembly file, aligning it
  with the virt64 handling.
- Corrected syscall handler type definitions in c906 for consistency.

Signed-off-by: Shell <[email protected]>
@heyuanjie87
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初步测试成功:

BSP:https://github.com/heyuanjie87/bsp-MilkvDuo-xx
根文件系统:https://github.com/polarvid/rt-thread-mirror/blob/TEST/rv-next/bsp/cvitek/cv18xx_risc-v/applications/cromfs_data.c
说明:手动挂载cromfs后挂载sd0设备到/mnt,运行其中静态编译的程序正常退出

测试输出:

msh />mcrom
[I/app.filesystem] Dir / crom mount ok!
[I/app.filesystem] Dir /dev/shm tmp mount ok!
[I/app.filesystem] file system initialization done!

msh />mount sd0 /mnt elm
mount device sd0(elm) onto /mnt ... succeed!
msh />sbin/init
msh />[E/sal.skt] not find network interface device by protocol family(1).
[E/sal.skt] SAL socket protocol family input failed, return error -3.
/ # ./mnt/a.out
fpu
12.420000
/ # 

@polarvid polarvid added the +1 Agree +1 label Sep 11, 2024
@mysterywolf mysterywolf merged commit c78a19e into RT-Thread:master Sep 11, 2024
44 of 45 checks passed
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Arch: RISC-V BSP related with risc-v BSP: Cvitek BSP related with cvitek BSP Component 🎯 Focus Should focus on this issue/discussion/pr libcpu RT-Smart RT-Thread Smart related PR or issues +1 Agree +1
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