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TPMS2 preset changed. Few CC1101 registers documented.
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antirez committed Jan 9, 2023
1 parent 811d8f3 commit 4e36d03
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Showing 2 changed files with 46 additions and 6 deletions.
4 changes: 2 additions & 2 deletions app_subghz.c
Original file line number Diff line number Diff line change
Expand Up @@ -13,8 +13,8 @@ ProtoViewModulation ProtoViewModulations[] = {
{"2FSK 47.6Khz", FuriHalSubGhzPreset2FSKDev476Async, NULL},
{"MSK", FuriHalSubGhzPresetMSK99_97KbAsync, NULL},
{"GFSK", FuriHalSubGhzPresetGFSK9_99KbAsync, NULL},
{"TPMS FSK 28Khz", 0, (uint8_t*)protoview_subghz_tpms1_async_regs},
{"TPMS FSK 47Khz", 0, (uint8_t*)protoview_subghz_tpms2_async_regs},
{"TPMS 1 (FSK)", 0, (uint8_t*)protoview_subghz_tpms1_async_regs},
{"TPMS 2 (FSK)", 0, (uint8_t*)protoview_subghz_tpms2_async_regs},
{NULL, 0, NULL} /* End of list sentinel. */
};

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48 changes: 44 additions & 4 deletions custom_presets.h
Original file line number Diff line number Diff line change
@@ -1,5 +1,45 @@
#include <cc1101.h>

/* This is how to configure registers MDMCFG3 and MDMCFG4.
*
* Data rate kBaud setting:
*
* MDMCFG3 is the data rate mantissa, the exponent is in MDMCFG4,
* last 4 bits of the register.
*
* The rate (assuming 26Mhz crystal) is calculated as follows:
*
* ((256+MDMCFG3)*(2^MDMCFG4:0..3bits)) / 2^28 * 26000000.
*
* For instance for the default values of MDMCFG3 (34) and MDMCFG4 (12):
*
* ((256+34)*(2^12))/(2^28)*26000000 = 115051.2688000000, that is 115KBaud
*
* Bandwidth filter setting:
*
* BW filter as just 16 possibilities depending on how the first nibble
* (first 4 bits) of the MDMCFG4 bits are set. Instead of providing the
* formula, it is simpler to show all the values of the nibble and the
* corresponding bandwidth filter.
*
* 0 812khz
* 1 650khz
* 2 541khz
* 3 464khz
* 4 406khz
* 5 325khz
* 6 270khz
* 7 232khz
* 8 203khz
* 9 162khz
* a 135khz
* b 116khz
* c 102khz
* d 82 khz
* e 68 khz
* f 58 khz
*/

/* 20 KBaud, 2FSK, 28.56 kHz deviation, 325 Khz bandwidth filter. */
static uint8_t protoview_subghz_tpms1_async_regs[][2] = {
/* GPIO GD0 */
Expand Down Expand Up @@ -45,7 +85,7 @@ static uint8_t protoview_subghz_tpms1_async_regs[][2] = {
{0, 0},
};

/* 20 KBaud, 2FSK, 44.60 kHz deviation, 270 Khz bandwidth filter. */
/* 40 KBaud, 2FSK, 19 kHz deviation, 102 Khz bandwidth filter. */
static uint8_t protoview_subghz_tpms2_async_regs[][2] = {
/* GPIO GD0 */
{CC1101_IOCFG0, 0x0D}, // GD0 as async serial data output/input
Expand All @@ -61,9 +101,9 @@ static uint8_t protoview_subghz_tpms2_async_regs[][2] = {
{CC1101_MDMCFG0, 0x00},
{CC1101_MDMCFG1, 0x02},
{CC1101_MDMCFG2, 0x04}, // Format 2-FSK/FM, No preamble/sync, Disable (current optimized). Other code reading TPMS uses GFSK, but should be the same when in RX mode.
{CC1101_MDMCFG3, 0x93}, // Data rate is 20kBaud
{CC1101_MDMCFG4, 0x67}, // Rx BW filter is 270.833333 kHz
{CC1101_DEVIATN, 0x47}, // Deviation 47.60742 kHz
{CC1101_MDMCFG3, 0x93}, // Data rate is 40kBaud
{CC1101_MDMCFG4, 0x6A}, // 6 = BW filter 270kHz, A = Data rate exp
{CC1101_DEVIATN, 0x41}, // Deviation 19.042 kHz

/* Main Radio Control State Machine */
{CC1101_MCSM0, 0x18}, // Autocalibrate on idle-to-rx/tx, PO_TIMEOUT is 64 cycles(149-155us)
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