plat-stm32mp1: cleanup allowed low power modes

Standby-DDR-SR is not a valid mode for shutdown because we don't want the DDR content to be kept in shutdown state. Shutdown is not a valid mode for psci system suspend. Signed-off-by: Pascal Paillet <[email protected]> Change-Id: Ied5d5ea203c42b0b44d5ea8161c63638e7042ad1 Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/222007 Reviewed-by: CIBUILD <[email protected]> Reviewed-by: Nicolas LE BAYON <[email protected]> Reviewed-by: Lionel DEBIEVE <[email protected]> (cherry picked from commit ce85b03f8aa8434b2387ad6acb2158c734efc8dd) Reviewed-on: https://gerrit.st.com/c/mpu/oe/optee/optee_os/+/252148 Reviewed-by: Sebastien PASDELOUP <[email protected]> Tested-by: Sebastien PASDELOUP <[email protected]>
STMicroelectronics · May 18, 2022 · 1fe3b67 · 1fe3b67
1 parent f1aa343
commit 1fe3b67
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diff --git a/core/arch/arm/plat-stm32mp1/pm/low_power.c b/core/arch/arm/plat-stm32mp1/pm/low_power.c
@@ -466,7 +466,6 @@ void __noreturn stm32_enter_cstop_shutdown(uint32_t mode)
 				stm32_iwdg_refresh(IWDG2_INST);
 		}
 		break;
-	case STM32_PM_CSTOP_ALLOW_STANDBY_DDR_SR:
 	case STM32_PM_CSTOP_ALLOW_STANDBY_DDR_OFF:
 #ifdef STM32MP1_USE_MPU0_RESET
 		stm32mp_pm_shutdown_context();

diff --git a/core/arch/arm/plat-stm32mp1/pm/psci.c b/core/arch/arm/plat-stm32mp1/pm/psci.c
@@ -335,17 +335,10 @@ int psci_system_suspend(uintptr_t entry, uint32_t context_id __unused,
 
 	soc_mode = stm32mp1_get_lp_soc_mode(PSCI_MODE_SYSTEM_SUSPEND);
 
-	switch (soc_mode) {
-	case STM32_PM_CSLEEP_RUN:
+	if (soc_mode == STM32_PM_CSLEEP_RUN) {
 		stm32_enter_csleep();
 		nsec->mon_lr = (uint32_t)entry;
 		return PSCI_RET_SUCCESS;
-	case STM32_PM_SHUTDOWN:
-		stm32_enter_cstop_shutdown(soc_mode);
-		panic();
-	default:
-		/* Others are suspended mode: at least some context to backup */
-		break;
 	}
 
 	assert(cpu_mmu_enabled() && core_state[pos] == CORE_ON);